Tech Center 2100 • Art Units: 2122 2142 2182 2183
This examiner grants 91% of resolved cases
Michael J. Metzger, in Tech Center 2100 and Art Unit 2122, has 503 resolved cases. The allowance rate is high at 90.7 percent, and the interview lift is 7.6 percent. This high 90.7 percent rate suggests that most applications will be allowed. The 7.6 percent lift, while modest, still provides a positive benefit for those who choose to interview compared to the 90.7 percent baseline.
The median time to allowance is 955 days. The 7.6 percent interview lift, while positive, is less critical given the 90.7 percent base allowance rate. Practitioners can expect a 955 day path to issuance. With 503 resolved cases, the examiner's high allowance rate is well-documented in Art Unit 2122. The 955 day timeline and 90.7 percent allowance rate make this a very favorable environment for patent applicants. Counsel should focus on maintaining the high 90.7 percent success rate through standard prosecution.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18990080 | MULTI-VARIATE STRIDED READ OPERATIONS FOR ACCESSING MATRIX OPERANDS | Non-Final OA | Intel Corporation |
| 18170808 | LOAD STORE CACHE MICROARCHITECTURE | Non-Final OA | Intel Corporation |
| 19071690 | Vector Processor Architectures | Non-Final OA | Altera Corporation |
| 18194327 | INSTRUCTIONS FOR FLOATING POINT MULTIPLICATION AND ADDITION AND CONVERSION EMPLOYING VARIABLE PRECISION | Non-Final OA | Altera Corporation |
| 18771764 | PROCESSOR WITH HARDWARE-INTEGRATED MEMORY ACCESS PROTECTION | Non-Final OA | Texas Instruments Incorporated |
| 19029952 | MULTI-LEVEL HIERARCHICAL ROUTING MATRICES FOR PATTERN-RECOGNITION PROCESSORS | Non-Final OA | Micron Technology, Inc. |
| 18520276 | NEURAL NETWORK ACCELERATOR WITH IMPROVED LEARNING PERFORMANCE AND OPERATION METHOD THEREOF | Non-Final OA | Korea Advanced Institute of Science and Technology |
| 19193344 | RECONFIGURABLE PROCESSOR AND A METHOD OF IMPROVING AN EFFICIENCY OF THE RECONFIGURABLE PROCESSOR | Non-Final OA | National University of Singapore |
| 19111422 | PROCESSOR THAT IMPLEMENTS INDIRECT ADDRESSING-STYLE CONDITIONAL JUMP INSTRUCTIONS, PROGRAM RECORDING MEDIUM, AND METHOD | Non-Final OA | TOKYO ELECTRON LIMITED |
| 19038352 | DATA PROCESSORS | Non-Final OA | Arm Limited |
| 18855967 | TECHNIQUE FOR HANDLING DATA ELEMENTS STORED IN AN ARRAY STORAGE | Non-Final OA | Arm Limited |
| 18991188 | Selective Data Compression for Non-Critical Memory Requests | Final Rejection | Advanced Micro Devices, Inc. |
| 18618838 | RESCHEDULING WORK ONTO PERSISTENT THREADS | Final Rejection | Advanced Micro Devices, Inc. |
| 19013344 | PROCESSOR AND CONTROL METHOD FOR PROCESSOR | Non-Final OA | Preferred Networks, Inc. |
| 18661145 | COMPUTING DEVICES WITH INSTRUCTION QUEUES AND PROCESSING-ELEMENT ARRAY CONTROLLERS | Final Rejection | At-memory Computing LP |
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