DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see page 1 of Remarks, filed on 23 March 2026, with respect to claim 20 have been fully considered and are persuasive. The objections to claim 20 has been withdrawn.
Applicant's arguments filed on 23 March 2026 have been fully considered but they are not persuasive. With respect to independent claims 1 and 18, the applicant argues that (1) the amended limitations of the notch extending downward from the distal surface overcomes the prior art, Kakizaki and (2) that the previous Office Action admits that Kakizaki fails to teach the limitation in claim 5 of “tapers from the substrate to the distal surface.” The examiner respectfully disagrees.
First, the directionality “downward,” as written in these claims, does not have any relative bearing with respect to the various components of the claimed device. Hence, the amended claims, as written, can be broadly interpreted to mean that Kakizaki’s Fig. 5 (which is the basis of Examiner Fig. 1) can be viewed upside down. When viewed upside down, Fig. 5 clearly shows that the notch extends from the distal surface 41 downwards and towards the substrate 205.
Second, the limitation of claim 5, being referred to in the applicant’s argument, is written with respect to the second side edges and not with respect to the notches, contrary to what is asserted by the applicant. Hence, the previous Office Action did not assert that Kakizaki does not teach the notches tapering from the substrate to the distal surface.
The applicant also argues that various dependent claims, specifically, claims 2-5, 6, 7-8 and 20-21, are patentable since they depend on claims 1 and/or 18 which the applicant deems as patentable. The examiner finds this argument moot due to the reasons above.
The applicant further argues that claims 5 and 19 are patentable since the combination of Kakizaki in view of Takahashi does not (1) show some objective teaching in the prior art that would lead a person of ordinary skill to combine relevant teachings of the references and (2) the prior art does not suggest any desirability of the modification, and (3) the claimed invention was used as a template to piece together the teachings of the prior art. The examiner respectfully disagrees.
First, the 35 U.S.C. § 103 rejection of claims 5 and 19 follow the Graham vs Deere discourse and hence has established a prima facie case of obviousness. It outlines what the primary refence teaches and what it’s missing. In the case of Kakizaki, that prior art teaches the mold having a pair of opposing first side edges (E1/E3 and E2/E4), a pair of opposing second side edges (E5/E6: note that both E5 and E6 are found on surfaces 44 and 43; hence there are two E5/E6 which constitute “a pair”, see Examiner Fig. 2 in claim 5 rejection below). The examiner further clarifies, in this office action, that each of the pair of opposing second side edges are constituent edges of surfaces 44 and 43, respectively. The rejection also finds that Kakizaki does not teach the pair of opposing second side edges that taper from the substrate to the distal surface. The previous Office Action further asserts that Takahashi teaches analogous pair of opposing second side edges, an analogous substrate, and an analogous distal surface and further teaches the pair of opposing side edges taper from the substrate to the distal edge. See Examiner Fig. 2 below for clarifications. The previous office action further asserts that a person of ordinary skill would find it obvious to combine due to the motivation of preserving the planarity of the distal surface.
Second, the expectation of some advantage, as stated above, is the strongest rationale for combining references. See In re Sernaker, 702 F.2d 989, 994-95, 217 USPQ 1, 5-6 (Fed. Cir. 1983) and MPEP § 2144 (I).
Third, the In the case of Ecolab, Inc. v. FMC Corp., 569 F.3d 1335, 91 USPQ2d 1225 (Fed. Cir. 2009), an "apparent reason to combine" in conjunction with the technical ability to optimize (in the case of Kakizaki in view of Takahashi, the optimizing of the planarity of the distal surface) led to the conclusion that the claimed invention would have been obvious. See also MPEP § 2143 (I) (A).
In summary, this application is not placed in a condition for an allowance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 6-8, 18, and 20-21 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kakizaki (US 2024/0290694 A1).
Regarding claim 1, Kakizaki teaches an electronic device (A10; Figs. 1-16) comprising:
a substrate (205, see Fig. 5 and ¶ 0079) having a die pad (111);
a semiconductor device (20) on the die pad and electrically connected to the substrate (¶ 0081: second electrode 202 of 20 is electrically connected to 111 through 29 ); and
a mold compound (40, see Fig. 1) over the semiconductor device to provide a packaged electronic device having respective side edges (E1, E2, E3, E4; see Examiner Fig. 1) that extend from a first end (FE) to terminate in a second end (SE) at a distal surface (41) of the mold compound that is spaced apart from the substrate (Examiner Fig. 1 shows 41 spaced apart from 205 along the Z-axis), in which at least one side edge (E1 or alternatively, E2) of the mold compound has a respective surface (45) that is orthogonal to the distal surface (45 is along the Z-axis while 41 is along the X-Y plane) and includes a notch (rightmost 47) extending inwardly from the respective surface (Examiner Fig. 1 shows 47 extending inward into 45) and downward from the distal surface (Examiner Fig. 1, when viewed upside-down, shows notch 47 extending from distal surface 41 downwards towards substrate 205;).
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Examiner Fig. 1. Taken from Kakizaki Fig. 5
Regarding claim 2, the device of claim 1, wherein the mold compound includes a pair of opposing side edges (first set of edges: E1 & E3; second set of edges, E2 & E4, see Examiner Fig. 1; both sets of edges together constitute a pair of opposing side edges) having respective surfaces (45 and 46; 45 is bounded by E1; also, 46 is bounded by E4), in which each of the surfaces of the opposing side edges is orthogonal to the distal surface (45 and 46 are both orthogonal to 41) and includes a respective notch (at least one 47 is found on both 45 and 46) therein.
Regarding claim 3, the device of claim 2, wherein the opposing side edges are free from contacts for the electronic device (Examiner Fig. 1 and Fig. 7 shows E1, E2, E3, E4 having no contacts).
Regarding claim 4, the device of claim 3, wherein the opposing side edges have respective surfaces (44 & 43; see Examiner Fig. 1; 44 is bounded by E1 & E3, 43 is bounded by E2 & E4) that are parallel to each other (43 and 44 both extends along the X-Z plane) and orthogonal to the distal surface of the mold compound (X-Z plane is orthogonal to 41).
Regarding claim 6, the device of claim 1, wherein the substrate is a lead frame (99; see Fig. 17 and ¶ 0098) having a plurality of contacts (112 & 122 & 132 & 142; see Examiner Fig. 1) along at least one side (112 is on the side of 43; 122 & 132 & 142 are on the side of 44) thereof that is different from the at least one side edge having the notch (43 and 44 do not contain notch 47).
Regarding claim 7, the device of claim 1, wherein the notch extends along the at least one side edge (Examiner Fig. 1: right side of the bottom surface of 205) from a mounting surface (bottom surface of 205) of the substrate to the distal surface of the mold compound (Examiner Fig. 1 shows 47 extending along the right side of the bottom surface of 205, where 20 is mounted on, to the bottom surface 41 of the mold 40).
Regarding claim 8, the device of claim 6, wherein the notch is configured to expose a portion of the die pad (Fig. 7 shows 111 seen from the top due to notch 47), the notch having a curved surface that tapers inwardly from the distal surface to the die pad (Fig. 7 shows 47 having a curved surface; Figs.2 shows 47 tapering inwardly along the z-axis from 41 to 111).
Regarding claim 18, Kakizaki teaches a packaged electronic device (Figs. 1-16, ¶ 0050) comprising:
a lead frame (99; see Fig. 17 and ¶ 0098) having a die pad (111) and contacts (112 & 122 & 132 & 142; see Examiner Fig. 1 in claim 1 rejection above) along at least one side (112 is on the right side of 111; 122 & 132 & 142 are on the left side of 111) thereof;
an electronic device (20) on the die pad, the electronic device including pads (201, 202, 203; see also Figs. 5 & 12 and ¶ 0078) coupled to respective ones of the contacts (¶ 0080 – ¶ 0085); and
a mold compound (40) over the electronic device to provide an encapsulated electronic device (A10), the encapsulated electronic device having first (sides having surfaces 43 & 44, see Examiner Fig. 1 in claim 1 rejection) and second pairs (sides having surfaces 45 & 46) of opposing sides and a planar distal surface (41) spaced from the lead frame (41 is spaced from die pad 111 of lead frame 99), the contacts at least partially exposed through the mold compound along the at least one of the first pair of sides (Examiner Fig. 1 shows 112 or 122,132, and 142 being exposed through the side 43 or the side of 44, respectively, along the y-axis), and the mold compound along the second pair of opposing sides includes respective surfaces (45 & 46 are surfaces of the sides having 45 & 46) that are orthogonal to the planar distal surface (45 & 46 are orthogonal to 41) and include a respective notch (47) therein extending inwardly from the respective surface (Examiner Fig. 1 shows each notch 47 extending inwardly from surfaces 45 and 46) and downward from the distal surface (Examiner Fig. 1, when viewed upside-down, shows each notch 47 extending from distal surface 41 downwards towards substrate 205).
Regarding claim 20, the device of claim 18, wherein:
the second pair of opposing sides is free from contacts for the electronic device (Examiner Fig. 1 shows 45 and 46 not having any contacts ), and
the contacts are at least partially exposed through the mold compound along at least one of the first pair of sides (Examiner Fig. 1 shows 112 or 122,132, and 142 being exposed through the side 43 or the side of 44, respectively, along the y-axis).
Regarding claim 21, the device of claim 18, wherein the electronic device comprises an integrated circuit die (¶ 0078: 20 may be an IGBT or diode or a MOSFET connected mounted to a die pad 111 of leadframe; hence 20 is an integrated circuit die).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kakizaki (US 2024/0290694 A1) as applied to claims 2 and 18 above and further in view of Takahashi (US 2007/0102832 A1).
Regarding claim 5, Kakizaki teaches the device of claim 2, wherein the pair of opposing side edges is a pair of opposing first side edges (Examiner Fig. 1, as shown in claim 1 rejection above, shows E1/E3 and E2/E4 being a pair of opposing first side edges) and the mold compound includes a pair of opposing second side edges (E5/E6 and E5’/E6’, see left side of Examiner Fig. 2), in which each of the second side edges extends between respective ends of the first side edges (Examiner Fig. 2 shows E5/E6 extending between the plane of E1/E3 and E5’/E6’ extending between the plane of E2/E4). However, Kakizaki does not teach: the pair of opposing second side edges tapers from the substrate to the distal surface.
Takahashi, in the same field of invention, teaches a device (see right side of Examiner Fig. 2) wherein a pair of second side edges (E5/E6 and E5’/E6’) of the mold (260) tapers from the substrate (240, see Fig. 7) to the distal surface (top surface of 260).
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Examiner Fig. 2. Taken from Kakizaki Fig. 2 and Takahashi Fig. 9.
A person of ordinary skill in the art, prior to the effective date of the claimed invention, will find it obvious to combine the teachings of Takahashi into the device of Kakizaki to taper a pair of opposing side edges that constitute a surface of a mold from a substrate to a distal surface in an electronic device at least consisting of the substrate that has a die pad; a semiconductor device on the die pad; and the above-mentioned mold having the above-mentioned distal surface, with the distal surface spaced apart from the substrate. The ordinary artisan would have been motivated to modify Kakizaki in the manner set forth above for at least the purpose of using the tapered surface to create recessed areas (813, see Takahashi Fig. 8) in the mold for the further purpose of preventing the mold compound to reach to distal surface in order to preserve and/or optimize the planarity of the distal surface (see Takahashi ¶ [0008], [0011], [0042]).
Regarding claim 19, Kakizaki teaches the device of claim 18, but does note teach: wherein the mold compound along the first pair of opposing sides has respective surfaces configured to taper from the lead frame to the distal surface.
Takahashi, in the same field of invention, teaches a device (Fig. 9) wherein mold compound (260) along the first pair of opposing sides (left and right sides of 260) has respective surfaces (surfaces of 260 bounded by the left and right sides) configured to taper from the lead frame (240: Kakizaki in view of Takahashi teaches substrate 240 to be a lead frame) to the distal surface (top of 260).
A person of ordinary skill in the art, prior to the effective date of the claimed invention, will find it obvious to combine the teachings of Takahashi into the device of Kakizaki to taper respective surfaces of a first pair of opposing sides edges of a mold compound from a lead frame to a distal surface in a packaged electronic device at least consisting of the lead frame that has a die pad and contacts along at least one side thereof; an electronic device on the die pad; and the above-mentioned mold placed over the electronic device, with the mold having the above-mentioned distal surface, with the distal surface spaced apart from the lead frame. The ordinary artisan would have been motivated to modify Kakizaki in the manner set forth above for at least the purpose of using the tapered surface to create recessed areas (813, see Takahashi Fig. 8) in the mold for the further purpose of preventing the mold compound to reach to distal surface in order to preserve and/or optimize the planarity of the distal surface (see Takahashi ¶ [0008], [0011], [0042]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS YAP whose telephone number is (703)756-1946. The examiner can normally be reached Monday - Friday 8:00 AM - 5:00 PM ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at (571) 272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DOUGLAS YAP/Assistant Examiner, Art Unit 2899
/ZANDRA V SMITH/Supervisory Patent Examiner, Art Unit 2899
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