DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
1. Acknowledgement is made of the amendment received on 3/5/2026. Claims 1-3, 5-10, 12-15 & 22 are pending in this application. Claims 11 & 16-21 are canceled. Claim 22 is new.
Claim Objections
2. The claims are objected because of the following reasons:
Re claim 10, page 3, line 8: after “source/drain region;” insert --and--.
Re claim 22, line 2: in front of “upper surface” insert --flat--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1-3, 5-10 and 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2022/0238660) in view of Fujiwara et al. (US 2013/0146969) and Chu et al. (US 2021/0399099).
Re claim 1, Huang teaches, under BRI, Figs. 5-7, 10 & 14-17, [0015, 0023, 0024, 0035, 0036], a method of forming an integrated circuit device, the method comprising:
-forming a sacrificial layer (228) in a preliminary substrate (201) by adding an element (material of 228) into the preliminary substrate (201) (Fig. 7);
-forming a transistor structure (240) on the preliminary substrate (201), wherein the transistor structure comprises a source/drain region (232S, D);
-removing a lower portion of the preliminary substrate (201) until the sacrificial layer (228) is exposed (Fig. 11);
-replacing an upper portion of the preliminary substrate (201) with a lower insulator (256) (Fig. 14)
-replacing the sacrificial layer (228) with a power contact (266) that comprises an upper surface contacting the source/drain region (232S) (in a flipped view of Fig. 17); and
-forming a power rail (270) that contacts a lower surface of the power contact (266).
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Huang further teaches boron-doped silicon (Si:B); boron-doped SiGe (SiGe:B) (228, [0023]), however, Huang does not explicitly teach forming the sacrificial layer in the preliminary substrate by performing an ion implantation process on the preliminary substrate to add the element into the preliminary substrate.
Fujiwara teaches, Fig. 4, [0068], performing an ion implantation process on the preliminary substrate to add the element (e.g., boron) into the preliminary substrate (120).
As taught by Fujiwara, one of ordinary skill in the art would utilize & modify the above teaching to form the sacrificial layer in the preliminary substrate by performing an ion implantation process on the preliminary substrate to add the element into the preliminary substrate as claimed, because ion implantation process is a known technique and widely used in the art to implant ions/species into a predetermined substrate to improve its properties.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Fujiwara in combination with Huang due to above reason.
Huang/Fujiwara does not explicitly teach the power contact comprises a flat upper surface.
Chu teaches, in view of Fig. 13B, [0035], the power contact (backside source contact 264) comprises a flat upper surface (surface of 264 contacting 262).
As taught by Chu, one of ordinary skill in the art would utilize & modify the above teaching in Huang/Fujiwara to obtain a flat upper surface of the power contact as claimed, because it aids in in reducing the resistance between the contact surfaces. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chu in combination with Huang/Fujiwara due to above reason.
Re claim 2, Huang teaches, Figs. 7 & 10, the sacrificial layer (228) is formed before forming the transistor structure (240).
Re claim 3, Huang teaches, Figs. 2 & 7-10, [0018, 0023, 0027], wherein forming the transistor structure (240) comprises:
-forming a preliminary gate structure (212) on the preliminary substrate (201);
-forming the source/drain region (232S, D) that overlaps the sacrificial layer (228); and
-replacing the preliminary gate structure (212) with a gate structure (240),
wherein the sacrificial layer (228) is formed after forming the preliminary gate structure (212).
Re claim 5, in combination cited above, Huang teaches, Figs. 7 & 10-16, [0034, 0035], wherein the preliminary substrate comprises the upper portion and the lower portion, and
-forming the sacrificial layer (228) comprises adding the element through an upper surface of the preliminary substrate (201), and the sacrificial layer is formed in the upper portion of the preliminary substrate (201), and
wherein replacing the sacrificial layer (228) with the power contact (266) comprises:
removing the sacrificial layer (228), thereby forming an opening (260) in the lower insulator (256) (Fig. 15);
and forming the power contact (266) in the opening (260) (Fig. 16).
Re claim 6, in combination cited above, Huang teaches, Fig. 12, [0032], forming the sacrificial layer (228) comprises forming the sacrificial layer by performing an ion implantation process (PAI process 300) on an upper surface of the preliminary substrate (201) (see also Fujiwara’s Fig 4, [0068]).
Re claim 7, Huang teaches the element comprises boron [0032], and the preliminary substrate (of 204) comprises silicon [0015] (see also Fujikawa’s Fig 4, [0068]).
Re claim 8, Huang teaches the power contact (266) comprises opposing side surfaces outwardly curved (Fig. 16).
Re claim 9, Huang teaches, Figs. 11-16, [0030], before replacing the sacrificial layer (228) with the power contact (266), forming a back-end-of-line (BEOL) structure (interconnect structure 246) including a conductive wire (metal lines) on the transistor structure (240).
Re claim 10, Huang teaches, under BRI, Figs. 5-7, 10 & 14-17, [0015, 0023, 0024, 0035, 0036], a method of forming an integrated circuit device, the method comprising:
-converting a portion of a preliminary substrate (201) to a sacrificial layer (228) including an element;
-forming a transistor structure (240) on the preliminary substrate (201), wherein the transistor structure comprises a source/drain region (232S, D);
-removing a lower portion of the preliminary substrate (201) until the sacrificial layer (228) is exposed (Fig. 11);
-replacing an upper portion of the preliminary substrate (201) with a lower insulator (256) (Fig. 15), after removing the lower portion of the preliminary substrate (201);
-replacing the sacrificial layer (228) with a power contact (266) that comprises an upper surface contacting the source/drain region (232S) (in a flipped view of Fig. 17);
-forming a power rail (270) that contacts a lower surface of the power contact (266).
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Huang further teaches boron-doped silicon (Si:B); boron-doped SiGe (SiGe:B) (228, [0023]), however, Huang does not explicitly teach by doping the portion of the preliminary substrate with the element via ion implantation performed through an upper surface of the preliminary substrate.
Fujiwara teaches, Fig. 4, [0068], by doping the portion of the preliminary substrate (120) with the element (e.g., boron) via ion implantation performed through an upper surface of the preliminary substrate (120).
As taught by Fujiwara, one of ordinary skill in the art would utilize & modify the above teaching to dope the portion of the preliminary substrate with the element via ion implantation performed through an upper surface of the preliminary substrate as claimed, because ion implantation process is a known technique and widely used in the art to implant ions/species into a predetermined substrate to improve its properties.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Fujiwara in combination with Huang due to above reason.
Huang/Fujiwara does not explicitly teach the power contact comprises a flat upper surface.
Chu teaches, in view of Fig. 13B, [0035], the power contact (backside source contact 264) comprises a flat upper surface (surface of 264 contacting 262).
As taught by Chu, one of ordinary skill in the art would utilize & modify the above teaching in Huang/Fujiwara to obtain a flat upper surface of the power contact as claimed, because it aids in in reducing the resistance between the contact surfaces. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chu in combination with Huang/Fujiwara due to above reason.
Re claim 12, in combination cited above, Huang teaches, Figs. 2-10, [0018, 0023, 0024, 0027], forming the transistor structure comprises:
forming a preliminary gate structure (212) on the preliminary substrate (201);
converting the portion of the preliminary substrate (201) to the sacrificial layer (228) using the preliminary gate structure (212) as a mask;
forming the source/drain region (232S) that overlaps the sacrificial layer (228); and then
replacing the preliminary gate structure (212) with a gate structure (240).
Huang does not explicitly teach by doping the portion of the preliminary substrat4e with the element.
Fujiwara teaches, Fig. 4, [0068], by doping the portion of the preliminary substrate (120) with the element (e.g., boron).
As taught by Fujiwara, one of ordinary skill in the art would utilize & modify the above teaching to dope the portion of the preliminary substrate with the element as claimed, because doping process is a known technique and widely used in the art to implant ions/species into a predetermined substrate to improve its properties.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Fujiwara in combination with Huang due to above reason.
Re claim 13, Huang teaches, Fig. 17, the power contact (266) comprises opposing side surface outwardly curved.
Re claim 14, Huang teaches the element comprises boron [0032] (see also Fujiwara’s Fig. 4).
Re claim 15, in combination cited above, Huang teaches, under BRI, Figs. 6-16, [0034, 0035], converting the portion of the preliminary substrate (201) to the sacrificial layer comprises adding the element (228) through the upper surface of the preliminary substrate (201), the preliminary substrate (201) comprises the upper portion and the lower portion (204, 202), and the sacrificial layer (228) is formed in the upper portion of the preliminary substrate (201), and
wherein replacing the sacrificial layer (228) with the power contact (266) comprises:
removing the sacrificial layer (228), thereby forming an opening (260) in the lower insulator (256) (Fig. 15);
and forming the power contact (266) in the opening (260) (Fig. 16).
4. Claims 1 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2022/0238660) in view of Fujiwara et al. (US 2013/0146969) and Tsai et al. (US 2022/0165860).
Re claim 1, Huang teaches, under BRI, Figs. 5-7, 10 & 14-17, [0015, 0023, 0024, 0035, 0036], a method of forming an integrated circuit device, the method comprising:
-forming a sacrificial layer (228) in a preliminary substrate (201) by adding an element (material of 228) into the preliminary substrate (201) (Fig. 7);
-forming a transistor structure (240) on the preliminary substrate (201), wherein the transistor structure comprises a source/drain region (232S, D);
-removing a lower portion of the preliminary substrate (201) until the sacrificial layer (228) is exposed (Fig. 11);
-replacing an upper portion of the preliminary substrate (201) with a lower insulator (256) (Fig. 14)
-replacing the sacrificial layer (228) with a power contact (266) that comprises an upper surface contacting the source/drain region (232S) (in a flipped view of Fig. 17); and
-forming a power rail (270) that contacts a lower surface of the power contact (266).
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Huang further teaches boron-doped silicon (Si:B); boron-doped SiGe (SiGe:B) (228, [0023]), however, Hunag does not explicitly teach forming the sacrificial layer in the preliminary substrate by performing an ion implantation process on the preliminary substrate to add the element into the preliminary substrate.
Fujiwara teaches, Fig. 4, [0068], performing an ion implantation process on the preliminary substrate to add the element (e.g., boron) into the preliminary substrate (120).
As taught by Fujiwara, one of ordinary skill in the art would utilize & modify the above teaching to form the sacrificial layer in the preliminary substrate by performing an ion implantation process on the preliminary substrate to add the element into the preliminary substrate as claimed, because ion implantation process is a known technique and widely used in the art to implant ions/species into a predetermined substrate to improve its properties.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Fujiwara in combination with Huang due to above reason.
Huang/Fujiwara does not explicitly teach the power contact comprises a flat upper surface.
Tsai teaches, in view of Fig. 23, [0037], the power contact (backside source contact 264) comprises a flat upper surface (surface of 264 contacting 226).
As taught by Tsai, one of ordinary skill in the art would utilize & modify the above teaching in to obtain a flat upper surface of the power contact as claimed, because it aids in in reducing contact resistance the source/drain feature. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Tsai in combination with Huang/Fujiwara due to above reason.
Re claim 10, Huang teaches, under BRI, Figs. 5-7, 10 & 14-17, [0015, 0023, 0024, 0035, 0036], a method of forming an integrated circuit device, the method comprising:
-converting a portion of a preliminary substrate (201) to a sacrificial layer (228) including an element;
-forming a transistor structure (240) on the preliminary substrate (201), wherein the transistor structure comprises a source/drain region (232S, D);
-removing a lower portion of the preliminary substrate (201) until the sacrificial layer (228) is exposed (Fig. 11);
-replacing an upper portion of the preliminary substrate (201) with a lower insulator (256) (Fig. 15), after removing the lower portion of the preliminary substrate (201);
-replacing the sacrificial layer (228) with a power contact (266) that comprises an upper surface contacting the source/drain region (232S) (in a flipped view of Fig. 17);
-forming a power rail (270) that contacts a lower surface of the power contact (266).
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Huang further teaches boron-doped silicon (Si:B); boron-doped SiGe (SiGe:B) (228, [0023]), however, Huang does not explicitly teach by doping the portion of the preliminary substrate with the element via ion implantation performed through an upper surface of the preliminary substrate.
Fujiwara teaches, Fig. 4, [0068], by doping the portion of the preliminary substrate (120) with the element (e.g., boron) via ion implantation performed through an upper surface of the preliminary substrate (120).
As taught by Fujiwara, one of ordinary skill in the art would utilize & modify the above teaching to dope the portion of the preliminary substrate with the element via ion implantation performed through an upper surface of the preliminary substrate as claimed, because ion implantation process is a known technique and widely used in the art to implant ions/species into a predetermined substrate to improve its properties.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Fujiwara in combination with Huang due to above reason.
Huang/Fujiwara does not explicitly teach the power contact comprises a flat upper surface.
Tsai teaches, in view of Fig. 23, [0037], the power contact (backside source contact 264) comprises a flat upper surface (surface of 264 contacting 226).
As taught by Tsai, one of ordinary skill in the art would utilize & modify the above teaching in to obtain a flat upper surface of the power contact as claimed, because it aids in in reducing contact resistance the source/drain feature. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Tsai in combination with Huang/Fujiwara due to above reason.
Allowable Subject Matter
5. Claim 22 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
6. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
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/DUY T NGUYEN/Primary Examiner, Art Unit 2818 6/1/26
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