DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Species A1 (claims 1-10, and 13-20) in the reply filed on 12/15/2025 is acknowledged.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/03/2023 and 01/27/2026 have been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1--9 and 13-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang et al. (US Pub. 2020/0266265).
Regarding independent claim 1, Kang teaches a capacitor (CP1) (Fig. 3; para. 0028+), comprising:
a first lower electrode pattern (132) including a first material including a metal (para. 0031);
a second lower electrode pattern (134) including a second material different from the first material (para. 0030), wherein the first material and the second material are exposed on an outer sidewall of a lower electrode structure (LE1) having a pillar shape (Fig. 3);
a dielectric layer (140) on the lower electrode structure (para. 0028); and
an upper electrode (150) on the dielectric layer (para. 0028).
Re claim 2, Kang teaches wherein the first material includes a metal or a metal nitride (para. 0031), and the metal or the metal nitride has a bending stress lower than a bending stress of the second material (at least the combination of Ti or TiN as the first material and niobium or niobium nitride as the second material meet this limitation).
Re claim 3, wherein a capacitance at a contacting portion of the second material and the dielectric layer is higher than a capacitance at a contacting portion of the first material and the dielectric layer (at least the combination of Ti or TiN as the first material and niobium or niobium nitride as the second material meet this limitation).
Re claim 4, Kang teaches wherein the first material includes titanium nitride (TiN) or titanium (Ti) (para. 0031), and the second material includes niobium nitride, niobium (para. 0030).
Re claim 5, Kang teaches wherein in the lower electrode structure, a volume of the first material is greater than a volume of the second material (Fig. 3 – where 132 and 136 are formed of the same “first material” (para. 0031, 0033)).
Re claim 6, Kang teaches wherein the first lower electrode pattern has a pillar shape, the second lower electrode pattern is on an upper surface of the first lower electrode pattern, and the second lower electrode pattern has a cylindrical shape (Fig. 3).
Re claim 7, Kang teaches wherein an outer sidewall of the second lower electrode pattern is exposed on a portion of an outer wall of the lower electrode structure (Fig. 3).
Re claim 8, Kang teaches wherein the lower electrode structure further includes a third lower electrode pattern (136A; para. 0032) on the second lower electrode pattern, and the third lower electrode pattern includes the first material filling an inner portion of the second lower electrode pattern (Fig. 3; para. 0033).
Re claim 9, Kang teaches wherein the lower electrode structure further includes a fourth lower electrode pattern (136B; para. 0032) on the second lower electrode pattern and the third lower electrode pattern, and the fourth lower electrode pattern includes the first material (para. 0033).
Regarding independent claim 13, Kang teaches a capacitor (CP1) (Fig. 3; para. 0028+), comprising:
a lower electrode structure (LE1) including a first material (para. 0031, 0033), a second material (para. 0030), a first lower electrode pattern (132), a second lower electrode pattern (134), and a third lower electrode pattern (136), wherein the second material is different from the first material, the first material and the second material are exposed on an outer sidewall, and the lower electrode structure has a pillar shape;
a dielectric layer (140) on the lower electrode structure (para. 0028); and
an upper electrode (150) on the dielectric layer (para. 0028),
wherein the first lower electrode pattern includes the first material (para. 0031), and the first lower electrode pattern has a pillar shape (Fig. 3), wherein the second lower electrode pattern includes the second material (para. 0030), the second lower electrode pattern is on an upper surface of the first lower electrode pattern, and the second lower electrode pattern has a cylindrical shape (Fig. 3), and
wherein the third lower electrode pattern includes the first material (para. 0033), the third lower electrode pattern is on the second lower electrode pattern, and the third lower electrode pattern fills an inner portion of the second lower electrode pattern (Fig. 3).
Re claim 14, Kang teaches wherein the first material includes a metal or a metal nitride (para. 0031), and the first material or the metal nitride has a bending stress lower than a bending stress of the second material (at least the combination of Ti or TiN as the first material and niobium or niobium nitride as the second material meet this limitation).
Re claim 15, wherein a capacitance at a contacting portion of the second material and the dielectric layer is higher than a capacitance at a contacting portion of the first material and the dielectric layer (at least the combination of Ti or TiN as the first material and niobium or niobium nitride as the second material meet this limitation).
Re claim 16, Kang teaches wherein the first material includes titanium nitride (TiN) or titanium (Ti) (para. 0031), and the second material includes niobium nitride, niobium (para. 0030).
Re claim 17, Kang teaches wherein in the lower electrode structure, a volume of the first material is greater than a volume of the second material (Fig. 3).
Claim Rejections - 35 USC § 102/Claim Rejections - 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang et al. (US Pub. 2020/0266265); or alternatively, Claim(s) 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al. (US Pub. 2020/0266265) in view of Official Notice.
Regarding independent claim 18, Kang teaches a DRAM device (Figs. 1-3; para. 0020+), comprising:
a cell transistor (para. 0026) on a substrate (110; para. 0024), the cell transistor including a gate structure, a first impurity region, and a second impurity region (these limitations would naturally be part of the disclosed “transistor” as a transistor includes “a gate structure, a first impurity region, and a second impurity region” and even if this were somehow proven to be false, the Examiner is taking Official Notice that it would at least have been obvious to include these limitations as they are parts of most transistors including transistors known to be part of DRAM cells);
a bit line structure (BL) electrically connected to the first impurity region (Fig. 1 - through the direct contact DC; para. 0021); and
a cell capacitor (CP1) disposed on the bit line structure, the cell capacitor electrically connected to the second impurity region (Fig. 1 - through the buried contact (BC)/landing pad (LP); para. 0022), wherein the cell capacitor includes a lower electrode structure (LE1) including a first lower electrode pattern (132; para. 0031) and a second lower electrode pattern (134; para. 0030), the cell capacitor includes a dielectric layer (140; para. 0028) on the lower electrode structure, and the cell capacitor includes an upper electrode (150; para. 0028) on the dielectric layer, and wherein the second lower electrode pattern includes a material having a bending stress greater than a bending strength of the first lower electrode pattern (at least the combination of Ti or TiN as the first material and niobium or niobium nitride as the second material meet this limitation),
wherein at least a portion of the first lower electrode pattern and the second lower electrode pattern is exposed on an outer wall of the lower electrode structure (Fig. 3).
Re claim 19, wherein a capacitance at a contacting portion of the second lower electrode pattern and the dielectric layer is higher than a capacitance at a contacting portion of the first lower electrode pattern and the dielectric layer (at least the combination of Ti or TiN as the first material and niobium or niobium nitride as the second material meet this limitation).
Re claim 20, Kang teaches wherein the lower electrode structure has a pillar shape (Fig. 3).
Allowable Subject Matter
Claims 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: there is no teaching, suggestion, or motivation from the prior art of record, nor does the prior art of record otherwise make obvious the limitation of “…a seed layer pattern between the first lower electrode pattern and the second lower electrode pattern in the lower electrode structure…”, in combination with the other limitations.
Conclusion
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/MOLLY K REIDA/Examiner, Art Unit 2899