Prosecution Insights
Last updated: August 17, 2026
Application No. 18/165,595

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE

Non-Final OA §102§103
Filed
Feb 07, 2023
Priority
Sep 20, 2022 — JP 2022-148926
Examiner
NADAV, ORI
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
KIOXIA Corporation
OA Round
2 (Non-Final)
60%
Grant Probability
Moderate
2-3
OA Rounds
3m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
424 granted / 704 resolved
-7.8% vs TC avg
Strong +21% interview lift
Without
With
+21.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
50 currently pending
Career history
773
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
55.1%
+15.1% vs TC avg
§102
9.9%
-30.1% vs TC avg
§112
31.2%
-8.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 704 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-5 and 7-15 are rejected under 35 U.S.C. 103 as being unpatentable over Hattori et al. in US 2020/0381557 A1 (hereinafter Hattori) and Wada et al. in US 20210225847 A1 (hereinafter Wada) Regarding claim 1, Hattori teaches in FIG. 6 and related text, a semiconductor device (300, [0080]) comprising: a first electrode (16, [0081]); a second electrode (18, [0081]); an oxide semiconductor (10, [0081]) disposed between the first electrode (16) and the second electrode (18); and a first oxide selector (lower oxide layer 24 [0081] is capable of functioning as the first oxide selector 51 in Applicant’s disclosure [0057]/[0048] because it is made of the same materials as Applicant’s invention; additionally, layer 24 specifically reduces the “on-resistance” of the transistor 300, [0088], i.e. reduces resistance when a voltage is applied) containing a predetermined element (silicon, [0085]/[0083]), oxygen ([0085]/[0083]), and an additional element (indium and/or gallium, [0085]/[0083]), the first oxide selector (24) disposed between the first electrode (16) and the oxide semiconductor (10), wherein the predetermined element is at least one of tantalum, boron, hafnium, silicon, zirconium, or niobium (silicon, [0085]/[0083]), and the additional element is at least one of phosphorus, sulfur, copper, zinc, gallium, germanium, arsenic, selenium, silver, indium, tin, antimony, tellurium, or bismuth (indium and/or gallium, [0085]/[0083]). Hattori does not teach a first oxide electrode disposed between the first oxide selector and the oxide semiconductor. Wada teaches in FIG. 5 and related text, an oxide semiconductor device having a structure similar to the device of Hattori, wherein a first oxide electrode (41, [0038]) is in contact with an oxide semiconductor (501, [0038]). Wada teaches 41 contains a metal oxide similarly to the channel layer in order to reduce connection resistance in the transistor device ([0038]). Hattori and Wada are analogous art because they both are directed semiconductor memory devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hattori in view of Wada because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hattori to include a first oxide electrode disposed between the first oxide selector and the oxide semiconductor, as taught by Wada, with the purpose of reducing connection resistance in the transistor device ([0047]). Regarding claim 2, Hattori teaches in FIGS 3, 6 and related text, a semiconductor device (300, [0080]) comprising: a first electrode (16, [0081]); a second electrode (18, [0081]); an oxide semiconductor (10, [0081]) disposed between the first electrode (16) and the second electrode (18), the oxide semiconductor (10) including a first element (indium, zinc, or aluminum, [0069]); and a first oxide selector (lower oxide layer 24 [0081] is capable of functioning as the first oxide selector 51 in Applicant’s disclosure [0057]/[0048] because it is made of the same materials as Applicant’s invention; additionally, layer 24 specifically reduces the “on-resistance” of the transistor 300, [0088], i.e. reduces resistance when a voltage is applied) disposed between the first electrode (16) and the oxide semiconductor (10), the first oxide selector (24) including a second element (hafnium, [0083]/[0085]) and oxygen, wherein a bond-dissociation energy between the second element (hafnium) and oxygen is higher than a bond-dissociation energy between the first element (indium, zinc, or aluminum) and oxygen (bond-dissociation energy between second element hafnium and oxygen is inherently 801 kJ/mol, and bond-dissociation energy between any of the first elements indium, zinc, or aluminum and oxygen is inherently 346, 161, and 502 kJ/mol, respectively, see "Bond Dissociation Energies in Diatomic Molecules," and “Bond Dissociation Energies in “Diatomic Cations,” in CRC Handbook of Chemistry and Physics, 105th Edition (Internet Version 2024), John R. Rumble, ed., CRC Press/Taylor & Francis, Boca Raton, FL.). Hattori does not teach a first oxide electrode disposed between the first oxide selector and the oxide semiconductor. Wada teaches in FIG. 5 and related text, an oxide semiconductor device having a structure similar to the device of Hattori, wherein a first oxide electrode (41, [0038]) is in contact with an oxide semiconductor (501, [0038]). Wada teaches 41 contains a metal oxide similarly to the channel layer in order to reduce connection resistance in the transistor device ([0038]). Hattori and Wada are analogous art because they both are directed semiconductor memory devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hattori in view of Wada because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hattori to include a first oxide electrode disposed between the first oxide selector and the oxide semiconductor, as taught by Wada, with the purpose of reducing connection resistance in the transistor device ([0047]). Regarding claim 3, Hattori as modified by Wada teaches the semiconductor device according to claim 2, wherein the bond-dissociation energy between the second element (hafnium) and oxygen is 700 kJ/mol or more (bond-dissociation energy hafnium and oxygen is inherently 801 kJ/mol, see "Bond Dissociation Energies in Diatomic Molecules," and “Bond Dissociation Energies in “Diatomic Cations,” in CRC Handbook of Chemistry and Physics, 105th Edition (Internet Version 2024), John R. Rumble, ed., CRC Press/Taylor & Francis, Boca Raton, FL). Regarding claim 4, Hattori as modified by Wada teaches the semiconductor device according to claim 2, wherein the bond-dissociation energy between the second element (hafnium) and oxygen is more than two times the bond-dissociation energy between the first element (indium, zinc, or aluminum) and oxygen (bond-dissociation energy between either hafnium is inherently 80 kJ/mol, and the bond-dissociation energy between the either of first elements indium or zinc and oxygen is inherently 346 and 161 kJ/mol, respectively, see "Bond Dissociation Energies in Diatomic Molecules," and “Bond Dissociation Energies in “Diatomic Cations,” in CRC Handbook of Chemistry and Physics, 105th Edition (Internet Version 2024), John R. Rumble, ed., CRC Press/Taylor & Francis, Boca Raton, FL). Regarding claim 5, Hattori as modified by Wada teaches the semiconductor device according to claim 1. Hattori does not explicitly teach wherein a first value is 0.4 or less, the first value obtained by dividing (i) an atomic percent of the additional element (Indium or Gallium) contained in the first oxide selector by (ii) an atomic percent of the predetermined element (silicon), contained in the first oxide selector, that is at least one among tantalum, boron, hafnium, silicon, zirconium, or niobium. Hattori is silent regarding the specific stoichiometry of layer 24. However, Hattori teaches that layer 24 has a function of reducing resistance between electrode 16 and the oxide semiconductor 10. It would have therefore been obvious to one of ordinary skill in the art to provide a stoichiometry of layer 24 such that a first value is 0.4 or less, the first value obtained by dividing (i) an atomic percent of the additional element (Indium or Gallium) contained in the first oxide selector by (ii) an atomic percent of the predetermined element (silicon), contained in the first oxide selector, in order to optimize the resistance between electrode 16 and oxide semiconductor 10. One skilled in the art would know that varying the relative atomic percent of the additional element (Indium or Gallium) relative to the atomic percent of the predetermined element (silicon) in layer 24 of Hattori would provide a mechanism to optimize the resistance, and it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art (In re Aller, 105 USPQ 233). Regarding claim 7, Hattori as modified by Wada teaches the semiconductor device according to claim 1, further comprising: a second oxide selector (upper oxide layer 24 [0081] is capable of functioning as the first oxide selector 51 in Applicant’s disclosure [0057]/[0048] because it is made of the same materials as Applicant’s invention; additionally, layer 24 specifically reduces the “on-resistance” of the transistor 300, [0088], i.e. reduces resistance when a voltage is applied) , containing (i) at least one of tantalum, boron, hafnium, silicon, zirconium, or niobium (24 may contain silicon, [0085]/[0083]), (ii) oxygen ([0085]/[0083]), and (iii) at least one of phosphorus, sulfur, copper, zinc, gallium, germanium, arsenic, selenium, silver, indium, tin, antimony, tellurium, or bismuth (gallium and/or indium, [0085]/[0083]), the second oxide selector disposed between the second electrode (18) and the oxide semiconductor (10). Regarding claim 8, Hattori as modified by Wada teaches the semiconductor device according to claim 2, further comprising: a second oxide selector (oxide layer 24 [0081] is capable of functioning as the first oxide selector 51 in Applicant’s disclosure [0057]/[0048] because it is made of the same materials as Applicant’s invention; additionally, layer 24 specifically reduces the “on-resistance” of the transistor 300, [0088], i.e. reduces resistance when a voltage is applied) having a most containing element as a third element among elements other than oxygen (hafnium, [0083]/[0085]), the second oxide selector (24) being disposed between the second electrode (18) and the oxide semiconductor (10), wherein a bond-dissociation energy between the third element (hafnium) and oxygen is higher than the bond-dissociation energy between the first element (indium, zinc, or aluminum) and oxygen (bond-dissociation energy between second element hafnium and oxygen is inherently 801 kJ/mol, and bond-dissociation energy between any of the first elements indium, zinc, or aluminum and oxygen is inherently 346, 161, and 502 kJ/mol, respectively, see "Bond Dissociation Energies in Diatomic Molecules," and “Bond Dissociation Energies in “Diatomic Cations,” in CRC Handbook of Chemistry and Physics, 105th Edition (Internet Version 2024), John R. Rumble, ed., CRC Press/Taylor & Francis, Boca Raton, FL.). Regarding claim 9, Hattori as modified by Wada teaches the semiconductor device according to claim 7. Hattori does not teach a second oxide electrode disposed between the second oxide selector and the oxide semiconductor. Wada teaches in FIG. 5 and related text, an oxide semiconductor device having a structure similar to the device of Hattori, wherein a second oxide electrode (42, [0047]) is in contact with an oxide semiconductor (501, [0038]). Wada teaches 42 contains a metal oxide similarly to the channel layer in order to reduce connection resistance in the transistor device ([0047]). Hattori and Wada are analogous art because they both are directed semiconductor memory devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hattori in view of Wada because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hattori to include a second oxide electrode disposed between the second oxide selector and the oxide semiconductor, as taught by Wada, with the purpose of reducing connection resistance in the transistor device ([0047]). Regarding claim 10, Hattori as modified by Wada teaches the semiconductor device according to claim 1. Hattori teaches further comprising: a gate electrode (12, FIGS. 6 and 7, [0081], also see annotated FIG. 6 below) surrounding the oxide semiconductor (10); and an insulating film (14, FIG. 6; [0081]) disposed between at least a part of the oxide semiconductor (10) and the gate electrode (12). PNG media_image1.png 608 577 media_image1.png Greyscale Annotated FIG. 6 (Hattori) Regarding claim 11, Hattori as modified by Wada teaches the semiconductor device according to claim 7. Hattori further teaches wherein the oxide semiconductor (10) extends in a first direction (third direction, FIG. 6), has an end in contact with the first oxide selector (lower 24, FIG. 6) in the first direction (third direction), and has an end in contact with the second oxide selector (upper 24, FIG. 6) in the first direction (third direction). Regarding claim 12, Hattori teaches in FIG. 11 and related text, a semiconductor memory device (MC1, [0099]) comprising: the semiconductor device (300) according to claim 1 (as taught by Hattori and Wada; noting transistor 300 may be used instead of transistor 200 in FIG. 11, [0122]); a first capacitor electrode (71, FIG. 11, [0115]) connected to the second electrode (18); a second capacitor electrode (72, FIG. 11, [0115]) facing the first capacitor electrode (71); and a dielectric film (73, FIG. 11, [0115]) disposed between the first capacitor electrode (71) and the second capacitor electrode (72). Regarding claim 13, Hattori as modified by Wada teaches the semiconductor device (300) according to claim 1. Hattori further teaches wherein the oxide semiconductor (10) comprises a random access memory (DRAM, [0092] noting transistor 300 includes the same oxide semiconductor as transistor 200, [0078]-[0081]). Regarding claim 14, Hattori as modified by Wada teaches the semiconductor device according to claim 1. Hattori further teaches wherein the oxide semiconductor (10) is formed of an amorphous material ([0068], noting transistor 300 includes the same oxide semiconductor as transistor 200, [0078]-[0081]). Regarding claim 15, Hattori as modified by Wada teaches the semiconductor device according to claim 1. Hattori further teaches wherein the oxide semiconductor (10) includes oxygen vacancies acting as a donor ([0051], noting the oxide semiconductor 10 in FIG. 6 is comprised of the same materials described with respect to the embodiment of FIG. 1, [0069], [0080]-[0082]). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Hattori et al. in US 2020/0381557 A1 (hereinafter Hattori) and Wada et al. in US 20210225847 A1 (hereinafter Wada), and further in view of Hattori in Chinese Patent Application Publication CN 112018190 A (hereinafter Hattori2). Regarding claim 16, Hattori as modified by Wada teaches the semiconductor memory device according to claim 12. Hattori does not explicitly teach wherein the first capacitor electrode (71) and the second capacitor electrode (72) contain at least one of tungsten or titanium nitride. Hattori teaches the first capacitor electrode (71) and the second capacitor electrode (72) include titanium oxide ([0115]), which is an insulator, but Hattori is silent regarding the electrically conductive material which makes up 71 and 72. Hattori2 teaches in FIG. 11 and related machine-translated text, a capacitor (201, line [503]) connected to a memory device (MC1, line [507]), wherein a first capacitor electrode (71, line [503]) and a second capacitor electrode (72, [503]) contain titanium nitride. Hattori and Hattori 2 are analogous art because they both are directed semiconductor memory devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hattori in view of Hattori2 because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hattori such that the first capacitor electrode and the second capacitor electrode contain titanium nitride, as taught by Hattori2, with the purpose of providing electrically conductive capacitor electrodes. One skilled in the art would understand capacitor electrodes require electrical conductivity, and titanium nitride is an electrically conducting material that is well known within the art. Response to Arguments Applicant’s remarks on page 6 regarding the status of the claims in the reply filed on 08/28/2025 are acknowledged. Applicant’s remarks on page 6 regarding the rejections made under 35 USC 112 in the Non-Final Office Action mailed on 05/29/2025 (hereinafter previous Office Action) are acknowledged. In response, the Examiner finds Applicant’s amendments to claims 2-4 and 8 sufficient to overcome the 112(a) rejections, and Applicant’s amendment to claim 5 sufficient to overcome the 112(b) rejection. Those rejections are hereby withdrawn in the Instant Office Action. Applicant’s arguments on pages 6-8 regarding the rejections made under 35 USC 102 and 103 are acknowledged. Specifically, Applicant argues on pages 7-8 that the combination of Hattori and Wada to not teach the limitation “a first oxide electrode disposed between the first oxide selector and the oxide semiconductor”. In the last paragraph of page 7 and into page 8, Applicant asserts “Wada does not disclose a first oxide electrode disposed between the first oxide selector and the oxide semiconductor”. In response, the Examiner finds this argument non persuasive. Wada was cited as teaching an oxide electrode 41 in contact with oxide semiconductor 501 with the stated purpose of reducing connection resistance in the transistor device (Wada, [0038]). Wada specifically teaches that since layer 41 has a similar composition to oxide semiconductor 501, the resistance of the device is reduced by having the two layers in contact. The Examiner’s position in the previous Office Action (and the Instant Office Action) is that modifying the device of Hattori to include a first oxide electrode in contact with the oxide semiconductor, as taught by Wada, would benefit the device of Hattori by reducing resistance. Although Wada does not teach a first oxide selector, the combined structure of Hattori and Wada teach the claimed limitation quoted above. Applicant further argues in the first full paragraph of page 8 “…even combining with Wada, no direct contact between the oxide semiconductor and first oxide electrode, as recited in amended claim 1, is disclosed”. The Examiner finds the argument non persuasive. Amended claim 1 does not recite direct contact between the oxide semiconductor and first oxide electrode. Applicant’s arguments on page 8 regarding dependent claims are moot since claims 1 and 2 are unpatentable over Hattori and Wada. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN LEE JOHNSON JR whose telephone number is (571)270-3217. The examiner can normally be reached Mon-Fri: 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at (571)272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S.L.J./Examiner, Art Unit 2811 /LYNNE A GURLEY/Supervisory Patent Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Feb 07, 2023
Application Filed
May 29, 2025
Non-Final Rejection mailed — §102, §103
Aug 28, 2025
Response Filed
Nov 06, 2025
Final Rejection mailed — §102, §103
Feb 05, 2026
Request for Continued Examination
Feb 15, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
60%
Grant Probability
82%
With Interview (+21.3%)
3y 9m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 704 resolved cases by this examiner. Grant probability derived from career allowance rate.

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