DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Acknowledgment is made of the amendment filed 12/02/2025, in which: claims 1 and 3-4 are amended; claim 2 is cancelled; claims 3, 8, and 11-20 stand withdrawn; and the rejection of the claims are traversed. Claims 1, 4-7, and 9-10 are currently pending an Office action on the merits as follows.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1, 4-7, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US Publication 20200233312) in view of Suzuki et al. (US Publication 20130168681).
Regarding independent claim 1, Kim teaches an overlay mark (fig. 8A, OVMa), comprising:
a first overlay mark (IB) disposed on a first layer (paragraph 0089, “inner box IB may be formed in a photoresist pattern”), and a second overlay (OB) mark disposed on a second layer (paragraph 0089, “outer box OB may be formed in a semiconductor layer”);
the first overlay mark comprises at least one first overlay sub-mark (one of the line patterns of IB, see paragraph 0090),
the second overlay mark comprises a second overlay sub-mark (one of the line patterns of OB, see paragraph 0090), and the second overlay sub-mark is in a center-symmetrical shape comprising a plurality of linear graphics (paragraph 0090, “the outer box OB may include four line patterns arranged at respective sides of a quadrangle”).
Kim does not teach wherein the first layer and the second layer are stacked; and each of the at least one first overlay sub-mark is circular in shape; wherein the first overlay mark is configured to measure an overlay error of a wafer required to be subjected to a circular hole-opening process, and the first overlay mark is formed at the same time as a circular hole is formed by filling conductive material in the circular hole during the circular hole-opening process; the first overlay mark is at least one conductive hole defined on the first layer for electrically connecting the first layer and the second layer.
Suzuki teaches wherein the first layer (fig. 1a, 50) and the second layer (20) are stacked; and
each of the at least one first overlay sub-mark (fig. 1b, 60a and 60b) is circular in shape;
wherein the first overlay mark is configured to measure an overlay error of a wafer required to be subjected to a circular hole-opening process, and the first overlay mark is formed at the same time as a circular hole is formed by filling conductive material in the circular hole during the circular hole-opening process (paragraph 0201, “an electrically-conductive part is formed within each of the openings 50a,50b”);
the first overlay mark is at least one conductive hole defined on the first layer for electrically connecting the first layer and the second layer (paragraph 0164, “electrically-conductive part in the opening 50a serves as a contact via 60a which connects between a circuit provided in a layer of the semiconductor structure portion and a circuit provided on the resin film”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the overlay mark of Kim and the first overlay mark of Liu in order to “directly expose the desired position of the photo-resist film to the light without using the photomask” (Suzuki paragraph 0206).
Regarding dependent claim 4, Suzuki further teaches the overlay mark according to claim [[2]] 1, wherein the number of the at least one first overlay sub-mark is two or more (fig. 1(b)), and the at least one first overlay sub-mark are distributed along a same circumference and disposed in a non-device area of the first layer (fig. 1(b)).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the overlay mark of Kim and the distribution of the first overlay mark of Suzuki per the reasons stated above in claim 1.
Regarding dependent claim 5, Suzuki further teaches the overlay mark according to claim 4, wherein a distance between every two adjacent ones of the at least one first overlay sub-mark is the same (fig. 1(b)).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the overlay mark of Kim and the distribution of the first overlay mark of Suzuki per the reasons stated above in claim 1.
Regarding dependent claim 6, Suzuki further teaches the overlay mark according to claim 4, wherein a distance between every two adjacent ones of at least two of the at least one first overlay sub-mark is the same (fig. 1(b)).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the overlay mark of Kim and the distribution of the first overlay mark of Suzuki per the reasons stated above in claim 1.
Regarding dependent claim 7, Kim further teaches the overlay mark according to claim 4, wherein the second overlay sub-mark is in a shape composed of a first group of linear graphics (see figure below) and a second group of linear graphics (see figure below), the first group of linear graphics comprising two first linear graphics parallel to each other (fig. 8A), the second group of linear graphics comprising two second linear graphics parallel to each other (fig. 8A), and the second linear graphics being perpendicular to the first linear graphics (fig. 8A).
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Regarding dependent claim 9, Kim further teaches the overlay mark according to claim 7, wherein neither of the two first linear graphics and the two second linear graphics are connected (fig. 8A).
Regarding dependent claim 10, Kim further teaches the overlay mark according to claim 7, wherein a projection of the first overlay mark on the second layer is located in a closed area enclosed by the second overlay mark (fig. 8A), and the projection of the first overlay mark does not intersect with the second overlay mark (fig. 8A).
Response to Arguments
Applicant’s arguments with respect to claims 1, 4-7, and 9-10 have been fully considered but are moot in view of the new grounds of rejection (Amendments).
Applicant’s arguments filed 12/02/2025 have been fully considered but are not persuasive.
Applicant argues on pages 8-10 of the instant Remarks: “Kim only discloses that an overlay mark OVMa includes an inner box IB and an outer box OB, and each of the inner box IB and the outer box OB may include four line patterns arranged at respective sides of a quadrangle. However, Kim does not disclose that the first overlay mark is formed at the same time as a circular hole is formed by filling conductive material in the circular hole during the circular hole-opening process, and does not disclose that the first overlay mark is at least one conductive hole defined on the first layer for electrically connecting the first layer and the second layer… Liu forms the hollow graphic features in the form of through-holes after the deep- hole process for the first layer 1 is completed. In contrast, the present application forms the first overlay mark at the same time as a circular hole is formed during the circular hole-opening process, which is fundamentally different from Liu's sequential process. Furthermore, Liu does not involve filling the first hollow sub-patterns 201 and the second hollow sub-patterns 202 with conductive material, and does not disclose that the first hollow sub- patterns 201 or the second hollow sub-patterns 202 serve as a conductive hole for electrically connecting the first layer 1 and second layer 2. That is, Liu fails to disclose "filling conductive material in the circular hole" and "the first overlay mark is at least one conductive hole defined on the first layer for electrically connecting the first layer and the second layer" of the present application.”
However, as stated above, Suzuki teaches wherein the first overlay mark (fig. 1b, 60a and 60b) is configured to measure an overlay error of a wafer required to be subjected to a circular hole-opening process, and the first overlay mark is formed at the same time as a circular hole is formed by filling conductive material in the circular hole during the circular hole-opening process (paragraph 0201, “an electrically-conductive part is formed within each of the openings 50a,50b”);
the first overlay mark is at least one conductive hole defined on the first layer (fig. 1(a), 50) for electrically connecting the first layer and the second layer (20, paragraph 0164, “electrically-conductive part in the opening 50a serves as a contact via 60a which connects between a circuit provided in a layer of the semiconductor structure portion and a circuit provided on the resin film”).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRACE Y CHA whose telephone number is (703)756-5393. The examiner can normally be reached Monday - Thursday 8:00 am - 5:00 pm and every other Friday 8:00 am - 4:00 pm.
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/GRACE CHA/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897