Office Action Predictor
Last updated: April 15, 2026
Application No. 18/169,555

SEMICONDUCTOR LIGHT EMITTING DEVICE

Final Rejection §103
Filed
Feb 15, 2023
Examiner
PARENDO, KEVIN A
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co., LTD.
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
2y 8m
To Grant
81%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
532 granted / 742 resolved
+3.7% vs TC avg
Moderate +10% lift
Without
With
+9.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
43 currently pending
Career history
785
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
47.5%
+7.5% vs TC avg
§102
21.0%
-19.0% vs TC avg
§112
27.1%
-12.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 742 resolved cases

Office Action

§103
DETAILED ACTION Claim Rejections - 35 USC § 103 The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action: (a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made. Claim(s) 6-15 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over US 2008/0157115 A1 (“Chuang”) (cited on IDS filed 2/15/23). Chuang teaches: PNG media_image1.png 335 437 media_image1.png Greyscale Chuang teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention: 6. A semiconductor light emitting device (Fig. 1B) comprising, in layers disposed in an order as follows: a semiconductor substrate 10 (para 21) comprising a first surface; a first metal layer 11 (“reflective layer,” para 18; e.g. In, Al, Au, Ag, etc., para 21); a second metal layer 12 (“bonding layer,” para 18) containing Au (para 21); an epitaxial growth layer (one or more of 13, 14, and 15, para 18; it is obvious that these are “epitaxial growth layers” as the epitaxy for layer 15 is discussed in para 20) containing Ga (at least 14 can comprise AlG, GaN, AlGaN, etc., see para 21); a semiconductor layer 17 (“current spreading layer”, para 22) containing Ga (17 can be semiconductor such as GaP, see para 22); a first electrode layer A (para 19) on the semiconductor layer; wherein the epitaxial growth layer has a first region that is an uneven surface (interpreting the epitaxial growth layer as 13/14/15, the “first region” that “is an uneven surface” may be reasonably interpreted as e.g. the portion of the top surface of 15 that is labeled as 153 and as 151, combined with the portion of the leftmost side surface of 13/14/15 and/or combined with the portion of the rightmost side surface of 13/14/15; this is an “uneven” surface because a portion of it is roughened and a portion is smooth), and the first region is formed to surround the semiconductor layer and the first electrode layer when viewed in a first direction perpendicular to the first surface (the “first region” as interpreted above is on both sides of A in the view shown in Fig. 1B; it thus laterally surrounds the middle portion of 17 and the entirety of A). 7. The semiconductor light emitting device according to claim 6, wherein a height of the uneven surface is lower than a height of the first electrode layer (Fig. 1B). 8. The semiconductor light emitting device according to claim 6, wherein the uneven surface is a frosting processing region (Merriam Webster dictionary defines “to frost” as “to produce a fine-grained slightly roughened surface on, such as metal or glass”; herein, the surface is roughened in this manner). 9. The semiconductor light emitting device according to claim 6, wherein the second metal layer comprises a first bonding layer and a second bonding layer, and a semiconductor substrate side of the semiconductor light emitting device and an epitaxial growth layer side of the semiconductor light emitting device are bonded to each other by bonding the first bonding layer and the second bonding layer (see para 21, wherein layer 12 can be made of various materials such as In, Sn, Al, Au, Ti, etc., “or the combination thereof.” One of ordinary skill in the art would have recognized that a combination of various materials would be done in layers, and as such, would be “a first bonding layer” and “a second bonding layer” that would thus meet the claimed limitations). It has been established that “the [obviousness] analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim” because the Office or “a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” KSR Int’ Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). It is also well settled that a reference stands for all of the specific teachings thereof as well as the inferences one of ordinary skill in the art would have reasonably been expected to draw therefrom. See In re Fritch, 972 F.2d 1260, 1264-65 (Fed. Cir. 1992). 10. The semiconductor light emitting device according to claim 6, wherein the semiconductor substrate is a silicon substrate (para 21). 11. A semiconductor light emitting device (Fig. 1B) comprising, in layers disposed in an order as follows: a semiconductor substrate 10 (para 21) comprising a first surface; a first metal layer 11 (“reflective layer,” para 18; e.g. In, Al, Au, Ag, etc., para 21); a second metal layer 12 (“bonding layer,” para 18) containing Au (para 21); an epitaxial growth layer (one or more of 13, 14, and 15, para 18; it is obvious that these are “epitaxial growth layers” as the epitaxy for layer 15 is discussed in para 20) containing Ga (at least 14 can comprise AlG, GaN, AlGaN, etc., see para 21); a semiconductor layer 17 (“current spreading layer”, para 22) containing Ga (17 can be semiconductor such as GaP, see para 22); and a first electrode layer A (para 19), wherein the epitaxial growth layer has a first region (interpreting the epitaxial growth layer as 13/14/15, the “first region” may be reasonably interpreted as e.g. the portion of the top surface of 15 that is labeled as 153 and as 151, combined with the portion of the leftmost side surface of 13/14/15 and/or combined with the portion of the rightmost side surface of 13/14/15) on which the semiconductor layer is not deposited (17 is not formed on the leftmost vertical surface of 13/14/15 or on the rightmost vertical surface of 13/14/15), and the first region has an uneven surface (the surface of the “first region”, as interpreted above, is an “uneven” surface because a portion of it is roughened and a portion is smooth). 12. The semiconductor light emitting device according to claim 11, wherein a height of the uneven surface is lower than a height of the first electrode layer (Fig. 1B). 13. The semiconductor light emitting device according to claim 11, wherein the uneven surface is a frosting processing region (Merriam Webster dictionary defines “to frost” as “to produce a fine-grained slightly roughened surface on, such as metal or glass”; herein, the surface is roughened in this manner). 14. The semiconductor light emitting device according to claim 11, wherein the second metal layer comprises a first bonding layer and a second bonding layer, and a semiconductor substrate side of the semiconductor light emitting device and an epitaxial growth layer side of the semiconductor light emitting device are bonded to each other by bonding the first bonding layer and the second bonding layer (see para 21, wherein layer 12 can be made of various materials such as In, Sn, Al, Au, Ti, etc., “or the combination thereof.” One of ordinary skill in the art would have recognized that a combination of various materials would be done in layers, and as such, would be “a first bonding layer” and “a second bonding layer” that would thus meet the claimed limitations). It has been established that “the [obviousness] analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim” because the Office or “a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” KSR Int’ Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). It is also well settled that a reference stands for all of the specific teachings thereof as well as the inferences one of ordinary skill in the art would have reasonably been expected to draw therefrom. See In re Fritch, 972 F.2d 1260, 1264-65 (Fed. Cir. 1992). 15. The semiconductor light emitting device according to claim 11, wherein the semiconductor substrate is a silicon substrate (para 21). Claim(s) 1-5 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over US 2008/0157115 A1 (“Chuang”) in view of US 2005/0236632 A1 (“Lai”) (cited on IDS filed 2/15/23). Chuang teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention: 1. A semiconductor light emitting device (Fig. 1B) comprising, in layers disposed in an order as follows: a semiconductor substrate 10 (para 21); a first metal layer 11 (“reflective layer,” para 18; e.g. In, Al, Au, Ag, etc., para 21); a second metal layer 12 (“bonding layer,” para 18) containing Au (para 21); an insulating layer 16 (“current blocking layer”, para 22; e.g. dielectrics such as BCB, SiO2, etc., para 22); an epitaxial growth layer (one or more of 13, 14, and 15, para 18; it is obvious that these are epitaxial growth layers as the epitaxy for layer 15 is discussed in para 20) containing Ga (at least 14 can comprise AlG, GaN, AlGaN, etc., see para 21); and a first electrode layer A (para 19) on the epitaxial growth layer; wherein the epitaxial growth layer has a first region that is an uneven surface (interpreting the epitaxial growth layer as 13/14/15, the “first region” that “is an uneven surface” may be reasonably interpreted as e.g. the portion of the top surface of 15 that is labeled as 153 and as 151, combined with the portion of the leftmost side surface of 13/14/15 and/or combined with the portion of the rightmost side surface of 13/14/15; this is an “uneven” surface because a portion of it is roughened and a portion is smooth), and does not overlap with the first electrode layer when viewed in a stacking direction (the “first region” as interpreted above is on both sides of A in the view shown in Fig. 1B; it thus laterally surrounds A without overlapping it in the stacking direction), and other layers are not deposited on at least a portion of the uneven surface of the first region (no layer is formed on the leftmost vertical side of 13/14/15 or the rightmost vertical side of 13/14/15). Chuang does not teach that the epitaxial growth layer is on the insulating layer. Lai teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention, in combination with Chuang, that the epitaxial growth layer (i.e. one or more of 340, 330, and 320) is on the insulating layer 352 (Fig. 10). PNG media_image2.png 316 362 media_image2.png Greyscale It would have been obvious to one of ordinary skill in the art at the time the invention was made to add the invention of Lai, including the order of the layers, specifically locating the current blocking layer 352 between the reflective metal layer and the epitaxial growth layer, to the invention of Chuang. The motivation to do so is that Lai recognizes that there are two embodiments wherein current blocking layers may be located (see Figs. 9 and 10; para 18-19), and would have been obvious to one of ordinary skill in the art that it is “obvious to try” the geometry (or layer order) of Fig. 10 rather than the geometry (or layer order) of Chuang (and Lai’s figure 9). At the time of the invention, there was a recognized need in the art for different geometries (see Figs. 9-10), Lai identified a finite number (two) of embodiments of the geometries, one would be able to implement both with a reasonable expectation of success (as the geometries are both disclosed clearly). See MPEP 2141, section III, KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398, 82 USPQ2d 1385 (2007). Chuang and Lai together further teach and/or would have suggested as obvious at the time of invention to one of ordinary skill in the art: 2. The semiconductor light emitting device according to claim 1, wherein a height of the uneven surface is lower than a height of the first electrode layer (Fig. 1B). 3. The semiconductor light emitting device according to claim 1, wherein the uneven surface is a frosting processing region (Merriam Webster dictionary defines “to frost” as “to produce a fine-grained slightly roughened surface on, such as metal or glass”; herein, the surface is roughened in this manner). 4. The semiconductor light emitting device according to claim 1, wherein the second metal layer comprises a first bonding layer and a second bonding layer, and a semiconductor substrate side of the semiconductor light emitting device and an epitaxial growth layer side of the semiconductor light emitting device are bonded to each other by bonding the first bonding layer and the second bonding layer (see para 21, wherein layer 12 can be made of various materials such as In, Sn, Al, Au, Ti, etc., “or the combination thereof.” One of ordinary skill in the art would have recognized that a combination of various materials would be done in layers, and as such, would be “a first bonding layer” and “a second bonding layer” that would thus meet the claimed limitations). It has been established that “the [obviousness] analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim” because the Office or “a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” KSR Int’ Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). It is also well settled that a reference stands for all of the specific teachings thereof as well as the inferences one of ordinary skill in the art would have reasonably been expected to draw therefrom. See In re Fritch, 972 F.2d 1260, 1264-65 (Fed. Cir. 1992). 5. The semiconductor light emitting device according to claim 1, wherein the semiconductor substrate is a silicon substrate (para 21). Response to Arguments Applicant's arguments with respect to the pending claims have been considered but are not persuasive. Applicant argues that the cited prior art does not teach the newly submitted claimed limitations, but the rejections to claims 1 and 6 have been changed to explain how they are indeed taught or obvious over Chuang or Chuang in view of Lai; and new claim 11 is rejected with similar explanation. Conclusion Applicant's amendment changed the scope of the claims and necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Parendo, who can be contacted by phone at (571) 270-5030 or by direct fax at (571) 270-6030. The examiner can normally be reached Monday through Friday from 9 am - 4 pm ET. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Billy Kraig, can be reached at (571) 272-8660. The fax number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Kevin Parendo/Primary Examiner, Art Unit 2896
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Prosecution Timeline

Feb 15, 2023
Application Filed
Mar 12, 2025
Non-Final Rejection — §103
Jul 09, 2025
Response Filed
Aug 25, 2025
Final Rejection — §103
Apr 08, 2026
Response after Non-Final Action

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3-4
Expected OA Rounds
72%
Grant Probability
81%
With Interview (+9.7%)
2y 8m
Median Time to Grant
Moderate
PTA Risk
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