Prosecution Insights
Last updated: April 19, 2026
Application No. 18/171,156

SEMICONDUCTOR DEVICE WITH WIRING LAYER AND CONDUCTIVE PORTION WITH PROTRUDING PORTION

Non-Final OA §102§103
Filed
Feb 17, 2023
Examiner
NGUYEN, DUY T V
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co. Ltd.
OA Round
5 (Non-Final)
79%
Grant Probability
Favorable
5-6
OA Rounds
2y 10m
To Grant
96%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
828 granted / 1052 resolved
+10.7% vs TC avg
Strong +17% interview lift
Without
With
+17.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
57 currently pending
Career history
1109
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
51.5%
+11.5% vs TC avg
§102
25.0%
-15.0% vs TC avg
§112
14.2%
-25.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1052 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 1. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 9/17/2011 has been entered. Status of the Application 2. Acknowledgement is made of the amendment received on 8/22/2025. Claims 25, 29 & 38-48 are pending in this application. Claims 1-24, 26-28 & 30-37 are canceled. Claims 38-48 are new. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 3. Claims 25, 29, 38-42 and 45 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ziglioli (US 2017/0338170). Re claim 38, Ziglioli teaches, under BRI, Fig. 1A, [0010, 0013-0017], a semiconductor device, comprising: -a semiconductor element (120) having an element front surface (top) and an element back surface (bottom) that face opposite from each other in a thickness direction (vertical direction); -a wiring layer (consider 110, 102) electrically connected to the semiconductor element (120); and -a sealing resin (130) covering the semiconductor element (120) and a portion of the wiring layer (110, 102), wherein the wiring layer (110, 102) has a wiring layer front surface (top surface, indicated) that faces the element back surface (of 120) and is electrically connected to the semiconductor element (120), and a wiring layer back surface (indicated) facing opposite from the wiring layer front surface in the thickness direction (vertical direction), and -the wiring layer back surface (indicated) includes a projecting portion (indicated) protruding in the thickness direction (vertical direction). PNG media_image1.png 438 785 media_image1.png Greyscale Re claim 25, Ziglioli teaches, Fig. 1A, [0016-0017], the wiring layer includes a surface thin layer metal covering layer (132 or 140). Re claim 29, Ziglioli teaches the wiring layer (110, 102) contains copper [0010]. Re claims 39 & 40, Ziglioli teaches, Fig. 1A, an internal electrode (110, 102, left or right 140) electrically connected to the semiconductor element (120); wherein the internal electrode (110, 102, 140) includes the wiring layer (110, 102) and a columnar portion (vertical portion of left or right 140). Re claim 41, Ziglioli teaches, Fig. 1A, the columnar portion (vertical portion of 140) has an exposed side surface (outside surface of vertical portion) exposed from the sealing resin (130) and facing in a first direction (horizontal direction) orthogonal to the thickness direction (vertical direction). Re claim 42, Ziglioli teaches, Fig. 1A, an external electrode (right 140 or 132) exposed from the sealing resin (130) and electrically connected to the internal electrode (110, 102, left 140). Re claim 45, Ziglioli teaches, Fig. 1A, the wiring layer (110, 102) includes a surface thin metal covering layer (132) in contact with the columnar portion (vertical portion of left or right 140). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 4. Claims 43 and 47 are rejected under 35 U.S.C. 103 as being unpatentable over Ziglioli in view of Abbott (US 2007/0176267). The teachings of Ziglioli have been discussed above. Re claim 42, Ziglioli does not teach the external electrode includes a first cover portion covering the exposed side surface of the columnar portion. Abbott teaches, Fig. 3, [0045-0046], the external electrode (302) includes a first cover portion covering the exposed side surface of the columnar portion (301). As taught by Abbott, one of ordinary skill in the art would utilize & modify the above teaching to obtain the external electrode includes a first cover portion covering the exposed side surface of the columnar portion as claimed, because it aids in maintaining package reliability and optimize resistance against delamination & warpage. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Abbott in combination with Ziglioli due to above reason. Re claim 47, Ziglioli/Abbott does not explicitly the column portion contains copper. Abbott does teach “the commonly selected starting metals are copper, copper alloys…” [0003]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Abbott to obtain the column portion contains copper as claimed, because copper is a known metal and commonly used in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416. 5. Claims 44 are rejected under 35 U.S.C. 103 as being unpatentable over Ziglioli in view of Hamaguchi et al. (US 5,821,762). The teachings of Ziglioli have been discussed above. Re claim 44, Ziglioli does not teach a conductive bonding material providing between the semiconductor element and the wiring layer to electrically bond the semiconductor element and the wiring layer to each other. Hamaguchi teaches, Fig. 18b, col. 25, 3rd par., a conductive bonding material (12) providing between the semiconductor element (3) and the wiring layer (10a, 10) to electrically bond the semiconductor element (3) and the wiring layer (10a, 10) to each other. As taught by Hamaguchi, one of ordinary skill in the art would utilize & modify the above teaching into Ziglioli to obtain a conductive bonding material providing between the semiconductor element and the wiring layer to electrically bond the semiconductor element and the wiring layer to each other as claimed, because it aids in achieving a high speed, high density and small sized and lower cost device. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Hamaguchi in combination with Ziglioli due to above reason. 6. Claims 46 are rejected under 35 U.S.C. 103 as being unpatentable over Ziglioli in view of Liu (US 2005/0093177). The teachings of Ziglioli have been discussed above. Re claim 46, Ziglioli does not teach one edge of the sealing resin and one edge of the columnar portion are flush with each other. Liu teaches, Fig. 2, [0019], one edge of the sealing resin (210) and one edge (at 280e) of the columnar portion (208) are flush with each other. As taught by Liu, one of ordinary skill in the art would utilize & modify the above teaching into Ziglioli to obtain one edge of the sealing resin and one edge of the columnar portion are flush with each other as claimed, because it aids in achieving a package at low price and high reliability. Further, it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Liu in combination with Ziglioli due to above reason. 7. Claim 48 is rejected under 35 U.S.C. 103 as being unpatentable over Ziglioli in view of Kobayashi et al. (US 2009/0183906). The teachings of Ziglioli have been discussed above. Re claim 48, Ziglioli does not teach the protecting portion has a tapering cross section as viewed in a direction orthogonal to the thickness direction. Kobayashi teaches, Figs. 3A & 3D, claim 7 & [0054], the protecting portion (22) has a tapering cross section (e.g., tapered shape) as viewed in a direction orthogonal to the thickness direction. As taught by Kobayashi, one of ordinary skill in the art would utilize & modify the above teaching to obtain the protecting portion has a tapering cross section as viewed in a direction orthogonal to the thickness direction as claimed, because it aids achieving a desired shape of the projecting portion. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kobayashi in combination with Ziglioli due to above reason. 8. Claims 25, 29, 38-40, 44, 45 and 47 are, alternatively, rejected under 35 U.S.C. 103 as being unpatentable over Hamaguchi et al. (US 5,821,762) in view of Ziglioli (US 2017/0338170). Re claim 38, Hamaguchi teaches, under BRI, Figs. 18b, c & 24, cols. 25 & 28, a semiconductor device, comprising: -a semiconductor element (3) having an element front surface (top) and an element back surface (bottom) that face opposite from each other in a thickness direction (horizontal direction); and -a wiring layer (10a, 17) electrically connected to the semiconductor element (3); wherein the wiring layer (10a, 17) has a wiring layer front surface (top surface, indicated) that faces the element back surface (of 3) and is electrically connected to the semiconductor element (3), and a wiring layer back surface (indicated) facing opposite from the wiring layer front surface in the thickness direction (horizontal direction), and -the wiring layer back surface (indicated) includes a projecting portion (17) protruding in the thickness direction (horizontal direction). PNG media_image2.png 189 380 media_image2.png Greyscale PNG media_image3.png 250 336 media_image3.png Greyscale Hamaguchi does not teach a sealing resin covering the semiconductor element and a portion of the wiring layer. Ziglioli teaches, Fig. 1A, [0010, 0015], a sealing resin (130) covering the semiconductor element (120) and a portion of the wiring layer (consider 110, 102). As taught by Ziglioli, one of ordinary skill in the art would utilize & modify the above teaching to obtain a sealing resin covering the semiconductor element and a portion of the wiring layer as claimed, because it aids in enhancing protection to the formed device. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Ziglioli in combination with Hamaguchi due to above reason. Re claim 25, Hamaguchi teaches, Fig. 18c, the wiring layer include a surface thin metal covering layer (connector 11). Re claim 29, Hamaguchi teaches the wiring layer (10a, 17) contains copper (of 17) (col. 27, 4th par.). Re claims 39, 40 & 47, Hamaguchi teaches, Figs. 18b, 23 & 24, an internal electrode (10a, 17, 12) electrically connected to the semiconductor element (3), wherein the internal electrode includes the wiring layer (10a, 17) and a columnar portion (12), and wherein the columnar portion (12) contains copper (of 12b or 12c) (col. 28, 1st par.). Re claim 44, Hamaguchi teaches, Fig. 18b, col. 25, 3rd par., a conductive bonding material (12) providing between the semiconductor element (3) and the wiring layer (10a, 10) to electrically bond the semiconductor element (3) and the wiring layer (10a, 17) to each other. Re claim 45, Hamaguchi teaches, Fig. 18c, the wiring layer includes a surface thin metal covering layer (11) in contact with the columnar portion (12). 9. Claim 48 is rejected under 35 U.S.C. 103 as being unpatentable over Hamagushi as modified by Ziglioli as applied to claim 38 above, and in view of Kobayashi et al. (US 2009/0183906). The teachings of Hamaguchi/Ziglioli have been discussed above. Re claim 48, Hamaguchi/Ziglioli does not teach the protecting portion has a tapering cross section as viewed in a direction orthogonal to the thickness direction. Kobayashi teaches, Figs. 3A & 3D, claim 7 & [0054], the protecting portion (22) has a tapering cross section (e.g., tapered shape) as viewed in a direction orthogonal to the thickness direction. As taught by Kobayashi, one of ordinary skill in the art would utilize & modify the above teaching to obtain the protecting portion has a tapering cross section as viewed in a direction orthogonal to the thickness direction as claimed, because it aids achieving a desired shape of the projecting portion. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kobayashi in combination with Hamaguchi/Ziglioli due to above reason. Response to Arguments 10. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection. Response to arguments on newly added limitations are responded to in the above rejection. Conclusion 11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DUY T NGUYEN/Primary Examiner, Art Unit 2818 1/15/26
Read full office action

Prosecution Timeline

Feb 17, 2023
Application Filed
Feb 02, 2024
Non-Final Rejection — §102, §103
May 07, 2024
Response Filed
May 16, 2024
Final Rejection — §102, §103
Oct 21, 2024
Request for Continued Examination
Oct 24, 2024
Response after Non-Final Action
Feb 09, 2025
Non-Final Rejection — §102, §103
May 09, 2025
Response Filed
May 21, 2025
Final Rejection — §102, §103
Aug 22, 2025
Request for Continued Examination
Aug 26, 2025
Response after Non-Final Action
Jan 15, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
79%
Grant Probability
96%
With Interview (+17.1%)
2y 10m
Median Time to Grant
High
PTA Risk
Based on 1052 resolved cases by this examiner. Grant probability derived from career allow rate.

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