DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 7, 8, 10, and 11 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Watanabe et al. (US pub 20250006697).
With respect to claim 1, Watanabe et al. teach a semiconductor device, comprising (see figs. 1-6, particularly fig. 5 and associated text):
a plurality of stacked circuit dies 502a, 102b, 102c wherein a first stacked die of the plurality of stacked dies is located laterally to a second stacked die of the plurality of stacked circuit dies; and
an enclosure 160,560 located at least partially above a top tier of the plurality of stacked circuit dies, wherein the enclosure comprises a mold compound and/or heat spreader.
With respect to claim 2, Watanabe et al. teach the plurality of stacked circuit dies includes at least one lower tier 102b of one or more additional circuit dies. See fig. 5 and associated text.
With respect to claim 3, Watanabe et al. teach an additional mold compound (material between 102b,102c) introduced into the at least one lower tier of the plurality of stacked circuit dies, wherein the additional mold compound is different from the mold compound introduced into the top tier of the plurality of stacked circuit dies. See fig. 5 and associated text.
With respect to claim 4, Watanabe et al. teach the enclosure includes a heat spreader 560 attached to one or more circuit dies included in the top tier of the plurality of stacked circuit dies. See fig. 5 and associated text.
With respect to claim 7, Watanabe et al. teach the heat spreader is continuous vertically. See fig. 5 and associated text.
With respect to claim 8, Watanabe et al. teach the enclosure includes an extension of the mold compound above one or more circuit dies included in the top tier of the plurality of stacked circuit dies. See fig. 5 and associated text.
With respect to claim 10, Watanabe et al. teach the top tier of the plurality of stacked circuit dies are separated by an insulating compound not deposited using chemical vapor deposition. Note that since the claimed invention is directed a device, how the compound is made has not been given patentable weight. See fig. 5 and associated text.
With respect to claim 11, Watanabe et al. teach the semiconductor device does not include any dielectric gap filler introduced using chemical vapor deposition between one or more circuit dies included in the top tier of the plurality of stacked circuit dies. Note that since the claimed invention is directed a device, how the compound is made has not been given patentable weight. See fig. 5 and associated text.
Claim(s) 12 and 14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Watanabe et al. (US pub 20250006697).
With respect to claim 12, Watanabe et al. teach a semiconductor device, comprising (see figs. 1-6, particularly fig. 5 and associated text):
a mold compound 160 located between a top tier 40 of a plurality of stacked circuit dies 502a, 102b, 102c, wherein a first stacked die of the plurality of stacked dies is located laterally to a second stacked die of the plurality of stacked circuit dies; and
a heat spreader 560 attached to one or more circuit dies included in the top tier of the plurality of stacked circuit dies,
wherein the mold compound 130 and the heat spreader 560 form an enclosure of the top tier of the plurality of stacked circuit dies.
With respect to claim 14, Watanabe et al. teach the mold compound comprises a non-dielectric insulator (encapsulant) introduced between the one or more circuit dies included in the top tier of the plurality of stacked circuit dies. See fig. 5 and associated text.
Allowable Subject Matter
Claims 21-26 are allowed.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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LONG . PHAM
Examiner
Art Unit 2823
/LONG PHAM/Primary Examiner, Art Unit 2897
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