Prosecution Insights
Last updated: April 19, 2026
Application No. 18/176,496

REDUCING A NUMBER OF COMMANDS TRANSMITTED TO A CO-PROCESSOR BY COMBINING REGISTER-SETTING COMMANDS WITH SAME AND CONTINUOUS REGISTER ADDRESSES

Final Rejection §101§112
Filed
Mar 01, 2023
Examiner
HUISMAN, DAVID J
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Glenfly Tech Co. Ltd.
OA Round
2 (Final)
58%
Grant Probability
Moderate
3-4
OA Rounds
4y 8m
To Grant
92%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allow Rate
389 granted / 670 resolved
+3.1% vs TC avg
Strong +34% interview lift
Without
With
+33.8%
Interview Lift
resolved cases with interview
Typical timeline
4y 8m
Avg Prosecution
88 currently pending
Career history
758
Total Applications
across all art units

Statute-Specific Performance

§101
6.1%
-33.9% vs TC avg
§103
33.6%
-6.4% vs TC avg
§102
21.5%
-18.5% vs TC avg
§112
31.7%
-8.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 670 resolved cases

Office Action

§101 §112
DETAILED ACTION Claims 1-4 have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. For future reference, when making amendments, arguments, etc., please refer to the paragraph numbers in the filed specification, not in the published specification (e.g. instead of amending paragraph 40, applicant should have amended paragraph 38). When some of the paragraph numbers differ between the specifications, as they do in this case, confusion may result. Claim Recommendations The examiner recommends the following for improved/easier readability: In claim 1, lines 4-5, rewording to --generating, by a central processor, a plurality of original register setting commands, wherein…--. In claim 1, line 9-10, rewording to --merging, by the central processor, the first original setting commands to generate at least one merged register setting command; and--. In claim 1, lines 11-12, rewording to --transmitting, by the central processor, the at least one merged register setting command to the co-processor,--. In claim 1, line 17, inserting --the-- before “sorting”. A similar recommendation is made for claim 4. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-4 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims recite the following limitations for which there is a lack of antecedent basis: In claim 1 (and similarly claim 3), 2nd to last paragraph, “the setting commands” because it is not clear which setting commands applicant is referring to. There are original setting commands (line 4), first original setting commands (lines 6-7), and a plurality of setting commands (2nd to last paragraph, line 3). Applicant should make use of adjectives/descriptors to more clearly distinguish these sets. It appears applicant may be trying to claim “…combining a plurality of the original register setting commands having a plurality of setting targets having addresses of a same register into a combined register setting command”. In claim 1 (and similarly claim 3), last paragraph, “the register setting commands” because it is not clear which register setting commands applicant is referring to. There are original register setting commands (line 4), first original register setting commands (lines 6-7), and a plurality of setting commands (last paragraph, lines 2-3). Applicant should make use of adjectives/descriptors to more clearly distinguish these sets. It appears applicant may be trying to claim “…combining a plurality of register setting commands having a plurality of setting targets having continuous addresses of a plurality of registers in the middle command group into the at least one merged register setting command”. Claims 2 and 4 are rejected due to their dependence on an indefinite claim. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-4 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Regarding step 1 of the Subject Matter Eligibility Test (hereafter “SMET”) (MPEP 2106(III)), claims 1-2 are directed to a process, and claims 3-4 are directed to a machine. Referring to step 2A (prong 1) of the SMET (MPEP 2106.04(II)(A)), claim 1 recites generating a plurality of original register setting commands, wherein each of the original register setting commands is adapted to set at least one bit of at least one register of a co-processor, the original register setting commands comprise a plurality of first original register setting commands, and a plurality of setting targets of the first original register setting commands have address continuity; merging the first original register setting commands to generate at least one merged register setting command; wherein the operation of merging the first original register setting commands comprises: sorting the original register setting commands according to addresses of the setting targets of the original register setting commands; performing a first combination operation to organize the original register setting commands into a middle command group after sorting is completed, wherein the first combination operation comprises combining a plurality of setting commands with the setting targets having addresses of a same register in the original register setting commands into a combined register setting command; and performing a second combination operation to organize the middle command group into a merged command group, wherein the second combination operation comprises combining a plurality of register setting commands with the setting targets having continuous addresses of a plurality of registers in the middle command group into the at least one merged register setting command. All of these steps amount to a mental process that can be practically performed in the human mind, including with the aid of pen and paper. See MPEP 2106.04(a). For instance, the claimed commands could be generated by a human as shown in Table 7 of applicant’s specification. As explained by applicant, such commands would set a coprocessor register bit, have address continuity, etc. These commands can then be sorted as shown in Table 8, combined as part of a first combination operation shown in Table 9, and then combined as part of a second combination operation shown in Table 10. A human can perform each of these steps. For instance, for the first combination operation, the example given requires recognizing that the SetRMask commands in sorted Table 8 that write to group 1, register 2 (“1,2”) write to different portions of register 2, e.g. the first command writes “78” to a low portion of register 2; the last “1,2” command writes “1” to an upper portion of register 2, and the remaining “1,2” commands write to other unique portions of register 2. A human can mentally recognize this pattern of sequential writes to different portions of the same register such that they can be combined into a single command, e.g. see Table 9, where all “1,2” commands from Table 8 are combined into a single “1,2” command. Referring to step 2A (prong 2) of the SMET (MPEP 2106.04(II)(A)), claim 1 recites the following additional elements: the claimed generating and merging are performed by a central processor; and; transmitting the at least one merged register setting command to the co-processor by the central processor. Additional element (a) corresponds to merely using a generic computer as a tool to perform the abstract idea (mental process), which, per the courts, does not integrate the abstract idea into a practical application (MPEP 2106.04(d)(I), 6th bullet). Additional element (b) also corresponds to merely using a generic computer as a tool to perform the abstract idea (a CPU connected to a co-processor (e.g. graphics processor per claim 2) via a transmission bus is highly generic). Thus, similar to above, the element does not integrate the abstract idea into a practical application. Alternatively, element (b) corresponds to insignificant post-solution activity that is incidental to the mental process and which is a nominal/tangential addition to the claim. Per the courts, such activity does not integrate the abstract idea into a practical application (MPEP 2106.04(d)(I), 7th bullet). Referring to step 2B of the SMET (MPEP 2106(III)): Additional elements (a) and (b) do not amount to significantly more, per the courts (MPEP 2106.05(I), 2nd element (i), and MPEP 2106.05(f)). Additional element (b) has also been deemed by the courts to be a well-understood, routine, and conventional activity that does not amount to significantly more (MPEP 2106.05(d)(II), element (i)). The examiner also takes Official Notice that a central processor sending a command to a co-processor was well-understood, routine, and conventional before applicant’s invention. For this reason as well, such transmission does not amount to significantly more. Thus, claim 1 is subject matter-ineligible (hereafter “SMI”). Referring to claim 2, applicant merely adds more generic computing elements that are part of a computer to perform the abstract idea, which, as stated above, does not integrate or amount to significantly more. Alternatively, applicant also appears to be attempting to generally link the mental process to a processor/GPU environment, where a GPU includes registers to store drawing/graphics data. Per the courts, this linking does not integrate (MPEP 2106.04(d)(I), 8th bullet), or amount to significantly more (MPEP 2106.05(I)(A), last element (iv))). Also, see MPEP 2106.05(h). Thus, claim 2 is SMI. Claims 3-4 are SMI for similar reasoning as claims 1-2, respectively. Note that where the central processor is claimed to perform various steps, this does not integrate or amount to significantly more for similar reasoning given above. Allowable Subject Matter Claims 1-4 are allowed over the prior art. The following is a statement of reasons for the indication of allowable subject matter: Regarding claims 1 and 3, the prior art of record has not taught, either individually or in combination, and together with all other claimed features, the operation of merging comprising the sorting, the performing of a first combination operation, and the performing of a second combination operation, as claimed. Response to Arguments On pages 9-10 of applicant’s response, applicant argues that the invention transmits fewer commands, thereby improving speed and performance of both the central processor and co-processor. Additionally, applicant argues that the invention reduces bandwidth needed to transmit the commands. The examiner acknowledges that transmitting merged commands would result in reduced traffic/bandwidth and number of commands that need to be processed by the coprocessor. Ultimately, however, the transmitting is not the source of improvement. The transmission logic will simply transmit whatever is sent to it, i.e., unmerged commands or merged commands. The improvement stems from the mental process itself, which merges commands to result in less data to transmit. Per MPEP 2106.05(a), “the judicial exception alone cannot provide the improvement… the improvement can be provided by the additional element(s) in combination with the recited judicial exception.” Applicant argues that claim 1 follows a similar fact pattern to Enfish and, thus, should not be treated as an abstract idea. The examiner respectfully disagrees. There is a clear mental process (merging, sorting, combining, etc.) set forth by claim 1. Enfish includes a self-referential for a computer database that amounts to an improvement, and includes a claim deemed to not include an abstract idea. In applicant’s claim 1, there are clear mental steps (abstract idea) and no structure equivalent to the self-referential data of Enfish to provide improvement. The improvement is rooted in the abstract idea itself. Regarding applicant’s comparison to example 47, this is not persuasive because the examiner sees a difference in examining network packets in real time (which a human cannot reasonably do given the speeds at which packets are transmitted), and merging example commands presented to a human using the described algorithms in applicant’s specification. There is nothing about real-time processing or high-volume data in the claims that would make the mental process impractical. Applicant’s argument related to examples 40 and 23 are not persuasive because applicant does not have claimed at least one additional element that realize(s) an improvement. Again, the examiner maintains that the improvement comes from the merging. All limitations apart from the mental process are either highly generic computing components or insignificant extra-solution activity. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David J. Huisman whose telephone number is 571-272-4168. The examiner can normally be reached on Monday-Friday, 9:00 am-5:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta, can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David J. Huisman/Primary Examiner, Art Unit 2183
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Prosecution Timeline

Mar 01, 2023
Application Filed
Sep 06, 2025
Non-Final Rejection — §101, §112
Nov 28, 2025
Response Filed
Feb 18, 2026
Final Rejection — §101, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
58%
Grant Probability
92%
With Interview (+33.8%)
4y 8m
Median Time to Grant
Moderate
PTA Risk
Based on 670 resolved cases by this examiner. Grant probability derived from career allow rate.

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