Prosecution Insights
Last updated: April 19, 2026
Application No. 18/176,987

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Non-Final OA §102
Filed
Mar 01, 2023
Examiner
AHMAD, KHAJA
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Toshiba Electronic Devices & Storage Corporation
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
750 granted / 928 resolved
+12.8% vs TC avg
Strong +27% interview lift
Without
With
+26.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
36 currently pending
Career history
964
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
58.3%
+18.3% vs TC avg
§102
28.7%
-11.3% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This office action is in response to the Applicant Election filled on 11/12/2025. Currently, claims 1-16 are pending in the application. Claims 7 and 9-16 have been withdrawn from consideration. Election/Restrictions Applicant's election without traverse of Group I and Species IB (Figures 1-2 and 3B), claims 1-5 and 8-9, in the reply filed on 11/12/2025 is acknowledged, there being no allowable generic or linking claims. Claims 6-7 and 10-16 have been withdrawn by the Applicant. However, claim 6 reads on the Group I and Species IB (Figures 1-2 and 3B) and claim 9 does not read on the Group I and Species IB (Figures 1-2 and 3B), rather claim 9 is directed to non-selected Species IF/IG (Figures 18-19). Thus, claims 1-6 and 8 have been examined, and claims 7 and 9-16 have been withdrawn by the Examiner. Claim Objections Claim 8 is objected to because of the following informalities: Where it recites “[nm]” in lines 2-3 should be “nanometers (nm)”. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-6 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by AOYAMA et al (US 20160079407 A1). Regarding claim 1, Figures 1-4 of AOYAMA disclose a semiconductor device comprising: a semiconductor layer (11, [0022]); a first insulating film (41, [0018]) provided on the semiconductor layer; a first electrode film (21a, [0029]) provided on the first insulating film; a second electrode film (21b, [0029]) provided on the first electrode film; and a first field plate electrode (31, [0029]) provided on the second electrode film, wherein a lower end of the first field plate electrode (31) is located on a second surface (top surface of 21a in the Figure) of the first electrode film (21a), the second surface being in contact with the second electrode film (21b), rather than a first surface (bottom surface of 21a in the Figure) of the first electrode film (21a), the first surface being in contact with the first insulating film (41). Regarding claim 2, Figures 1-4 of AOYAMA disclose that the semiconductor device according to claim 1, wherein the semiconductor layer (11) includes a nitride semiconductor layer ([0022]). Regarding claim 3, Figures 1-4 of AOYAMA disclose that the semiconductor device according to claim 1, wherein one of the first electrode film and the second electrode film has strong tensile stress, and the other has strong compressive stress ([0043]). Regarding claim 4, Figures 1-4 of AOYAMA disclose that the semiconductor device according to claim 1, wherein the first electrode film (21a, [0029]) and the second electrode film (21b) are films having different compositions ([0043]). Regarding claim 5, Figures 1-4 of AOYAMA disclose that the semiconductor device according to claim 1, wherein the first field plate electrode (31, [0029]) is embedded (Figures 2/4) in the second electrode film (21b). Regarding claim 6, Figures 1-4 of AOYAMA disclose that the semiconductor device according to claim 1, wherein the first field plate electrode (31) penetrates (Figures 2/4) the second electrode film (21b). Regarding claim 8, Figures 1-4 of AOYAMA disclose semiconductor device according to claim 1, wherein a minimum thickness and a maximum thickness of the first electrode film (21a) are 10 nanometers (nm) or more and 200 nanometers (nm) or less ([0031]). Examiner Notes A reference to specific paragraphs, columns, pages, or figures in a cited prior art reference is not limited to preferred embodiments or any specific examples. It is well settled that a prior art reference, in its entirety, must be considered for all that it expressly teaches and fairly suggests to one having ordinary skill in the art. Stated differently, a prior art disclosure reading on a limitation of Applicant's claim cannot be ignored on the ground that other embodiments disclosed were instead cited. Therefore, the Examiner's citation to a specific portion of a single prior art reference is not intended to exclusively dictate, but rather, to demonstrate an exemplary disclosure commensurate with the specific limitations being addressed. In re Heck, 699 F.2d 1331, 1332-33,216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968)). In re: Upsher-Smith Labs. v. Pamlab, LLC, 412 F.3d 1319, 1323, 75 USPQ2d 1213, 1215 (Fed. Cir. 2005); In re Fritch, 972 F.2d 1260, 1264, 23 USPQ2d 1780, 1782 (Fed. Cir. 1992); Merck& Co. v. BiocraftLabs., Inc., 874 F.2d 804, 807, 10 USPQ2d 1843, 1846 (Fed. Cir. 1989); In re Fracalossi, 681 F.2d 792,794 n.1, 215 USPQ 569, 570 n.1 (CCPA 1982); In re Lamberti, 545 F.2d 747, 750, 192 USPQ 278, 280 (CCPA 1976); In re Bozek, 416 F.2d 1385, 1390, 163 USPQ 545, 549 (CCPA 1969). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAJA AHMAD whose telephone number is (571)270-7991. The examiner can normally be reached on Monday-Friday, 8:00 AM - 5:00 PM (Eastern Time). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, GAUTHIER STEVEN B, can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice . Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KHAJA AHMAD/Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Mar 01, 2023
Application Filed
Dec 12, 2025
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+26.9%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allow rate.

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