DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) filed on March 2, 2023 is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: METHOD OF MANUFACTURING A VERTICAL SEMICONDUCTOR MEMORY DEVICE USING METAL MASK LAYERS.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed on April 19, 2023.
Election/Restrictions
Claims 17-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on October 24, 2025.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 9-11, 13-16, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kasahara (US 2021/0280431 A1) in view of Sato (US 2021/0074549 A1)
Claim 1, Kasahara discloses a method for manufacturing a semiconductor device (semiconductor device manufacturing method, [0010], Fig. 6D), comprising:
forming a mask material (mask material is formed, including resist mask RM, antireflection film 18, carbon film 16, metal-containing organic film 15, hereinafter, mask material RM/18/16/15, [0016] – [0018], Figs. 1A-1C) on a to-be-processed film (insulating film 12 is a film that is to-be-processed, hereinafter, to-be-processed film 12, [0018], Figs. 1C and 2C) above an underlying film (to-be-processed film 12 is above base layer 10, hereinafter, underlying film 10), the mask material RM/18/16/15 containing a first metal (15 contains a first metal (i.e. molybdenum or tungsten), [0050], Fig. 2B) and comprising a first mask layer (metal-containing organic film 15, hereinafter, first mask layer 15, [0019], Fig. 2B) and a second mask layer (carbon film 16, hereinafter, second mask layer 16, [0019], Fig. 2B), the first mask layer 15 is disposed on the to-be-processed film 12, the first mask layer 15 having a content of the first metal (i.e. molybdenum or tungsten) lower than a first predetermined percentage (15 has a content of the first metal lower than a first predetermined percentage), the second mask layer 16 disposed on the first mask layer 15 (16 is disposed on 15, [0049], Fig. 1C);
patterning the mask material RM/18/16/15 (RM/18/16/15 is patterned, [0019], Figs. 1C and 2A); and
processing the to-be-processed film 12 using the mask material RM/18/16/15 as a mask (12 is processed using RM/18/16/15 as a mask, [0023], Figs. 1A-2C),
wherein the processing the to-be-processed film 12 comprises performing a first treatment to process the to-be-processed film 12 at a first temperature in an atmosphere of a first gas (12 is processed by performing a first treatment process at a first temperature (i.e. 200oC) in an atmosphere of a first gas (i.e. impregnation gas into organic film 14 to form metal-containing organic film 15), [0020], Fig. 2B), and performing a second treatment to process the to-be-processed film 12 at a second temperature higher than the first temperature in an atmosphere of a second gas different from the first gas (second treatment performed 12 is being etched in an atmosphere of a second gas (i.e. etching gas) different from the first gas, the temperature of a reactive ion etching method is greater than the temperature of the first treatment process, [0023], Fig. 2C).
Kasahara does not explicitly disclose the second mask layer having a content of the first metal equal to or higher than the first predetermined percentage.
However, Sato discloses a second mask layer (Sato, third metal material 23, hereinafter, second mask layer 23, [0067], Fig. 16; Kasahara, second mask layer 16, [0019], Fig. 2B) having a content of the first metal (Sato, third metal material may be the same as the first metal material 21, [0067], Fig. 16; Kasahara, first metal (i.e. molybdenum or tungsten), [0050], Fig. 2C) equal to or higher than the first predetermined percentage (Sato, third metal material may be the same as (i.e. equal to) the first metal material 21, [0067], Fig. 16; Kasahara, first metal (i.e. molybdenum or tungsten), [0050], Fig. 2C). The combination of utilizing a second mask layer with an equal or higher amount of a first metal would also directly be dependent on the density of the resultant layer, a film having a higher density/metal amount would directly control the ability for a layer to function as an etching mask (Kasahara, [0034]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to utilize a second mask layer with an equal or higher amount of a first metal would also directly be dependent on the density of the resultant layer, a film having a higher density/metal amount would directly control the ability for a layer to function as an etching mask (Kasahara, [0034]).
Claim 2, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses further comprising performing the first treatment (Sato, first oxidation step, [0059] – [0060], Fig. 14; Kasahara, 12 is processed by performing a first treatment process, [0020], Fig. 2B) until a recess reaches a predetermined depth from an upper end of the to-be-processed film (Sato, first oxidation step removes buffer layer 5 and allows for a recess to reach a predetermined depth from an upper end of the processing workpiece 1, hereinafter, to-be-processed film 1, [0059], Fig. 14; Kasahara, RM/18/16/15 is patterned until a recess reaches a predetermined depth from an upper end of 12, [0019], Figs. 1C and 2A), and performing the second treatment until the recess reaches a lower end of the to-be-processed film (Sato, etching step, [0080], Fig. 20; Kasahara, second treatment performed until the recess reaches a lower end of 12, [0023], Fig. 2C).
Claim 3, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses further comprising performing the first treatment using the second mask layer as a mask (Sato, first oxidation step uses mask layer 2 as a mask, [0041], Fig. 14; Kasahara, 16 is used as a mask, [0019], Figs. 1C and 2A), and performing the second treatment using the first mask layer as a mask (Sato, etching step uses first mask layer 21, [0067] and [0080], Fig. 20; Kasahara, second treatment performed until the recess reaches a lower end of 12 and uses 15 as a mask, [0023], Fig. 2C).
Claim 4, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the first predetermined percentage is 10% (Sato, composition of first metal is approximately 10%, Fig. 6; Kasahara, concentration of the reactive (first metal) groups is equal to or higher than 5% (i.e. first predetermined percentage is 5-10% ), [0016], Fig. 1B).
Claim 10, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the first metal is tungsten (W) or molybdenum (Mo) (Sato, first metal includes tungsten, [0069]; Kasahara, first metal includes tungsten or molybdenum, [0050]).
Claim 11, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the mask material further contains carbon (C) (Sato, first organic material 20 and second organic material 50 are a part of the mask material further containing carbon, [0033], Fig. 2; Kasahara, CVD carbon film 16 is a part of the mask material and further contains carbon, [0016], Fig. 1B).
Claim 13, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the underlying film comprises silicon (Si) (Sato, substrate 10 is the underlying film and comprises silicon, [0030], Fig. 2; Kasahara, base layer 10 is the underlying film and comprises silicon, [0014], Fig. 1A).
Claim 14, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the mask material is formed using a material gas containing the first metal and halogen, and a reducing gas (Sato, mask material is formed using a material gas containing the first metal (i.e. tungsten), and halogen (i.e. chloride, fluorine), and a reducing gas, [0069]; Kasahara, mask material is formed using a material gas and a reducing gas (i.e. hydrogen), [0019]).
Claim 15, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the material gas contains tungsten and fluorine, and the reducing gas contains hydrogen (Sato, mask material is formed using a material gas containing the first metal (i.e. tungsten), and halogen (i.e. chloride, fluorine), and a reducing gas, [0069]; Kasahara, mask material is formed using a material gas and a reducing gas (i.e. hydrogen), [0019]).
Claim 16, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses further comprising removing the mask material (Sato, etching mask 2a is removed, [0080], Fig. 21; Kasahara, mask material RM/18/16/15 is removed, [0026], Fig. 3B).
Claim 19, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 1.
Kasahara/Sato discloses wherein the to-be-processed film includes a multi-layer stack (Sato, 1 includes a multi-layer stack of first layers 11 and second layers 11, [0081], Fig. 20; Kasahara, insulting films 32 and 33 are a to-be-processed film within stacked body SK, hereinafter, multi-layer stack SK, [0039], Fig. 5A).
Claim 20, Kasahara/Sato discloses the method for manufacturing a semiconductor device (Kasahara, semiconductor device manufacturing method, [0010], Fig. 6D; Sato, semiconductor manufacturing method, [0003], Fig. 21) according to claim 2.
Kasahara/Sato discloses further comprising forming a memory film in the recess (Sato, memory film 109 is formed in the recess, [0081], Fig. 21; Kasahara, memory film is formed in the memory hole 34, [0039], Fig. 6D).
Allowable Subject Matter
Claims 5-9 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the closest prior art of record, Kasahara (US 2021/0280431 A1), Sato (US 2021/0074549 A1), Yamazaki (US 2021/0020439 A1), fails to disclose the following limitations in combination with the rest of the claim.
Regarding claim 5, wherein a thickness of the first mask layer is 1 μm to 1.5 μm.
Regarding claim 6 (from which claim 7 depends), wherein the second mask layer comprises a third mask layer and a fourth mask layer, the third mask layer disposed on the first mask layer, the third mask layer having a content of the first metal equal to or lower than a second predetermined percentage, the fourth mask layer disposed on the third mask layer and having content of the first metal higher than the second predetermined percentage, and wherein the second predetermined percentage is higher than the first predetermined percentage.
Regarding claim 8, wherein the first temperature is not more than 0oC, and the second temperature is more than 0oC.
Regarding claim 9, wherein the first gas contains hydrogen (H2) at a higher concentration than the hydrogen concentration of the second gas.
Regarding claim 12, wherein the selectivity ratio of the to-be-processed film to the underlying film in the second treatment is higher than the selectivity ratio of the to-be-processed film to the underlying film in the first treatment.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yamazaki (US 2021/0020439 A1) discloses a method of manufacturing a semiconductor device wherein a thickness of the first mask layer is 0.4 μm ([0029], Figs. 1-3).
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/CHEVY J BOEGEL/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812