DETAILED ACTION
This Office Action is in response to Amendment filed November 13, 2025.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicants’ election without traverse of Species A drawn to a semiconductor device including the feature recited in new claim 21 in the reply filed on January 29, 2026 is acknowledged.
Claim Objections
Claims 1 and 20 are objected to because of the following informalities: on line 13 of claim 1 and on line 16 of claim 20, "that" should be replaced with "chemical composition", because (a) the pronoun "that" implies "the chemical composition", and (b) therefore, when strictly interpreted, the pronoun "that" would lack the antecedent basis. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7, 11, 16-18, 20, 21 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Makala et al. (US 2014/0273373)
Regarding claim 1, Makala et al. disclose a semiconductor device (Figs. 14C-14E), comprising: first electrode (SL 102 in Fig. 14D-14E) ([0102]); a second electrode (202) ([0102]); a semiconductor layer (one of CHANNEL 1 in Fig. 14D) ([0102]) between the first electrode and the second electrode; a gate electrode (one of GATE 3 in Fig. 14D) surrounding the semiconductor layer; a gate insulating layer (vertical portion of one of GATE DIELECTRIC FILM 13 in direct contact with CHANNEL 1 in Fig. 14D, see illustration below) between the gate electrode and the semiconductor layer, because (a) Applicants do not specifically claim what the gate insulating layer is formed of, and what it looks like, (b) therefore, the GATE DIELCTRIC FILM 13 can be construed as four insulating layers in the cross sectional illustration, each of which is in direct contact with four sides of the GATE 3 in Fig. 14D, and (c) in addition, the limitation “gate insulating layer” is directed to a product by process limitation, and also directed to an intended use of a portion of the GATE DIELECTRIC FILM 13 that insulates the GATE, the gate insulating layer being separated from the first electrode; a first insulating layer (bottom horizontal portion of one of GATE DIELECTRIC FILM 13 outside of gate insulating layer) between the first electrode and the gate electrode, the gate insulating layer (vertical portion of one of GATE DIELECTRIC FILM 13 in direct contact with CHANNEL 1 in Fig. 14D) being between first insulating layer and the semiconductor layer; and a second insulating layer (bottommost ISOLATION 121 or DIELECTRIC 53) between the first electrode (102) and the first insulating layer, wherein the semiconductor layer (1) directly contacts both the second insulating layer and the first electrode, and the gate insulating layer (vertical portion of one of GATE DIELECTRIC FILM 13 in direct contact with CHANNEL 1 in Fig. 14D) directly contacts both the semiconductor layer (1) and the gate electrode (3).
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Makala et al. differ from the claimed invention by not showing that the semiconductor layer is an oxide semiconductor layer, and the second insulating layer is different in chemical composition from that of the first insulating layer.
Makala et al. further disclose in paragraph [0046] that “Any suitable semiconductor materials can be used for semiconductor channel 1, for example silicon, germanium, silicon germanium, indium antimonide, or other compound semiconductor materials, such as III-V or II-VI semiconductor materials.”
Therefore, it would have been to one of ordinary skill in the art before the effective filing date of the claimed invention that the semiconductor layer disclosed by Makala et al. can be an oxide semiconductor layer, because (a) an oxide semiconductor material such as ZnO, InZnO and InGaZnO have been well-known and commonly employed II-VI semiconductor materials among the III-V semiconductor materials mentioned by Makala et al. for a channel layer material for forming a transistor device , and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the second insulating layer can be different in chemical composition from that of the first insulating layer, because (a) Makala et al. used distinct markings or hatches for the first insulating layer, which is the bottom portion of one of the GATE DIELECTRIC FILM 13, and the second insulating layer, which is the bottommost ISOLATION 121 or DIELECTRIC 53, (b) Applicants do not specifically claim how different the first and second insulating layer should be to be “different in chemical composition,” and therefore, for example, even a silicon oxide of SiO1.9 and silicon dioxide of SiO2 can be referred to be “different in chemical composition” from each other, (c) Makala et al. do not disclose that the first and second insulating layer should have an exactly identical chemical composition, and therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the first and second insulating layer can be different in chemical composition since the functions of the first and second insulating layer are different from each other, and therefore, each of the first and second insulating layer should be independently formed of insulating materials that are optimal for the respective function of the first and second insulating layer, which would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, for example, the first insulating layer can be formed of silicon oxide and the second insulating layer can be formed of silicon nitride, and (d) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Regarding claims 2-7, Makala et al. further disclose that the first insulating layer (bottom portion of one of GATE DIELECTRIC FILM 13) surrounds a first region (arbitrary region) of the oxide semiconductor layer (1), the second insulating layer (bottommost ISOLATION 121 or DIELECTRIC 53) surrounds a second region (another arbitrary region) of the oxide semiconductor layer, and the second region of the oxide semiconductor layer (1) is in direct contact with a surface of the first electrode (102), because the verb to “surround” does not necessarily suggest that the first region has the same thickness with the first insulating layer, and the second region has the same thickness with the second insulating layer (claim 2), wherein a width of the second region (another arbitrary region) of the oxide semiconductor layer (1) in a direction parallel to the surface of the first electrode (102) is greater than a width of the first region (arbitrary region) of the oxide semiconductor layer in the direction parallel to the surface of the first electrode, because (a) the first and second region can be arbitrarily selected to meet the claim limitations of claim 3, and (b) the CHANNEL 1 is wider in an area that is in contact with the bottom surface of the bottommost INSULATION 121 and inside the DIELECTRIC 53, which can be referred to as the second region (claim 3), wherein the width of the second region (another arbitrary region) is greater than a width of a third region (yet another arbitrary region) of the oxide semiconductor layer (1) in the direction parallel to the surface of the first electrode (102), the third region of the oxide semiconductor layer being in direct contract with the second electrode (202) (claim 4), further comprising: a third insulating layer (topmost ISOLATION 121 or unlabeled layer in contact with SGD 361 and upper select gate electrode 61, which should inherently be an insulating layer since otherwise SGD 361 and upper select gate electrode 61 would be shorted to CHANNEL 1) between the second electrode (202) and the gate electrode (one of GATE 3 in Fig. 14D), wherein the third region of the oxide semiconductor layer (1) is surrounded by the third insulating layer (claim 5), the width of the third region (yet another arbitrary region of CHANNEL 1) is less than the width of the second region (another arbitrary region of CHANNEL 1) (claim 6), and the width of the third region (yet another arbitrary region of CHANNEL 1) is substantially equal to the width of the first region (arbitrary region of CHANNEL), because (a) Applicants do not specifically claim what the phrase “substantially equal” implies, not to mention not specifically claiming what the “first region” and “third region” refer to, and (b) therefore, the first and third region can be arbitrarily selected from the CHANNEL 1 to meet the claim limitation (claim 7).
Regarding claim 11, Makala et al. differ from the claimed invention by not showing that a thickness of the second insulating layer between the first electrode and the first insulating layer is less than a thickness of the first insulating layer between the second insulating layer and the gate electrode.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that a thickness of the second insulating layer between the first electrode and the first insulating layer can be less than a thickness of the first insulating layer between the second insulating layer and the gate electrode, because (a) the respective thickness of the first and second insulating layer should be independently controlled and optimized to manufacture a semiconductor device having desired electrical characteristics as well as controlling the overall thickness of the semiconductor device, and (b) the respective thickness of the first and second insulating layer should also depend on the material compositions of the first and second insulating layer, and therefore, the thickness of the second insulating layer can be less than the thickness of the first insulating layer when, for example, the second insulating layer is formed of a material having a high dielectric constant, while the second insulating layer is formed of a low dielectric constant.
Regarding claim 16, Makala et al. differ from the claimed invention by not showing that the first electrode comprises indium, tin, and oxygen.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the first electrode can comprise indium, tin, and oxygen, because (a) an InSnO comprising indium, tin and oxygen has been commonly employed as an electrode material in manufacturing oxide semiconductor devices due to its compatibility with other oxide semiconductor materials, and due to its high conductivity and transparency, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Regarding claim 17, Makala et al. differ from the claimed invention by not showing that the second insulating layer comprises oxygen and at least one element selected from the group consisting of aluminum, beryllium, gallium, germanium, tin, lead, antimony, bismuth, zinc, and cadmium.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the second insulating layer can comprise the claimed material composition, because (a) oxide insulating layer materials such as aluminum oxide, gallium oxide and aluminum gallium oxide have been commonly employed in semiconductor industry for forming an insulating layer for oxide semiconductor-based devices due to their compatibility with oxide semiconductor materials and relatively high dielectric constant, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Regarding claim 18, Malaka et al. differ from the claimed invention by not showing that the second insulating layer comprises silicon and nitrogen, and the first insulating layer comprises silicon and oxygen.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the second insulating layer can comprise silicon and nitrogen, and the first insulating layer can comprise silicon and oxygen, because (a) an insulating layer formed of silicon nitride and a gate dielectric layer formed of silicon oxide have been commonly employed in semiconductor industry due to their well-known dielectric constants and ease of manufacturing processes, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Please refer to the explanations of the corresponding limitations discussed above.
Regarding claim 20, Malaka et al. disclose a semiconductor device (Figs. 14C-14E), comprising: a first electrode (102); a second electrode (202) spaced from the first electrode in a first direction (vertical direction); a semiconductor layer (1) extending from the first electrode to the second electrode in the first direction; a gate electrode (3) surrounding a first portion (arbitrary portion) of the semiconductor layer in a first plane perpendicular to the first direction; a gate insulating layer (vertical portion of 13 in direct contact with 1) between the gate electrode and the semiconductor layer in a second direction parallel to the first plane, the gate insulating layer being separated from the first electrode in the first direction; a first insulating layer (bottom portion of 13) between the first electrode (102) and the gate electrode (3) in the first direction, the gate insulating layer being between first insulating layer and the semiconductor layer in the second direction; and a second insulating layer (53 or 121) between the first electrode and the first insulating layer in the first direction, wherein the semiconductor layer (1) directly contacts both the second insulating layer and the first electrode, and the gate insulating layer (vertical portion of 13 directly in contact with 1) directly contacts both the semiconductor layer and the gate electrode (3).
Malaka et al. differ from the claimed invention by not showing that the semiconductor layer is an oxide semiconductor layer, and the second insulating layer is different in chemical composition from that of the first insulating layer.
Makala et al. further disclose in paragraph [0046] that “Any suitable semiconductor materials can be used for semiconductor channel 1, for example silicon, germanium, silicon germanium, indium antimonide, or other compound semiconductor materials, such as III-V or II-VI semiconductor materials.”
Therefore, it would have been to one of ordinary skill in the art before the effective filing date of the claimed invention that the semiconductor layer can be an oxide semiconductor layer, because (a) an oxide semiconductor material such as ZnO, InZnO and InGaZnO have been well-known and commonly employed II-VI semiconductor materials for a channel layer material for forming a transistor device , and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the second insulating layer can be different in chemical composition from that of the first insulating layer, because (a) Makala et al. used distinct markings or hatches for the first insulating layer, which is the bottom portion of one of the GATE DIELECTRIC FILM 13, and the second insulating layer, which is the bottommost ISOLATION 121 or DIELECTRIC 53, (b) Applicants do not specifically claim how different the first and second insulating layer should be to be “different in chemical composition,” and therefore, even a silicon oxide of SiO1.9 and a silicon dioxide of SiO2 can be referred to be “different in chemical composition”, (c) Makala et al. do not disclose that the first and second insulating layer should have an identical chemical composition, and therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the first and second insulating layer can be different in chemical composition since the functions of the first and second insulating layer are different from each other, and therefore, each of the first and second insulating layer should be formed of materials that are optimal for the respective function of the first and second insulating layer, which would have been obvious to one of ordinary skill in the art to be different from each other such as the first insulating layer formed of silicon oxide and the second insulating layer formed of silicon nitride, and (d) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Regarding claim 21, Malaka et al. differ from the claimed invention by not showing that the second insulating layer comprises aluminum oxide.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the second insulating layer can comprise the claimed material composition, because (a) oxide insulating layer materials such as aluminum oxide has been commonly employed in semiconductor industry for forming an insulating layer for oxide semiconductor-based devices due to their compatibility with oxide semiconductor materials and relatively high dielectric constant, and (b) it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use, In re Leshin, 125 USPQ 416.
Regarding claim 23, Malaka et al. differ from the claimed invention by not showing that a dielectric constant of the second insulating layer is higher than a dielectric constant of the first insulating layer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that a dielectric constant of the second insulating layer can be higher than a dielectric constant of the first insulating layer, because (a) the dielectric constants of the first and second insulating layer should be independently controlled and optimized, and (b) the first insulating layer, which is the bottom portion of the GATE DIELECTRIC FILM 13, can thus have a lower dielectric constant than the second insulating layer, which the DIELECTRIC 53 or the ISOLATION 121, since the ISOLATION 121 especially requires higher isolation between elements of the claimed semiconductor device than isolation between the CHANNEL 1 and the GATE 3.
Allowable Subject Matter
Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicants’ arguments with respect to claims 1 and 20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Saito et al. (US 10,714,629)
Shiokawa et al. (US 12,581,688)
Fujii (US 2024/0315043)
Shiokawa et al. (US 11,871,557)
Cheng et al. (US 10,461,184)
Xiao et al. (US 12,137,550)
Xiao (US 12,432,905)
Doornbos et al. (US 2021/0376157)
Wu et al. (US 12,507,419)
Tezuka et al. (US 10,312,239)
Applicants' amendment necessitated the new ground of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicants are reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C KIM whose telephone number is (571) 270-1620. The examiner can normally be reached 8:00 AM - 6:00 PM EST.
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/JAY C KIM/Primary Examiner, Art Unit 2815
/J. K./Primary Examiner, Art Unit 2815 March 24, 2026