Prosecution Insights
Last updated: April 18, 2026
Application No. 18/179,858

LATERAL SILICON BRIDGE FOR STACKED DIES

Non-Final OA §102§103
Filed
Mar 07, 2023
Examiner
NGUYEN, DAO H
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Advanced Micro Devices, Inc.
OA Round
3 (Non-Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
2y 1m
To Grant
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1137 granted / 1246 resolved
+23.3% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
29 currently pending
Career history
1275
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
30.6%
-9.4% vs TC avg
§102
55.6%
+15.6% vs TC avg
§112
5.1%
-34.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1246 resolved cases

Office Action

§102 §103
DETAILED ACTION 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to the communications dated 03/20/2026. Claims 1-20 are pending in this application. REMARKS 2. Applicant’s Arguments/Remarks have been fully considered, but are moot in view of the new ground of rejection. See below. Claim Rejections - 35 USC § 102 3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 4. Claims 1-4, 6-12, and 14-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by DAS et al. (US 2017/0092621) Regarding claim 1, DAS discloses a device comprising: a bottom die layer comprising at least a bottom die 2110 and a bridge die 2120 or 2130 (bridging between the die above and the die below, or between the adjacent dies; see also para. 0057) adjacent to the bottom die 2110 (see fig. 1B); and a top die layer 110 positioned on the bottom die layer and comprising a top die 110 that covers an entire surface area of all dies in the bottom die layer positioned under the top die. Regarding claim 2, DAS discloses the device of claim 1, wherein the bridge die 2120/2130 includes an interconnect extending through the bridge die and coupled to the top die 110. See fig. 1B. Regarding claim 3, DAS discloses the device of claim 2, wherein the interconnect corresponds to a through-silicon via (TSV). See fig. 1B. Regarding claim 4, DAS discloses the device of claim 1, wherein an area of the top die 110 exceeds an area of the bottom die 2110 and sidewalls of the top die extend beyond the bottom die and the bridge die. See fig. 1B. Regarding claim 6, DAS discloses the device of claim 1, wherein the bridge die 2130 corresponds to a passive device die. See fig. 1B, and paras. 0097-0099. Regarding claim 7, DAS discloses the device of claim 1, wherein the bridge die 2120 corresponds to an active device die. See fig. 1B, and paras. 0097-0099. Regarding claim 8, DAS discloses the device of claim 1, wherein the bridge die comprises a silicon structure. See paras. 0097-0099. Regarding claim 9, DAS discloses the device of claim 1, wherein the bottom die layer comprises a plurality of bridge dies 2120, 2130 adjacent to the bottom die. See Fig. 1B. Regarding claim 10, DAS discloses a system comprising: a substrate 1120 or 1110; a first die tier positioned on the substrate and comprising: a bottom die 2110; and a bridge die 2120 and/or 2130 adjacent to the bottom die and comprising an interconnect extending through the bridge die; and a second die tier 110 positioned on the first die tier and comprising a top die 110 that completely covers an entire surface area of all dies of the first die tier positioned under the top die. Regarding claim 11, DAS discloses the system of claim 10, wherein the interconnect corresponds to a through-silicon via (TSV). See fig. 1B. Regarding claim 12, DAS discloses the system of claim 10, wherein an area of the top die 110 exceeds an area of the bottom die 2110 and sidewalls of the top die extend beyond the bottom die and the bridge die. See fig. 1B. Regarding claims 14-17, DAS discloses the system comprising all claimed limitations. See the rejections of claims 6-9, respectively. Regarding claim 18, DAS discloses a method comprising: attaching, to a carrier wafer 180 or 1120, a first die tier comprising a bottom die 2110 and a bridge die 2120 and/or 2130; creating an interconnect through the bridge die (via interconnect structure; see paras. 0097-0099); bonding, to the first die tier, a second die tier 110 comprising a top die 110 that covers an entire surface area of all dies in the first die tier bonded to the top die; and removing the carrier wafer 180 or 1120. Regarding claim 19, DAS discloses the method of claim 18, further comprising coupling the top die 110 to the interconnect. See fig. 1B. Claim Rejections - 35 U.S.C. § 103 5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 6. Claims 5, 13, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over DAS (US 2017/0092621) in view of Mallik et al. (US 2020/0395313). Regarding claims 5, 13, DAS discloses the device of claim 1 comprising all claimed limitations, as discussed above, except for wherein the top die layer is hybrid bonded to the bottom die layer. Mallik discloses a device comprise top die layer comprising a top die 220 (right die 220 in fig. 2A) and a bottom die layer comprising a bottom die 230, wherein the top die layer is hybrid bonded to the bottom die layer. It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of DAS so that the top die layer being hybrid bonded to the bottom die layer, as that taught by Mallik, for the benefits such as lower contact resistance, higher electrical performance, lower parasitics, etc. Regarding claim 20, DAS/Mallik discloses the method of claim 18, obviously comprising all claimed limitations. See the rejections of claims 5, 13. Conclusion 7. A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the day of this letter. Failure to respond within the period for response will cause the application to become abandoned (see M.P.E.P 710.02(b)). A shortened time for reply may be extended up to the maximum six-month period (35 U.S.C. 133). An extension of time fee is normally required to be paid if the reply period is extended. The amount of the fee is dependent upon the length of the extension. Extensions of time are generally not available after an application has been allowed. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dao H. Nguyen whose telephone number is (571)272-1791. The examiner can normally be reached on Monday-Friday, 9:00 AM – 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke, can be reached on (571)272-1657. The fax numbers for all communication(s) is 571-273-8300. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-1633. /DAO H NGUYEN/Primary Examiner, Art Unit 2818 April 4, 2026
Read full office action

Prosecution Timeline

Mar 07, 2023
Application Filed
Aug 06, 2025
Non-Final Rejection — §102, §103
Oct 31, 2025
Response Filed
Jan 03, 2026
Final Rejection — §102, §103
Mar 20, 2026
Request for Continued Examination
Mar 26, 2026
Response after Non-Final Action
Apr 04, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+5.6%)
2y 1m
Median Time to Grant
High
PTA Risk
Based on 1246 resolved cases by this examiner. Grant probability derived from career allow rate.

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