DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-14, in the reply filed on September 3, 2025 is acknowledged. Claims 15-20 have been withdrawn. Action on the merits is as follows:
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 6 and 8-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JENG et al. (JENG) (US 2013/0147032 A1).
In regards to claim 1, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses a semiconductor device (item 130) comprising: a first interconnect (items 253 or 103I plus 103II, 201 plus 202 plus 203) including a first pad (items 202, 251, 103I, paragraph 38); and a second pad (items 103, 258, 258*, paragraph 36) provided on the first interconnect (items 253 or 103I plus 103II, 201 plus 202 plus 203), wherein the second pad (items 201, 258 or 258*) is in contact with another pad (items 104, 105, 257, 144 or 145), and the first pad (items 202, 251 or 103I, paragraph 38) is not in contact with another pad (items 104, 105, 257, 144 or 145).
In regards to claim 2, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein the first pad (items 202, 251, 103I, paragraph 38)is a pad for testing a device (item 100) electrically connected to the first pad (items 202, 251, 103I, paragraph 38). Examiner notes that “is a pad for testing a device electrically connected to the first pad” is intended use language.
It has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiated the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations (Ex parte Mashim, 2 USPQ2d 1647 (1987)).
In regards to claim 3, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein a portion (item 252 or 103II) of the first interconnect (items 253 or 103I plus 103II) other than the first pad (items 202, 251, 103I) includes a region (item 252) with a first width, and the first pad (items 202, 251, 103I) includes a region (item 251 or 103I) with a second width greater than the first width.
In regards to claim 4, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein the first pad (items 202, 251, 103I) is connected to a portion (items 252, 203) of the first interconnect (items 253 or 103I plus 103II, 201 plus 202 plus 203) other than the first pad (items 202, 251, 103I) only at a single point.
In regards to claim 6, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses an insulator (item 254) penetrating the first pad (item 251 plus 252 or 103I plus 103II).
In regards to claim 8, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein the second pad (items 201, 258, 258*)is provided on a portion (item 252) of the first interconnect (items 253 or 103I plus 103II, 201 plus 202 plus 203) other than the first pad (items 251, 202).
In regards to claim 9, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein the second pad (items 201, 258, 258*) is provided on the first interconnect (item 253 or 103I plus 103II) via a plug (item 257).
In regards to claim 10, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein the first pad (items 202, 251, 103I) is not in contact with a plug.
In regards to claim 11, JENG (paragraphs 39, 43, Figs. 1A, 1B, 2A-2C, 2E, 3A-3D and associated text) discloses wherein the first pad (items 202, 251, 103I) is provided at a level lower than the second pad (items 201, 258, 258*).
Claim(s) 1 and 12-14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by OH (US 2021/0257266 A1).
In regards to claim 1, OH (Figs. 4-6, 11-13 and associated text and items) discloses a semiconductor device (Figs. 4-6, 11-13) comprising: a first interconnect (items 51A or 53B) including a first pad (portion of items 51A or 53B); and a second pad (items TPAD1, TPAD 2, TPAD4, PAD1 ) provided on the first interconnect (items 51A or 53B), wherein the second pad (items TPAD1, TPAD 2, TPAD4, PAD1) is in contact with another pad (items PAD2, TPAD2, pads shown but not labeled within item W2 or W3 in other figures), and the first pad (portion of items 51A or 53B) is not in contact with another pad (items PAD2, TPAD2, pads shown but not labeled within item W2 or W3 in other figures).
In regards to claim 12, OH (Figs. 4-6, 11-13 and associated text and items) discloses a first insulator (shown but not labeled); K second insulators (shown but not labeled) provided on the first insulator (item W1), where K is an integer of one or more; K memory cell arrays (item 110 in W2 and W3) respectively provided in the K second insulators (items W2, W3); and a circuit (items TR1, TR2) provided in the first insulator (item W1) and configured to control the K memory cell arrays (item 110), wherein the first interconnect (items 51A or 53B), the first pad (portion of items 51A or 53B) and the second pad (items TPAD1, TPAD 2, TPAD4, PAD1 ) are provided in the first insulator (item W1) or in one of the second insulators.
In regards to claim 13, OH (Figs. 4-6, 11-13 and associated text and items) discloses wherein the second pad (items TPAD1, TPAD 2, TPAD4, PAD1 ) is provided at an interface between the first insulator (item W1) and one of the second insulators (items W2 or W3), or at an interface between two of the second insulators.
In regards to claim 14, OH (Figs. 4-6, 11-13 and associated text and items) discloses wherein the first pad (portion of items 51A or 53B) is not in contact with the interface.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over JENG et al. (JENG) (US 2013/0147032 A1).
In regards to claim 5, JENG does not specifically disclose wherein the first pad has a mesh shape as seen in plan view.
It would have been obvious to modify the invention to include a first pad having a mesh shape as seen in plan view for the purpose of design choice, since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art (In re Rose, 105 USPQ 237 (CCPA 1955)).
In regards to claim 7, JENG does not specifically disclose wherein the insulator has a width of 20 to 60 μm as seen in plan view.
It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the invention to include an insulator having a width of 20 to 60 μm as seen in plan view, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art (In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over JENG et al. (JENG) (US 2013/0147032 A1) in view of XU (US 2023/0054117 A1).
In regards to claim 5, JENG does not specifically disclose wherein the first pad has a mesh shape as seen in plan view.
XU (Figs. 2, 5, 6 and associated text) disclose pads (items 14, 15, 16) that have mesh shape as seen in plan view.
It would have been obvious to modify the invention to include a first pad having a mesh shape as seen in plan view for the purpose of design choice, since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art (In re Rose, 105 USPQ 237 (CCPA 1955)).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TELLY D GREEN whose telephone number is (571)270-3204. The examiner can normally be reached M-F 8am-5pm.
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TELLY D. GREEN
Examiner
Art Unit 2898
/TELLY D GREEN/Primary Examiner, Art Unit 2898 October 2, 2025