Prosecution Insights
Last updated: May 29, 2026
Application No. 18/184,005

PACKAGE CARRIER BOARD INTEGRATED WITH MAGNETIC ELEMENT STRUCTURE AND MANUFACTURING METHOD THEREOF

Final Rejection §103
Filed
Mar 15, 2023
Priority
Dec 23, 2022 — TW 111149707
Examiner
SHARMA, ADITYA
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Phoenix Pioneer Technology Co. Ltd.
OA Round
3 (Final)
90%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
19 granted / 21 resolved
+22.5% vs TC avg
Strong +15% interview lift
Without
With
+15.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
22 currently pending
Career history
41
Total Applications
across all art units

Statute-Specific Performance

§103
96.3%
+56.3% vs TC avg
§102
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 21 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim 1 have been considered but are not persuasive because the new ground of rejection relies on new reference applied in this office action to teach the amended solenoid-like coil structure limitation. Accordingly, the arguments do not overcome the rejection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 9854671 B1) and in further view of Gallina et al. (US 6549112 B1) Regarding Claim 1 – Lin teaches a package carrier board integrated with a magnetic element structure (Fig 4C, 120), comprising: a core layer (Fig 10A, 140 + 110 + 150), which has an opposite first surface and a second surface, and each of the first surface and the second surface has a patterned conductive circuit layer (Fig 10, the unlabeled circuits connected to the solder bumps 190, and described in col 8, lines 45 -50 which states that a circuit is placed between the layer 140 and layer 170); a magnetic element structure, comprising: a plurality of patterned magnetic conductive metal layers, which are stacked at intervals and embedded in the core layer, and each has at least one magnetic conductive metal (Fig 4C, 120-124); a plurality of patterned conductive coil layers, which are embedded in the core layer (Fig 8A, 162, 164, and 166); and a conductive connecting element, which is disposed through the core layer and electrically connects the first surface of the core layer and the patterned conductive circuit layer of the second surface (Fig 10A, 164 on the right showing connection between top and bottom surfaces). Lin does not explicitly disclose the plurality of patterned conductive coil layers are vertically stacked and connected to form a vertical solenoid-like inductive coil, and each layer of the plurality of patterned conductive coil layers is individually framed to surround a corresponding layer of the plurality of patterned magnetic conductive metal layers. Gallina teaches the plurality of patterned conductive coil layers are vertically stacked and connected to form a vertical solenoid-like inductive coil (Figs 2-3; layers 12, 14, 18, 22, vias 16, 20, 24; Gallina states “a series of concentric squares wound around a vertical axis with adjacent squares connected by a via”; see Gallina col 2 lines 57-67… col 3 lines 1-5), and each layer of the plurality of patterned conductive coil layers is individually framed to surround a corresponding layer of the plurality of patterned magnetic conductive metal layers (Figs 1, 4-7; 12, 14, 18, 22; Gallina states “a series of concentric squares…”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Lin with the plurality of patterned conductive coil layers are vertically stacked and connected to form a vertical solenoid-like inductive coil, and each layer of the plurality of patterned conductive coil layers is individually framed to surround a corresponding layer of the plurality of patterned magnetic conductive metal layers as taught by Gallina because Gallina expressly teaches that the benefit of such vertical solenoid inductors is “to provide a high power inductor which has a high inductance value L and high current capacities” and “to provide an inductor having a desirable combination of SRF and quality factor Q, but which requires minimum component volume”. Regarding Claim 2 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, wherein each patterned magnetic conductive metal layer has a plurality of magnetic conductive metal elements in block shape (Lin; Fig 10A; Definition of ‘block’ from Oxford Languages Dictionary – “a large solid piece of hard material, especially rock, stone, or wood, typically with flat surfaces on each side”), strip shape, or fin shape and fig 4c shows the conductive metal elements has a rectangular shape which would qualify as a block) Regarding Claim 3 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, wherein the patterned magnetic conductive metal layer is made of iron (Fe), nickel (Ni), cobalt (Co), zinc (Zn), an alloy containing at least two of them or more, or in an alloy doped with manganese (Mn), molybdenum (Mo), boron (B), copper (Cu) or vanadium (V) (Lin; Col 4, lines 33-39). Regarding Claim 6 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, wherein the patterned conductive coil layer is made of copper, copper alloy, nickel, or silver (Lin states “metal layer 160 includes copper, silver”; Lin forms the inductive coil conductors from that metal layer). Regarding Claim 12 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, further comprising: a first circuit build-up layer structure, which is disposed on the first surface of the core layer (Lin; Fig 10A, 140 & 162) and has a plurality of first insulating layers (Lin; Fig 10A, 140 & 170) and a plurality of first conductive circuit layers (Lin; Fig 10A, 162 and additional layers between 140 & 170), wherein the first conductive circuit layers are stacked and covered in the first insulating layer (Lin; Fig 10A, showing stacked configuration between 140 & 170); and a second circuit build-up layer structure, which is disposed on the second surface of the core layer (Lin; Fig 10A, 150 &166) and has a plurality of second insulating layers and a plurality of second conductive circuit layers, wherein the second conductive circuit layers are stacked and covered in the second insulating layer (Lin; Fig 10A, layers between 150 & 180). Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 9854671 B1) in view of Gallina et al. (US 6549112 B1) and in further view of Kondo et al. (US 20240177911 A1) Regarding Claim 4 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, but fails to disclose wherein the core layer is a plurality of insulating layers that are stacked, and its material includes organic photosensitive dielectric materials, organic non-photosensitive dielectric materials and/or inorganic oxide materials. Kondo wherein the core layer is a plurality of insulating layers that are stacked (Fig 2, 40), and its material includes organic photosensitive dielectric materials, organic non-photosensitive dielectric materials and/or inorganic oxide materials (Kondo [0021] states “stacking a plurality of insulating layers 40. The insulating material for the insulating layers 40 is not particularly limited, but includes, for example, borosilicate glass and an inorganic filler. Examples of the inorganic filler include a glass powder and a ceramic aggregate such as alumina”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Lin in view of Gallina with the core layer is a plurality of insulating layers that are stacked, and its material includes organic photosensitive dielectric materials, organic non-photosensitive dielectric materials and/or inorganic oxide materials as taught by Kondo because Kondo [0008] states “can reduce the shrinkage percentage of the inner electrode during firing, can improve the resolution at the time of photolithographic patterning, and can reduce the electrical resistance of the inner electrode after firing”. Claims 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 9854671 B1) in view of Gallina et al. (US 6549112 B1) and in further view of Lee et al. (US 20180061550 A1) Regarding Claim 7 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, but fails to disclose further comprising: a plurality of rigid support layers, which is embedded in the core layer and adjacent to the patterned conductive coil layers. Lee teaches a plurality of rigid support layers (Fig 2, 20), which is embedded in the core layer (Fig 2, 55) and adjacent to the patterned conductive coil layers (Fig 2, 41 & 42). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Lin in view of Gallina with a plurality of rigid support layers, which is embedded in the core layer and adjacent to the patterned conductive coil layers as taught by Lee to support the coil patterns and maintain rigidity (Lee [0078]). Regarding Claim 8 – Lin in view Gallina and Lee teaches the package carrier board integrated with a magnetic element structure of claim 7, wherein each rigid support layer has a plurality of support members in block shape, strip shape, or fin shape (Lee; Fig 2, Definition of ‘block’ from Oxford Languages Dictionary – “a large solid piece of hard material, especially rock, stone, or wood, typically with flat surfaces on each side”), strip shape, or fin shape. Regarding Claim 9 – Lin in view of Gallina and Lee teaches the package carrier board integrated with a magnetic element structure of claim 7, wherein the material of the rigid support layer is copper (Cu), stainless steel, ceramics, plastic steel, iron (Fe), nickel (Ni), cobalt (Co), zinc (Zn), containing two or more alloys, or alloys doped with manganese (Mn), molybdenum (Mo), boron (B), copper (Cu), or vanadium (V) (Lee [0078]). Regarding Claim 10 – Lin in view of Gallina and Lee teaches the package carrier board integrated with a magnetic element structure of claim 7, further comprising: a first circuit build-up layer structure, which is disposed on the first surface of the core layer (Lin; Fig 10A, 140 & 162) and has a plurality of first insulating layers (Lin; Fig 10A, 140 & 170) and a plurality of first conductive circuit layers (Lin; Fig 10A, 162 and additional layers between 140 & 170), wherein the first conductive circuit layers are stacked and covered in the first insulating layer (Lin; Fig 10A, showing stacked configuration between 140 & 170); and a second circuit build-up layer structure, which is disposed on the second surface of the core layer (Lin; Fig 10A, 150 &166) and has a plurality of second insulating layers and a plurality of second conductive circuit layers, wherein the second conductive circuit layers are stacked and covered in the second insulating layer (Lin; Fig 10A, layers between 150 & 180). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 9854671 B1) in view of Gallina et al. (US 6549112 B1) and Lee et al. (US 20180061550 A1) and in further view of Cho et al. (US 20220159839 A1) Regarding Claim 11 – Lin in view of Gallina and Lee teaches the package carrier board integrated with a magnetic element structure of claim 10, but fails to disclose wherein another magnetic element structure is embedded in the first circuit build-up layer structure and/or the second circuit build-up layer structure. Cho teaches another magnetic element structure is embedded in the first circuit build-up layer structure and/or the second circuit build-up layer structure (Fig 3, 200; Cho [0008] & [0038]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Lin in view of Gallina and Lee with another magnetic element structure is embedded in the first circuit build-up layer structure and/or the second circuit build-up layer structure as taught by Cho because Cho [0051] states “the plurality of magnetic members 200, inductance performance may be improved.”. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 9854671 B1) in view of Gallina et al. (US 6549112 B1) and in further view of Cho et al. (US 20220159839 A1) Regarding Claim 13 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 12, but fails to disclose wherein another magnetic element structure is embedded in the first circuit build-up layer structure and/or the second circuit build-up layer structure. Cho teaches another magnetic element structure is embedded in the first circuit build-up layer structure and/or the second circuit build-up layer structure (Fig 3, 200; Cho [0008] & [0038]). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Lin in view of Gallina with another magnetic element structure is embedded in the first circuit build-up layer structure and/or the second circuit build-up layer structure because Cho [0051] states “the plurality of magnetic members 200, inductance performance may be improved.”. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 9854671 B1) in view of Gallina et al. (US 6549112 B1) and in further view of Jeon et al. (US 20130337268 A1) Regarding Claim 7 – Lin in view of Gallina teaches the package carrier board integrated with a magnetic element structure of claim 1, but fails to disclose further comprising: a plurality of rigid support layers, which is embedded in the core layer and adjacent to the patterned conductive coil layers. Jeon teaches a plurality of rigid support layers, which is embedded in the core layer and adjacent to the patterned conductive coil layers (Fig 1, Jeon [0037-0038]; 110 & 131). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the core layer and the conductive patterned coil layers of Lin in view of Gallina with a plurality of rigid support layers, which is embedded in the core layer and adjacent to the patterned conductive coil layers as taught by Jeon to maintain rigidity (Jeon [0037] and [0038]). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. /ADITYA SHARMA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Mar 15, 2023
Application Filed
Jun 26, 2025
Non-Final Rejection mailed — §103
Oct 22, 2025
Response Filed
Jan 20, 2026
Non-Final Rejection mailed — §103
Apr 20, 2026
Response Filed
May 07, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

4-5
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+15.4%)
2y 9m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 21 resolved cases by this examiner. Grant probability derived from career allowance rate.

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