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DETAILED ACTION
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicant’s election without traverse of Species (Group I) in the reply filed 08/11/2025 is acknowledged, Claim 20 is withdrawn from further prosecution, and Claims 1-19 are prosecuted given their broadest reasonable interpretation in light of specification.
Response to Amendment
Applicant’s amendment to the specification and drawings has overcome each and every objection previously set forth in non-final office action dated 09/10/2025. Therefore, the objections have been withdrawn.
The Applicant originally submitted Claims 1-20 in the application, with Claim 20 withdrawn from consideration due to election/restriction requirement filed 08/11/2025. In the present response, the Applicant amended Claims 1, 3, 6-7 and 16-17, added a new Claim 21 and cancelled Claims 2, 4-5, 8 and 20. Accordingly, Claims 1, 3, 6-7, 9-19 and 21 are currently pending in the application.
Response to Arguments
Applicant’s Arguments/Remarks filled 12/04/2025, with respect to rejection of Claims 1 and 17 under 35 U.S.C. § 102(a)(1) and Claim 16 under 35 U.S.C. § 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further search and consideration a new grands of rejection has been set forth below necessitated by Applicant’s amendment to Claims 1 and 17.
Applicant’s argument with respect to Claim 7 is persuasive, therefore the rejection has been withdrawn.
Applicant’s argument with respect to the drawing objection has been fully considered, and are persuasive, the objection has been withdrawn.
Information Disclosure Statement
The information disclosure statement filed 11/13/2025 has been fully considered and is attached hereto.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3 and 17 are rejected under 35 U.S.C. § 103 as being unpatentable over Lyon (US 2017/0196116) in view of Chainer et al (US 2018/0098459).
Regarding Claim 1, Lyon (In Fig 2) discloses a cooling apparatus (100) comprising:
a microchannel structure (102/103/110/114) including a plurality of microchannels (103), (Fig 2), a base (102) over which the plurality of microchannels (103) are disposed, and a plurality of fins (110) spaced apart from each other and disposed over the base (102), (Fig 2); and
a manifold (109) disposed over the plurality of microchannels (103), (Fig 2),
wherein the microchannel structure (102/103/110/114) is directly bonded to a chip (107), (¶ 16, II. 4-9) and configured to dissipate heat generated in the chip (107) during an operation of the chip (107), (Fig 2), however Lyon does not disclose wherein a portion of the chip, or one or more of the fins, or both include one or more impurity elements.
Instead, Chainer (In Fig 1) teaches wherein a portion of the chip, or one or more of the fins (204a-204i), or both include one or more impurity elements (oxygen in aluminum nitride, ¶ 45, II. 1-9).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer with a portion of the chip, or one or more of the fins, or both include one or more impurity elements to benefit from providing an efficiently facilitate two-phase cooling of an electronic device (Chainer, ¶ 4, II. 7-10).
Regarding Claim 3, Lyon discloses the limitations of Claim 1, however Lyon (In Fig 2) further discloses wherein an adjacent pair of the fins (110) and a portion of the base (102) between the adjacent pair define a corresponding one (103) of the plurality of microchannels (103), (Fig 2).
Regarding Claim 17, Lyon (In Fig 2) discloses a semiconductor device (electronic device, ¶ 16, II. 1-3), comprising: a chip (107); and a cooling apparatus (100) configured to dissipate heat generated in the chip (107) during an operation of the chip (107), the cooling apparatus (100) including a plurality of microchannels (103) and a manifold (109) disposed over the plurality of microchannels (103), (Fig 2), a base (102) over which the plurality of microchannels (103) are disposed, (Fig 2), and a plurality of fins (110) spaced apart from each other and disposed over the base (102), (Fig2), and a manifold (109) disposed over the plurality of microchannels (103), (Fig 2), however Lyon does not disclose wherein a portion of the chip, or one or more of the fins, or both include one or more impurity elements.
Instead, Chainer (In Fig 1) teaches wherein a portion of the chip, or one or more of the fins (204a-204i), or both include one or more impurity elements (oxygen in aluminum nitride, ¶ 45, II. 1-9).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer with a portion of the chip, or one or more of the fins, or both include one or more impurity elements to benefit from providing an efficiently facilitate two-phase cooling of an electronic device (Chainer, ¶ 4, II. 7-10).
Claim 6 is rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer and further in view of Vafai et al (US 2023/0048534).
Regarding Claim 6, Lyon in view of Chainer discloses the limitations of claim 1, however Lyon as modified does not discloses wherein the impurity elements include Boron Arsenide or Boron Phosphorous.
Instead Vafai (In Fig 4) further teaches wherein the impurity elements (45, 47, 49, 51) include Boron Arsenide (¶ 62, II. 1-10) or Boron Phosphorous.
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Vafai with the impurity elements including Boron Arsenide to benefit from optimal distribution of a limited amount of high thermal conductivity material to enhance the heat removal of then integrated circuit (Vafai, ¶ 49, II. 1-8).
Claim 9 is rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer and further in view of Mohanta et al (US 2022/0146214).
Regarding Claim 9, Lyon in view of Chainer discloses the limitations of claim 3, however Lyon does not discloses wherein each of the plurality of microchannels has a rough surface.
Instead, Mohanta (In Fig 5) teaches wherein each of the plurality of microchannels (130) has a rough surface (Fig 5).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Mohanta with each of the plurality of microchannels having a rough surface to benefit from providing roughened surface resulting in more nucleation sites that could improve the heat transfer performance of the surface over similar smooth surface (Mohanta, ¶ 5, II. 6-9).
Claim 10 is rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer further in view of Mohanta and further in view of Pan (CN114583517).
For the purpose of citation, Examiner used machine translation of CN114583517, said translation has been provided herewith to the Applicant.
Regarding Claim 10, Lyon in Chainer and further in view of Mohanta discloses the limitations of claim 9, however Lyon as modified does not discloses wherein the apparatus further comprising a plurality of structures, each of the structures being disposed on a sidewall of a corresponding one of the fins and configured to oscillate toward and away from the sidewall.
Instead, Pan (In Figs 3-4) teaches wherein the apparatus further comprising a plurality of structures (11), (Fig 3), each of the structures (11) being disposed on a sidewall of a corresponding one of the fins (9) and configured to oscillate toward and away from the sidewall (¶ 7, II. 1-20), (Fig 4).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer further with Mohanta and further with Pan with a plurality of structures, each of the structures being disposed on a sidewall of a corresponding one of the fins and configured to oscillate toward and away from the sidewall to benefit from improving heat dissipation efficiency and effectively avoiding overheating (Pan, ¶ 5, II. 1-5).
Claims 11-12 are rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer and further in view of Zhou et al (US 11,849,569).
Regarding Claim 11, Lyon in view of Chainer discloses the limitations of claim 1, however Lyon as modified does not discloses wherein the plurality of microchannels includes a plurality of first microchannels completely penetrating a first plate and a plurality of second microchannels partially penetrating a second plate, the first plate being disposed over the second plate.
Instead Zhou (In Figs 3A-3C) teaches wherein the plurality of microchannels (41/42/43/44) includes a plurality of first microchannels (44) completely penetrating a first plate (plate accommodating 44) and a plurality of second microchannels (41) partially penetrating a second plate (plate accommodating 41), the first plate (plate accommodating 44) being disposed over the second plate (plate accommodating 41), (Fig 3A).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Zhou with the plurality of microchannels including a plurality of first microchannels completely penetrating a first plate, and plurality of second microchannels partially penetrating a second plate , and the first plate being disposed over the second plate to benefit from facilitating uniform thermal management and/or targeted heat transfer from heat generating devices to the coolant fluid, increasing overall operating life of the heat generating devices (Zhou, ¶ 5, II. 1-8).
Regarding Claim 12, Lyon in view of Chainer and further in view of Zhou discloses the limitations of claim 11, however Lyon as modified does not discloses wherein the first microchannels have substantially the same width and pitch as those of the second microchannels.
Instead, Zhou (In Figs 3A-3C) further teaches wherein the first microchannels (44) have substantially the same width and pitch as those of the second microchannels (41), (Fig 3C).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Zhou with the first microchannels having the same width and pitch as those of second microchannels to benefit from facilitating uniform thermal management and/or targeted heat transfer from heat generating devices to the coolant fluid, increasing overall operating life of the heat generating devices (Zhou, ¶ 5, II. 1-8).
Claim 13 is rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer further in view of Zhou and further in view of Andry et al (US 2006/0103011).
Regarding Claim 13, Lyon in view of Chainer and further in view of Zhou discloses the limitations of claim 11, however Lyon as modified does not discloses wherein the first microchannels have width and pitch that are greater than those of the second microchannels.
Instead, Andry (In Fig 5) teaches wherein the first microchannels (507a) have width and pitch that are greater than those of the second microchannels (506b).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Zhou and further with Andry with the first microchannels having width and pitch that are greater than those of the second micro channels to benefit from providing an integrated cooling module with efficient heat extraction for densely packed integrated circuits (Andry, ¶ 10, II. 6-9).
Claims 14-15 are rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer and further in view of Bezama et al (US 2010/0012294).
Regarding Claim 14, Lyon in view of Chainer discloses the limitations of claim 1, however Lyon as modified does not discloses wherein the manifold includes: an inlet main channel extending in a first direction and configured to receive a coolant fluid; a plurality of inlet subchannels coupled to the inlet main channel and extending in a second direction; an outlet main channel extending in the first direction and configured to discharge the coolant fluid; and a plurality of outlet subchannels coupled to the outlet main channel and extending in the second direction.
Instead, Bezama (In Fig 3E) teaches wherein the manifold (304) includes: an inlet main channel (307B) extending in a first direction and configured to receive a coolant fluid (¶ 26, II. 12-17); a plurality of inlet subchannels (307A) coupled to the inlet main channel (307B) and extending in a second direction (Fig 3E); an outlet main channel (308B) extending in the first direction and configured to discharge the coolant fluid (¶ 26, II. 12-17); and a plurality of outlet subchannels (308A) coupled to the outlet main channel (308B) and extending in the second direction (Fig 3E).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Bezama with the manifold including an inlet main channel extending in a first direction configured to receive coolant fluid and a plurality of inlet subchannels coupled to the inlet main channel and extending in a second direction, and an outlet main channel extending in the first direction and discharging coolant fluid, and plurality of outlet subchannels coupled to outlet main channel and extending in the second direction to benefit from circulating cooling fluid to achieve sufficient cooling of the chip to assure reliable operation of the device (Bezama, ¶ 4, II. 1-5).
Regarding Claim 15, Lyon in view of Chainer and further in view of Bezama discloses the limitations of claim 14, however Lyon as modified does not discloses wherein each of the inlet subchannels has a first width in the first direction that decreases along the second direction, and wherein each of the outlet subchannels has a second width in the first direction that increases along the second direction.
Instead, Bezama (In Fig 3E) further discloses wherein each of the inlet subchannels (307A) has a first width in the first direction that decreases along the second direction (Fig 3E), and wherein each of the outlet subchannels (308A) has a second width in the first direction that increases along the second direction (Fig 3E).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Bezama with each of the inlet subchannels having a first width in the first direction that decreases along the second direction, and each of the outlet subchannels having a with in the first direction that increases along the second direction to benefit from circulating cooling fluid to achieve sufficient cooling of the chip to assure reliable operation of the device (Bezama, ¶ 4, II. 1-5).
Claim 16 is rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Bezama and further in view of Neal et al (US 2020/0227341).
Regarding Claim 16, Lyon in view of Bezama discloses the limitations of claim 15, however Lyon as modified does not discloses wherein each of the outlet subchannels has a height in a third direction that increases along the second direction.
Instead, Neal (In Fig 6A) teaches wherein each of the outlet subchannels (105 b) has a height in a third direction that increases along the second direction (Fig 6A).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Bezama and further with Neal with each outlet subchannels having a height in a third direction that increases along the second direction to benefit from effectively dissipate the collected heat from the IC package (Neal, ¶ 29, II. 10-14).
Claims 18-19 are rejected under 35 U.S.C. § 103 as being unpatentable over Lyon in view of Chainer and further in view of Daikoku et al (US 6,351,384).
Regarding Claim 18, Lyon in view of Chainer discloses the limitations of claim 17, however Lyon as modified does not discloses wherein the device further comprising a substrate over which the chip is disposed; a cover coupled to the substrate to cover the cooling apparatus and the chip; and a plurality of mechanical seals disposed between the cover and the cooling apparatus.
Instead, Daikoku (In Fig 1) teaches wherein the device (multi-chip module cooling device, Col 5, II. 5-7) further comprising: a substrate (11) over which the chip (10) is disposed; a cover (30) coupled to the substrate (11) to cover the cooling apparatus (20/21/22/23) and the chip (10), (Fig 2); and a plurality of mechanical seals (33) disposed between the cover (30) and the cooling apparatus (20/21/22/23), (Fig 1).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Daikoku with the device further comprising a substrate over which the chip is disposed, and a cover coupled to the substrate to cover the cooling apparatus and the chip, and disposing a plurality of mechanical seals between the cover and the cooling apparatus to benefit from providing a cooling device which efficiently reduces the temperature of highly integrated LSI chips generating substantial heat which are densely mounted with superior productivity, enabling easier assembly and disassembly, protecting the LSI chips reliability (Daikoku Col 4, II. 10-15).
Regarding Claim 19, Lyon in view of Chainer and further in view of Daikoku discloses the limitations of claim 18, however Lyon as modified does not discloses wherein the manifold has an upper surface on which a plurality of columns are disposed, and the plurality of the mechanical seals are inserted into the plurality of columns, respectively.
Instead, Daikoku (In Fig 1) further teaches wherein the manifold (14/30) has an upper surface on which a plurality of columns (32) are disposed (Fig 1), and the plurality of the mechanical seals (33) are inserted into the plurality of columns (32), respectively (Fig 1).
It would have been obvious to an ordinary skilled person in the art before the effective filling date of the claimed invention to modify Lyon with Chainer and further with Daikoku with the manifold having an upper surface on which a plurality of columns are disposed, and the plurality of mechanical seals being inserted into the plurality of columns to benefit from providing a cooling device which efficiently reduces the temperature of highly integrated LSI chips generating substantial heat which are densely mounted with superior productivity, enabling easier assembly and disassembly, protecting the LSI chips reliability (Daikoku Col 4, II. 10-15).
Allowable Subject Matter
Claims 7 and 21 are allowed.
The following is an examiner’s statement of reasons for allowance:
With respect to Claims 7 and 21, the allowability resides in the overall structure of the device as recited in independent Claim 7 and at least in part because Claim 7 recites, “a flow distribution device configured to control a first flow rate of a coolant in the first zone and a second flow rate of the coolant in the second zone independently based on respective amounts of heat generated in the first and second zones”.
The aforementioned limitation in combination with all remaining limitations of Claim 7 are believed to render said Claim 7 and all Claims dependent therefrom (Claim 21) patentable over the art of record.
The closest art of record is believed to be that of Dogruoz et al (US 2021/0112686 – hereafter “Dogruoz”).
While Dogruoz Figs 2, 3B teaches wherein the plurality of microchannels (microchannels formed by 140 at CP1/CP2/CP3) includes a plurality of first microchannels (microchannels formed by 140 at CP1) and a plurality of second microchannels (microchannels formed by 140 at CP2), (Fig 3B), wherein a first zone (CP1) includes a first portion of the manifold (120) and the first microchannels (microchannels formed by 140 at CP1), the first zone (CP1) being disposed over a first region of the chip (15) with first power density generated during the operation of the chip (15), wherein a second zone (CP2) includes a second portion of the manifold (120) and the second microchannels (microchannels formed by 140 at CP2), the second zone (CP2) being disposed over a second region of the chip (15) with second power density generated during the operation of the chip (15), the second power density being different from the first power density (¶ 40, II. 1-6), however neither Dogruoz nor any other art of record, either alone or in a combination, teach or suggest above-mentioned limitations of Claim 7.
Any comment considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submission should be clearly labeled “Comments on Statement of Reasons for Allowance”.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMIR JALALI whose telephone number is (303)297-4308. The Examiner can normally be reached on Monday - Friday 8:30am - 5:00pm, Mountain Time. If attempts to reach the examiner by telephone are unsuccessful, the Examiner’s Supervisor, Jayprakash Gandhi can be reached on 571-272-3740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMIR A JALALI/Primary Examiner, Art Unit 2835