Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18186403 filed on 3/20/2023.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of claims 1-6, 8-14, 16-17 in the reply filed on 8/18/2025 is acknowledged.
Applicant argues that there is no undue burden due to the product/process and species restriction.
The examiner would like to note that the product and process claims require different classification searches (e.g. H10D62/109 vs H01L21/76224). Additionally, the species have different characteristics, for example species II (Fig. 3) and species III (Fig. 4) requires different type of isolation that would require different classification searches (e.g. Species II would require H01L21/76224 classification search and Species III would require H10D62/113, H10D84/0153, H10D84/0151 etc. classification search). Accordingly, there is a search burden and the restriction requirement is maintained and made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6, 8-14, 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hirler et al. (US 2013/0037906).
Regarding independent claim 1, Hirler et al. teach a vertically oriented semiconductor device (Fig. 4, element 150) comprising
a semiconductor body (Fig. 4, element 30) having a first major surface, the semiconductor device comprising:
a substrate (Fig. 4, element 20);
a first region (Fig. 4, element 2a, paragraph 0065), being an epitaxial layer, provided on the substrate and having a first conductivity type;
a conductive element (Fig. 4, element 1 is p type) provided on the first region, wherein the semiconductor device has a breakdown voltage that depends on a distance between the conductive element and the substrate and/or depends on a doping level of the first region (the structure in Fig. 4 is analogous to the claimed structure), so that a junction (Fig. 4, pn junction) is provided between the first region and the conductive element;
a trench (Fig. 4, element 27) extending into the semiconductor body from the first major surface to an extension depth extending at least as deep as an extension depth of the conductive element along a vertical direction of the vertically oriented semiconductor device;
wherein the trench comprises a material (Fig. 4, element 7, paragraph 0047 discloses silicon oxide) arranged to provide electrical insulation to limit a lateral field termination distance associated with the breakdown voltage corresponding to the junction;
wherein the trench extends from the first major surface at a location at a non-zero lateral distance from an active region (Fig. 4, regions where gate structure 12 is formed) of the semiconductor device so that the first region is provided between the trench and the active region (Fig. 4), or at a location comprised within the conductive element; and
wherein the trench is formed so that a direct blockage is provided, up till the extension depth of the trench, in a lateral direction with respect to the active region, along the active region in a direction perpendicular to the lateral direction and to the vertical direction (Fig. 4 discloses the claimed structure, therefore the properties/intended use are implied in the structure).
Regarding claim 2, Hirler et al. teach wherein the active area and the trench has a lateral distance that is uniform along the direction perpendicular to the lateral direction and to the vertical direction (Fig. 4).
Regarding claim 3, Hirler et al. teach wherein the trench is electrically floating (Fig. 4).
Regarding claim 4, Hirler et al. teach wherein the trench is disconnected from electrical terminals of the device (Fig. 4).
Regarding claim 5, Hirler et al. teach wherein the trench integrally comprises undoped material (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 6, Hirler et al. teach wherein the trench integrally comprises of electrically non-conductive material “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 8, Hirler et al. teach wherein the conductive element is selected from the group consisting of: a second region having a second conductive type opposite to the first opposite type (Fig. 4), so that a junction is provided between the first and second region; a functional trench of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET); and a metal barrier of a Schottky diode.
Regarding claim 9, Hirler et al. teach herein the material is selected from the group consisting of: Silicon Oxide, Silicon Nitride, and undoped Polysilicon (paragraph 0047).
Regarding claim 10, Hirler et al. teach wherein the semiconductor device is selected from the group consisting of a bipolar transistor, a Zener, a Schottky diode, a PN diode, an insulated-gate bipolar transistor (IGBT), and a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) (paragraph 0063).
Regarding claim 11, Hirler et al. teach wherein the trench is electrically floating (Fig. 4).
Regarding claim 12, Hirler et al. teach wherein the trench is disconnected from electrical terminals of the device (Fig. 4).
Regarding claim 13, Hirler et al. teach wherein the trench integrally comprises undoped material (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 14, Hirler et al. teach wherein the trench integrally comprises of electrically non-conductive material (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 16, Hirler et al. teach wherein the conductive element is selected from the group consisting of: a second region having a second conductive type opposite to the first opposite type, so that a junction is provided between the first and second region (Fig. 4); a functional trench of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET); and a metal barrier of a Schottky diode.
Regarding claim 17, Hirler et al. teach wherein the material is selected from the group consisting of: Silicon Oxide, Silicon Nitride and undoped Polysilicon (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813