Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 05/11/2026 under 37 CFR 1.131 has been considered but is ineffective to overcome the cited reference below.
Fig. 3 of prior art Hilrler et al. discloses the amended limitation as discussed below.
DETAILED ACTION
This action is responsive to application No. 18186403 filed on 3/20/2023.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of claims 1-6, 8-14, 16-17 in the reply filed on 8/18/2025 is acknowledged.
Applicant argues that there is no undue burden due to the product/process and species restriction.
The examiner would like to note that the product and process claims require different classification searches (e.g. H10D62/109 vs H01L21/76224). Additionally, the species have different characteristics, for example species II (Fig. 3) and species III (Fig. 4) requires different type of isolation that would require different classification searches (e.g. Species II would require H01L21/76224 classification search and Species III would require H10D62/113, H10D84/0153, H10D84/0151 etc. classification search). Accordingly, there is a search burden and the restriction requirement is maintained and made FINAL.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6, 8-14, 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Hirler et al. (US 2013/0037906).
Regarding independent claim 1, Hirler et al. teach a vertically oriented semiconductor device (Fig. 3, element 101, paragraph 0058) comprising
a semiconductor body (Fig. 3, elements 1 & 2b, paragraph 0055) having a first major surface, the semiconductor device comprising:
a substrate (Fig. 3, element 31, paragraph 0055);
a first region (Fig. 4, element 2b, paragraph 0065 of a different embodiment discloses the capability of forming an epitaxial layer with the motivation to reduce defect density), being an epitaxial layer, provided on the substrate and having a first conductivity type (Fig. 3, n type);
a conductive element (Fig. 3, element 1 is p type, paragraph 0046) provided on the first region, wherein the semiconductor device has a breakdown voltage that depends on a distance between the conductive element and the substrate and/or depends on a doping level of the first region (the structure in Fig. 3 is analogous to the claimed structure), so that a junction (Fig. 3, pn junction) is provided between the first region and the conductive element;
a trench (Fig. 3, element 27, paragraph 0049) extending into the semiconductor body from the first major surface to an extension depth extending at least as deep as an extension depth of the conductive element along a vertical direction of the vertically oriented semiconductor device but not a depth of an electrode region on the substrate of the vertically oriented semiconductor device (Fig. 3);
wherein the trench comprises a material (Fig. 3, element 7, paragraph 0047 discloses silicon oxide) arranged to provide electrical insulation to limit a lateral field termination distance associated with the breakdown voltage corresponding to the junction;
wherein the trench extends from the first major surface at a location at a non-zero lateral distance from an active region (Fig. 3, region where element 10 is formed) of the semiconductor device so that the first region is provided between the trench and the active region (Fig. 3), or at a location comprised within the conductive element; and
wherein the trench is formed so that a direct blockage is provided, up till the extension depth of the trench, in a lateral direction with respect to the active region, along the active region in a direction perpendicular to the lateral direction and to the vertical direction (Fig. 3 discloses the claimed structure, therefore the properties/intended use are implied in the structure).
Regarding claim 2, Hirler et al. teach wherein the active area and the trench has a lateral distance that is uniform along the direction perpendicular to the lateral direction and to the vertical direction (Fig. 3).
Regarding claim 3, Hirler et al. teach wherein the trench is electrically floating (Fig. 3).
Regarding claim 4, Hirler et al. teach wherein the trench is disconnected from electrical terminals of the device (Fig. 3).
Regarding claim 5, Hirler et al. teach wherein the trench integrally comprises undoped material (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 6, Hirler et al. teach wherein the trench integrally comprises of electrically non-conductive material (“Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 8, Hirler et al. teach wherein the conductive element is selected from the group consisting of: a second region having a second conductive type opposite to the first opposite type (Fig. 3), so that a junction is provided between the first and second region; a functional trench of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET); and a metal barrier of a Schottky diode.
Regarding claim 9, Hirler et al. teach herein the material is selected from the group consisting of: Silicon Oxide, Silicon Nitride, and undoped Polysilicon (paragraph 0047).
Regarding claim 10, Hirler et al. teach wherein the semiconductor device is selected from the group consisting of a bipolar transistor, a Zener, a Schottky diode, a PN diode (Fig. 3), an insulated-gate bipolar transistor (IGBT), and a Metal Oxide Semiconductor Field Effect Transistor (MOSFET).
Regarding claim 11, Hirler et al. teach wherein the trench is electrically floating (Fig. 3).
Regarding claim 12, Hirler et al. teach wherein the trench is disconnected from electrical terminals of the device (Fig. 3).
Regarding claim 13, Hirler et al. teach wherein the trench integrally comprises undoped material (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 14, Hirler et al. teach wherein the trench integrally comprises of electrically non-conductive material (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Regarding claim 16, Hirler et al. teach wherein the conductive element is selected from the group consisting of: a second region having a second conductive type opposite to the first opposite type, so that a junction is provided between the first and second region (Fig. 3); a functional trench of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET); and a metal barrier of a Schottky diode.
Regarding claim 17, Hirler et al. teach wherein the material is selected from the group consisting of: Silicon Oxide, Silicon Nitride and undoped Polysilicon (paragraph 0047 discloses “Vertical trench 27 may be completely filled with a dielectric material such as silicon oxide”).
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/Primary Examiner, Art Unit 2813
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