DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chen, CN 104766903
Chen discloses an integrated mode and its forming method comprising: an integrated module, the integration module comprises a first unit (e.g. an electronic IC 300) and a second unit (e.g. a photoelectric IC (200), wherein the light emitted by the photoelectric element back surface, and the back surface is the light element 202 the position of the opposite surface. In order to achieve effective coupling, photoelectric IC comprising a OTSV (for example, FIG. 12A-12D, FIG. 13A-13E or other drawn OTSV). to direct light into a photoelectric IC is capable of polishing or grinding to thin thickness. According to some embodiments, photoelectric IC can be polished to 200um to 250um. integrated module comprises a photoelectric IC 200, an electronic IC 300 and an intermediate layer 400. The intermediate layer 400 includes the TSV 400 and be used as the photo IC 200, electronic IC 300 and base 100 between bridge plate of low cost. the intermediate layer of the smaller pitch on the IC bridging to the substrate (e.g., printed circuit board) on connection pads with larger pitch. The photoelectric IC 200 comprises a light element on a first surface 202 (e.g., light detector) and the pad 220. According to some embodiments, the photo IC 200 can further comprises setting OTSV at the second face (back face) 250, the second surface is opposite the first surface (front surface). OTSV 250 is coupled to the optical element 202. According to some embodiments, if no OTSV, and also can be the photoelectric element surface with an antireflective coating layer (ARC layer), such that the light is effectively coupled to the back. According to some embodiments, photoelectric IC 200 may be disposed on the intermediate layer 400 and electrical pads 220 electrically coupled to the TSV 400. electronic IC 300 is also disposed on the interposer 400 and electrical pad 320 electrically coupled to TSV 400. intermediate layer 400 through a bonding mechanism (e.g. solder balls or copper pillar (130) is disposed on the base plate 100. According to some embodiments, an optical fiber (not shown) can be inserted into OTSV 250 and through OTSV 250 and is aligned with the optical elements 202. ray is incident and by substantially vertical first surface direction, and is incident to the optical element 202 by the OTSV 250 or ARC layer (covering the silicon substrate back surface). According to some embodiments, the optical element may be a light detector and converting the received light into an electrical signal. This electric signal via pad 220, TSV 440 (winding) and inside electric pads 320 so as to transmit to the electronic IC 300. The optical structure of the device of Chen includes the structure and components of the claims, including the method steps for manufacturing the components (see Fig. 15A-C).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Doany et al, US Pub. 2012/0207426, disclose a flip-chip packaging for dense hybrid integration of electrical and photonic integrated circuits. Yasuda et al, US Pub. 2012/0183253, disclose a photoelectronic conversion module.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL ST CYR whose telephone number is (571)272-2407. The examiner can normally be reached M to F 8:00-8:00.
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DANIEL ST CYR
Primary Examiner
Art Unit 2876
/DANIEL ST CYR/ Primary Examiner, Art Unit 2876