Prosecution Insights
Last updated: July 17, 2026
Application No. 18/188,237

SYSTEMS AND METHODS FOR DETERMINING A DISTANCE TO A FAULT IN HYBRID LINE SYSTEMS

Non-Final OA §101§103
Filed
Mar 22, 2023
Examiner
SAUNCY, TONI DIAN
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
General Electric Technology GmbH
OA Round
3 (Non-Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
23 granted / 27 resolved
+17.2% vs TC avg
Strong +20% interview lift
Without
With
+20.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
15 currently pending
Career history
54
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
96.0%
+56.0% vs TC avg
§102
0.8%
-39.2% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 27 resolved cases

Office Action

§101 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s amendments to the claims, filed 04/03/2026, are accepted. Claims 1-5, 7-13, and 15-19 are pending. Claims 1, 4, 9, 12 and 15 are amended. Claims 21-24 are new. Claim 3 is cancelled. Regarding Claims 1-20, rejected under 35 U.S.C. § 101, Examiner acknowledges amended language as recited in independent Claims 1, 9, and 15. With full consideration of Applicant arguments (Remarks, p. 7-8/10), Examiner finds arguments are not persuasive, such that rejection under 35 U.S.C. § 101 is maintained. Detailed response and rationale is included below. Regarding rejections of Claims 1-20 under 35 U.S.C. § 103, over obvious combination of prior art, based on further consideration and search as necessitated by amendments, Examiner finds arguments are not persuasive. Detailed response to Applicant arguments are presented below with new grounds of rejection. Claim Rejections - 35 USC § 101 35 U.S.C. § 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-2, 4-5, 7-13, 15-19 and 21-24 are rejected under 35 U.S.C. § 101. The claimed invention is directed to an abstract idea and not significantly more. The claims as currently amended fall into one of the statutory categories as set forth in 35 U.S.C. 101 (See MPEP § 2106.03) using Step one of eligibility analysis. (MPEP § 2106.03). Independent Claim 1 is held to be patent ineligible, with step by step evaluation of eligibility explained below. Claim 1 recites abstract concepts (emphasis in bold added): "method for generating an alert responsive to determining a fault in a hybrid lines system, comprising: obtaining a set of measured voltage samples, a set of measured current samples, and a set of ABCD parameters of a plurality of sections of the hybrid lines system; determining, based at least in part on the set of measured voltage samples and the set of measured current samples, a first set of voltage phasors and a first set of current phasors; determining, based at least in part on the first set of voltage phasors, the first set of current phasors, and the set of ABCD parameters, a second set of voltage phasors and a second set of current phasors associated with a bus of the hybrid lines system; determining, based at least in part on the second set of voltage phasors, the second set of current phasors, and a faulty phase indicator, faulty phase voltage phasors and faulty phase current phasors, wherein the faulty phase indicator provides an indication of a fault in one or more sections of the hybrid lines system; determining, based at least in part on the faulty phase voltage phasors and the faulty phase current phasors, the fault in a faulty section of the hybrid lines system and parameters associated with the fault; determining, based at least in part on the parameters associated with the fault, the distance to the fault; and generating the alert based on determining the distance to the fault.” STEP 1: Determination of whether Claim(s) are in eligible statutory category. Claim 1 limitations recited an invention that falls within the four statutory categories of patentable subject matter identified by 35 U.S.C. 101: process, machine, manufacture, or composition of matter. (MPEP § 2106.03). STEP 2A – PRONG 1: Determination of whether claim(s) recite a judicial exception. Here, applying broadest reasonable interpretation (BRI), consideration of independent Claim 1 limitations emphasized in bold above recite a judicial exception. (MPEP2106.04) These limitations fall within definition of Abstract Idea in the Mathematical Concept grouping (MPEP 2106.04(a)(2),subsection I) or Mental Process grouping. (MPEP 2106.04(a)(2), subsection III). Specifically, under the 2019 Revised Patent Subject Matter Eligibility Guidance, Claim 1 limitations fall into the grouping of subject matter that, when recited as such in a claim limitation, covers performing mathematics or mental steps. Specifically, Examiner points to limitations emphasized in bold as shown above. The language of “method for generating”, “determining a fault”, “determining…a first set of voltage phasors and a first set of current phasors”, “determining…a second set of voltage phasors and a second set of current phasors”, “determining…a faulty phase indicator, faulty phase voltage phasors and faulty phase current phasors”, “determining…the fault in a faulty section of the hybrid lines system and parameters associated”, and “determining…distance”. Interpretation of these identified limitations as mathematical processes is supported by specification in at least [0104], FIG. 3A with [0121], and FIG. 7. Based on review of specification, mathematical processes of generating and/or determining may be performed computationally using generic computer components, it is possible that some processes may be involve mental steps using pen and paper depending on the complexity of the calculation. STEP 2A –PRONG 2: Determination of whether limitations integrate identified judicial exception into a practical application. Claim 1 does recite additional elements, but these elements do not integrate the recited judicial exception into a practical application. Additional elements include limitations considered to be mere data gathering required to perform the mathematical or mental process as recited, including “obtaining a set of measured voltage samples, a set of measured current samples, and a set of ABCD parameters”, “based at least in part on the second set of voltage phasors, the second set of current phasors”, or “based at least in part on the faulty phase voltage phasors and the faulty phase current phasors”. The additional element found in limitation “generating an alert” is considered extra solution activity, with guidance from MPEP section 2106.05(g), “displaying analysis/results” in light of Electric Power Group, LLC v. Alstom S.A., 830 F.3d 1350, 1354-55, 119 USPQ2d 1739, 1742 (Fed. Cir. 2016). This may be more specifically considered as insignificant post-solution activity, with guidance from MPEP 2106.05(g) and 2106.04(d), where specific consideration is given to use of an alarm. Further analysis does not find additional elements that integrate the judicial exception into a practical application because there is no improvement to another technology or technical field; improvements to the functioning of the computer itself; a particular machine; effecting a transformation or reduction of a particular article to a different state or thing. Examiner notes that since the claimed methods and system are not tied to a particular machine or apparatus, they do not represent an improvement to another technology or technical field. STEP 2B – Determination of whether additional elements are sufficient to amount to significantly more than the judicial exception. Additional elements identified is Claim 1 do not amount to significantly more than the judicial exception. As recited in MPEP section 2106.05(g), necessary data gathering (i.e. receiving data), as noted above with additional element reciting “obtaining a set of measured voltage samples, a set of measured current samples, and a set of ABCD parameters” is considered extra solution activity in light of Mayo, 566 U.S. at 79, 101 USPQ2d at 1968; OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015). Additional elements are not recited that apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception. (see MPEP 2106.05(e) and Vanda Memo). Thus, Claim 1 is directed to a judicial exception and is patent ineligible. Similar analysis was applied to independent claims 9 and 15, as currently amended, reciting parallel limitations as discussed above for Claim 1. As was true for Claim 1, the interpretation of Claims 9 and 15 is supported in the specification, which confirms intent of the claim limitation as being directed to mathematical processes/calculations or mental steps, in particular, numerical methods for calculation of phasor expressions. Specifically, [0104], [0118], and [0121], as discussed above. With the same reasoning and rationale applied in evaluation of STEP1, STEP 2A-PRONG1 and PRONG2 and STEP 2B, Claims 9 and 15 do not include additional elements that integrate the judicial exception into a practical application or that are sufficient to amount to significantly more than the judicial exception. Likewise, Claims 9 and 15 are directed to a judicial exception and are patent ineligible. Limitations recited in dependent Claims 2, 4-5, 7-8, 21-24 with dependency to Claim 1; Claims 10-13 with dependency to Claim 9; and Claims 16-19 with dependency to Claim 15 further limit the abstract idea without integrating the abstract concept into a practical application or including additional limitations that can be considered significantly more than the abstract idea. Specifically Examiner finds additional elements in dependent claims that including limitations reciting additional extra-solution, data-gathering, or further limiting the mathematical concept with additional details of performing mathematical calculations. However, limitations as recited in dependent claims are not sufficient to amount to significantly more than the judicial exception and do not integrate the judicial exception into a practical application. When analyzed independently or in combination, dependent Claims 2, 4-5, 7-8, 10-13, 16-19, and 21-24 are held to be patent ineligible under 35 U.S.C. 101 because the additional recited limitation(s) therein represent additional elements that describe insignificant extra solution activity, additional mathematical calculations, instructions or definitions for calculations, and/or numerical data to be used according to the recitation of the abstract ideas as discussed above for independent Claims 1, 9, and 15. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 4, 7-9, 12, 15, 18, and 22 are rejected under 35 U.S.C. § 103 as being unpatentable over NAIDU (US 20200408827 A1) in view of HA (US 20180284180 A1) and further in view of DASHTDAR (Dashtdar, et al. “Fault location in distribution network by solving the optimization problem using genetic algorithm based on the calculating voltage changes”, Soft Comput. 26, 8757–8783 (2022)). With respect to Claims 1 and 9 NAIDU teaches: A method for generating an alert responsive to determining a fault in a hybrid lines system, comprising: (NAIDU is in same technical field, Abstract: “method and device for fault section identification in a multi-terminal mixed line”; and “controlling a switching device with a re-trip signal (i.e. “generating an alert) generated based on the determination of the section with the fault (i.e., “responsive to determining a fault”).”) a first section having a first bus; and a second section having a second bus, (Examiner notes limit specific to Claim 15. FIGs. 1, 2) obtaining: a set of measured voltage samples, a set of measured current samples, ([0043]: “obtaining positive sequence voltage and current phasors from measurements of voltages and currents at each terminal of the multi-terminal mixed line.”) and a set of ABCD parameters (FIG. 3, with [0042-43]: “impedance parameters (i.e. “ABCD parameters”, as would be understood by one of ordinary skill in the art) are obtained at 302”) of a plurality of sections of the hybrid lines system; ([0001]: “relates to fault section identification in multi-terminal mixed lines (i.e., “hybrid lines”)” and [0004]: “mixed line has at least two line sections”; and FIG. 4 with [0034]: “method comprises obtaining impedance parameters associated with each section of the mixed line”; Examiner notes FIGs. 1-2, showing terminals on each section, such that voltage/current measurements are also acquired in each section. ) determining, based at least in part on the set of measured voltage samples and the set of measured current samples, a first set of voltage phasors and a first set of current phasors;( FIG. 3, with [0043]: “obtaining (i.e., “determining”) positive sequence voltage and current phasors from measurements of voltages and currents”) Examiner interprets “first” to mean an initial calculation of voltage and current phasors (based on voltage and current measurements) analogous to reference) determining, based at least in part on the first set of voltage phasors, the first set of current phasors, and the set of ABCD parameters, a second set of voltage phasors and a second set of current phasors associated with a bus of the hybrid lines system ([0015-17]: “calculation of the voltage phasor for the first terminal (i.e., “bus”) is performed using at least the voltage and current phasors obtained for one of the second and third terminals, and the current phasor obtained for the first terminal…calculating the voltage phasor for the each terminal can include calculating two voltage phasors for the terminal…using voltage and current phasors obtained for the second terminal, and a second voltage phasor for the second terminal is calculated using voltage and current phasors obtained for the third terminal… based on the voltage and current phasors obtained for the second terminal, and impedance characteristics (i.e. “ABCD parameters”) of the section connecting the second terminal with the junction.”; Examiner notes interpretation of “first” and “second” to mean to mean an initial calculation of voltage and current phasors (as immediately above) and a subsequent calculation of a voltage and current phasors.) determining, based at least in part on the second set of voltage phasors, the second set of current phasors, faulty phase voltage phasors and faulty phase current phasors, an indication of a fault in one or more sections of the hybrid lines system; ([0046]: “calculating the voltage phasor for the first terminal comprises calculating a voltage phasor at the junction based on the voltage and current phasors obtained for the second terminal”; Examiner interprets “second” to mean generally a sequential next calculation, analogous to reference.; and [0052-81] detailing calculation of phasors, with [0087]: “terminal for which the difference between the calculated and obtained voltage phasors is the highest among all(i.e., “faulty voltage phasors”), can be identified as the section with the fault.(i.e., “indication of a fault in one or more sections”) ) determining, based at least in part on the parameters associated with the fault, the fault;([0019]: “method comprises determining a location of the fault”) generating the alert based on based on determining the fault (as above, Abstract: section “controlling a switching device with a re-trip signal (i.e. “generating an alert) generated based on the determination of the section with the fault (i.e., “responsive to determining a fault”).” NAIDU does not teach: determining, based at least in part on a faulty phase indicator, faulty phase voltage phasors and faulty phase current phasors, wherein the faulty phase indicator provides an indication of a fault; determining, based at least in part on the faulty phase voltage phasors and the faulty phase current phasors, the fault in a faulty section of the hybrid lines system and parameters associated with the fault; determining, based at least in part on the parameters associated with the fault, the distance to the fault; HA teaches: determining, based at least in part on a faulty phase indicator, faulty phase voltage phasors and faulty phase current phasors, wherein the faulty phase indicator provides an indication of a fault; (HA is in same technical field, Abstract: “determining a fault location distance or distance protection in a multi-phase power transmission medium, configured to; determine a set of line fault parameters based on a measurement of voltage and current”; and [0067]: “apparatus may receive a notification signal indicative of the fault condition”; and FIG. 3 with [0108] “For fault location the block 33 is configured to determine the following equations depending on the type of fault, which may be determined from the indicator FtPhsld (i.e., “faulty phase indicator”)” and [0077]: “block 31 receives a faulty phase detection signal, FtPhsld”; Examiner interprets “faulty phase indicator” to mean generally a value signaling a faulty phase, as taught by reference.) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to modify NAIDU to include a faulty phase indicator as part of the determination of a faulty in a hybrid lines system as taught by HA because this would be a logical preliminary step based on measurements use in the method as disclosed by NAIDU to provide a quick determination of the presence of a faulty. One of ordinary skill would understand this step taught by HA would provide added efficiency and an additional layer of accuracy to the fault determination method and system taught by NAIDU, saving time and cost for accurate fault determination. NAIDU, as modified by HA as taught above, does not teach: determining, based at least in part on the faulty phase voltage phasors and the faulty phase current phasors, the fault in a faulty section of the hybrid lines system and parameters associated with the fault; determining, based at least in part on the parameters associated with the fault, the distance to the fault; DASHTDAR teaches: determining, based at least in part on the faulty phase voltage phasors and the faulty phase current phasors, the fault in a faulty section of the hybrid lines system and parameters associated with the fault; (DASHTDAR is in same technical field, Pg. 8760, Col.1: “Fault location in the distribution network through a matching method based on optimization problem solving.”; Pg. 8760, Col. 1, second bullet: “objective functions to identify the faulty section and fault location in the distribution network based on the difference between the two approaches PF and the impedance matrix.”; Pg. 8781, Table 4 “comparison of the performance of faulty location methods…”, Para 4, “voltage and current phasor” ); Section 3, providing details of faulty phasor calculations.) determining, based at least in part on the parameters associated with the fault, the distance to the fault; (DASHTDAR, Pg. 8768, Col 2, Fig. 10, with Para2, “accurately detect the location of the fault between the two buses…defined an objective function, with the difference that in the previous case, voltage changes were calculated per assumption of fault in each bus…similar to Fig. 10”, and Equation (39); Examiner notes references cited by DASHTDAR, included as pertinent prior art in previous office action, disclose additional instances of methods for finding distance to a fault location) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU to include determination of the fault in a faulty section of a hybrid lines system and parameters associated with the faulty using faulty phase voltage and current phasors, and to include determination of a distance to the fault, as taught by DASHTDAR because this would add additional detail and accuracy to the method/system disclosed by NAIDU, as modified by HA. One of ordinary skill would see that including the details taught by DASHTDAR, to improve understanding of a fault in hybrid lines system, would require no additional measurements or instrumentation in the system/method taught by NAIDU as modified by HA, while adding no additional cost and providing efficiency and accuracy. With respect to Claim 15, NAIDU teaches: A hybrid lines system, (As above, NAIDU is in same technical field, Abstract: “method and device for fault section identification in a multi-terminal mixed line”) comprising: a first section having a first bus; and a second section having a second bus, (FIGs. 1, 2) wherein a first set of voltage phasors and a first set of current phasors are determined based at least in part on a set of measured voltage samples and a set of measured current samples (As above, parallel limitation, Claim 1) associated with the first section, (FIG. 4, 402 “each section”; Examiner interprets “first” to mean an initial determination, as above, analogous to reference process/system.) wherein a set of ABCD parameters associated with the hybrid lines system is determined based at least in part on input line parameters associated with the hybrid lines system, (FIG. 3, with [0042-43]: “impedance parameters (i.e. “ABCD parameters”, as would be understood by one of ordinary skill in the art) are obtained at 302”; Examiner interprets “line parameters” to mean generally obtained electrical characteristics, based on guidance from specification in at least [0102].) wherein a second set of voltage phasors and a second set of current phasors associated with the second section are calculated based at least in part on the first set of voltage phasors, the first set of current phasors, and the set of ABCD parameters, (As above, parallel limitation, Claims 1 and 9) wherein faulty phase voltage phasors and faulty phase current phasors are determined based at least in part on the second set of voltage phasors, the second set of current phasors (As above, Claim 1, [0046]: “calculating the voltage phasor for the first terminal comprises calculating a voltage phasor at the junction based on the voltage and current phasors obtained for the second terminal”; Examiner interprets “second” as noted above..; and [0052-81] detailing calculation of phasors, with [0087]: “terminal for which the difference between the calculated and obtained voltage phasors is the highest among all (i.e., “faulty voltage phasors”)”) NAIDU does not teach: wherein faulty phase voltage phasors and faulty phase current phasors are determined based at least in part on the second set of voltage phasors, the second set of current phasors, and a faulty phase indicator HA teaches wherein faulty phase voltage phasors and faulty phase current phasors are determined based at least in part on the second set of voltage phasors, the second set of current phasors, and a faulty phase indicator (As above, Claim 1, [0067] and FIG. 3 with [0108], where “FtPhsld” is interpreted as above. (i.e., “faulty phase indicator”)” and [0077]; Examiner interprets “faulty phase indicator” as above.) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to modify NAIDU to include a faulty phase indicator as part of the determination of a faulty in a hybrid lines system as taught by HA because this would be a logical preliminary step based on measurements use in the method as disclosed by NAIDU to provide a quick determination of the presence of a faulty. One of ordinary skill would understand this step taught by HA would provide added efficiency and an additional layer of accuracy to the fault determination method and system taught by NAIDU, saving time and cost for accurate fault determination. NAIDU as modified by HA and taught above does not explicitly teach: wherein a fault in a faulty section of the hybrid lines system and parameters associated with the fault are identified based at least in part on the faulty phase voltage phasors and the faulty phase current phasors. DAHSDTAR teaches: wherein a fault in a faulty section of the hybrid lines system and parameters associated with the fault are identified based at least in part on the faulty phase voltage phasors and the faulty phase current phasors. (As above, Claim 1, Pg. 8760, Col. 1, second bullet: “objective functions to identify the faulty section and fault location in the distribution network based on the difference between the two approaches PF and the impedance matrix.”; Pg. 8781, Table 4 “comparison of the performance of faulty location methods…”, Para 4, “voltage and current phasor” ); Section 3, providing details of faulty phasor calculations.) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU to include determination of the fault in a faulty section of a hybrid lines system and parameters associated with the faulty using faulty phase voltage and current phasors, and to include determination of a distance to the fault, as taught by DASHTDAR because this would add additional detail and accuracy to the method/system disclosed by NAIDU, as modified by HA. One of ordinary skill would see that including the details taught by DASHTDAR, to improve understanding of a fault in hybrid lines system, would require no additional measurements or instrumentation in the system/method taught by NAIDU as modified by HA, while adding no additional cost and providing efficiency and accuracy. With respect to Claims 4 and 12 and 18, NAIDU in view of HA, and further in view of DASHTDAR, teaches limitations of Claim 1, 9, and 15. NAIDU further teaches: identifying the fault in the faulty section of the hybrid lines system and the parameters associated with the fault (As above, [0087]: “terminal for which the difference between the calculated and obtained voltage phasors is the highest among all can be identified as the section with the fault.(i.e., “fault in one or more sections”)) further comprises: determining that a first section of the hybrid lines system does not meet a first condition; ([0018] : “determining a section of the multi-terminal mixed line having the fault, based on the comparison of the calculated and obtained voltage phasors for each terminal…Consider a case where the difference for each terminal is less than a threshold (i.e. “does not meet a first condition)… the fault may be determined to be at the junction”; Examiner interprets “does not meet a first condition” to mean generally conditional analysis to determine fault or no-fault analogous to reference.) determining that a second section of the hybrid lines system meets a second condition; ([0085]: “difference for each terminal is less than a threshold” and [0086]: “difference between the calculated and obtained voltage phasors is the lowest among all”; Examiner interprets “second condition” to mean evaluation using at least two different comparative analysis conditions, analogous to two methods taught in reference.) the fault is located in the second section of the hybrid lines system. ([0019]: “method comprises determining a location of the fault according to the determined section, wherein the calculated voltage and current phasors for the corresponding terminal are used for determining location of the fault”; Examiner interprets “second” to mean generally a sequential or subsequent determination relative to an initial determination, as taught in the iterative process of section evaluation taught in reference, as in at least [0109]: “comparing the calculated and obtained voltage phasors for each terminal, the section with the fault can be identified.”) With respect to Claim 7, NAIDU in view of HA and further in view of DASHTDAR, teaches limitations of Claim 1. NAIDU further teaches: the first set of voltage phasors and the first set of current phasors are associated with a first bus of the hybrid lines system. ( [0011]: “measurement equipment publishes the measurements over a bus”; and FIG.1 with [0027]: “FIG. 1, which illustrates a multi-terminal mixed line (also referred as tapped line) connecting three terminals in accordance with an embodiment of the invention…Bus A, Bus B and Bus C”; [0043]: “method comprises obtaining positive sequence voltage and current phasors from measurements of voltages and currents at each terminal of the multi-terminal mixed line”; and FIG. 4/elements 404-408 with [0044]: “phasors for each terminal may be obtained”; Examiner interprets “first” and “first set” to mean generally an initial calculation at a bus designated arbitrarily as “first” in a system with multiple bus points, analogous to reference teaching phasor calculation at “each” bus.) With respect to Claim 8, NAIDU in view of HA and further in view of DASHTDAR, teaches limitations of Claim 7, NAIDU further teaches: the second set of voltage phasors and the second set of current phasors are associated with a second bus of the hybrid lines system. (FIG. 4 with [0044]; Examiner notes interpretation of “second” as discussed above.) With respect to Claim 22, NAIDU, in view of HA and DASHTDAR, teaches limitations of claim 1. NAIDU further teaches, determining the fault in the faulty section of the hybrid lines system comprises: generating a first section fault phase indicator based on voltage and current phasors associated with a first section of the hybrid lines system; (As above, generating a second section fault phase based on voltage and current phasors associated with a second section of the hybrid lines system; and identifying the fault in the faulty section of the hybrid lines system based on at least the first section fault phase indicator and the second section fault phase indicator. NAIDU, as modified by HA and DASHTDAR as taught above, does not teach: generating a first section fault phase indicator based on the faulty phase indicator of the hybrid lines system generating a second section fault phase indicator based on the faulty phase indicator of the hybrid lines system; identifying the fault in the faulty section of the hybrid lines system based on at least the first section fault phase indicator and the second section fault phase indicator. HA further teaches: generating a first section fault phase indicator based on the faulty phase indicator of the hybrid lines system (As above, [0067]: “apparatus may receive a notification signal indicative of the fault condition”; and FIG. 3 with [0108] “For fault location the block 33 is configured to determine the following equations depending on the type of fault, which may be determined from the indicator FtPhsld (i.e., “faulty phase indicator”)” and [0077]: “block 31 receives a faulty phase detection signal, FtPhsld”; Examiner interprets “faulty phase indicator” to mean generally a value signaling a faulty phase, as taught by reference.) generating a second fault phase indicator based on the faulty phase indicator of the hybrid lines system; (FIG. 1 with [0066]: “method uses, at step 10, a plurality of instantaneous voltage and current measurements taken at a measurement point along a power transmission medium, such as a power line”; Examiner interprets “second” as above, to mean subsequent process steps after an initial step, analogous to method in reference using multiple repeated steps; and, as above, [0067] and FIG. 3 with [0108], where “FtPhsld” is interpreted as above. (i.e., “faulty phase indicator”); and [0077]; Examiner interprets “faulty phase indicator” as above; identifying the fault in the faulty section of the hybrid lines system based on at least the first section fault phase indicator and the second section fault phase indicator. ([0019]: “apparatus is configured to determine a fault location distance for one or more of the following fault types; and list of faulty types based on analysis of faulty phase indicators”, types detailed in [0020]-[0029]) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include generating a first section fault phase indicator based on the faulty phase indicator of the hybrid lines system; generating a second section fault phase indicator based on the faulty phase indicator of the hybrid lines system; and identifying the fault in the faulty section of the hybrid lines system based on at least the first section fault phase indicator and the second section fault phase indicator, as further taught by HA because these steps would add greater depth and breadth to the identification of a location of a faulty and detailed characteristics of fault type. This would be an advantageous combination because the determinations taught by HA could be accomplished without additional expense to modify the measurements as described by NAIDU, with modifications by HA and DASHTDAR. Claims 2, 10 and 16 are rejected under 35 U.S.C. § 103 as being unpatentable over , NAIDU in view of HA and DASHTDAR, as applied to claims 1, 9 and 15 above, and further in view of GAJARE (US 20200348352 A1). With respect to Claims 2, 10, and 16, NAIDU in view of DASHTDAR teaches the limitations of Claim 1, 9, and 15, as above. NAIDU further teaches: input line parameters comprise at least a line length of each section of the hybrid lines system, (FIG.1, [0035]: “Section AJ is an overhead line of length L1 km”.) a positive-sequence impedance per length of the each section of the hybrid lines system, ([0040]: “ABCDBJ denotes positive sequence line impedance parameters of section BJ”; and [0043] teaching mathematical expressions; and [0058]: “r1, l1 and c1 are resistance, inductance and capacitance per unit length of the section AJ”) NAIDU as modified by HA and DASHDTAR and taught above, does not teach: a zero-sequence impedance per length of the each section of the lines system, a positive-sequence admittance per length of the each section of the lines system, a zero-sequence admittance per length of the each section of the lines system. GAJARE teaches: a zero-sequence impedance per length of the each section of the hybrid lines system, (GAJARE is in same technical field, [0001]: “identification of fault location in power transmission lines and, in particular, to identification of fault location in multi-terminal power transmission lines”; and [0013]: “uses zero-sequence quantities to locate the fault”; and [0041]: “determine the line parameters, i.e., resistance, inductance, and capacitance”; Examiner notes reference to inverse of claim limitation language, but asserts this would be analogous and understood by one of ordinary skill, and is further taught in [0014]: “line parameters, such as resistance, inductance and capacitance per unit length.”) a positive-sequence admittance per length of the each section of the hybrid lines system, ([0025]-[0026]: “positive sequence ABCD parameters of the line section…positive sequence characteristic impedance of section MJ”; Examiner notes [0025]-[0038] provide detailed example of calculations used; Examiner notes reference teaches impedance per unit length, which would be understood by one of ordinary skill as obviously equivalent to the inverse of admittance per unit length.) a zero-sequence admittance per length of the each section of the hybrid lines system. (As above, [0013]: “uses zero-sequence quantities to locate the fault”; and [0094]) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include determination of zero-sequence impedance per length of the each section of the lines system, a positive-sequence admittance per length of the each section of the lines system, and a zero-sequence admittance per length of the each section of the hybrid lines system, such as that of GAJARE because be seen as a way to expand and improve the method of NAIDU as modified by HA and DASHTDAR to result with a reasonable expectation of success in a more robust set of system parameters for determination of a faulty location or distance to a fault. One of ordinary skill would understand that varying sequence information would provide a clearer set of data to inform analysis for fault type, where zero-sequence quantities would be important for detecting ground faults, for example. One of ordinary skill would understand that positive-sequence impedance and/or admittance would render the method of NAIDU as modified by DASHTDAR better able to reliably and accurately identify fault location, and zero-sequence information would allow for an improved understanding of system behavior during a ground fault. Claims 11 and 17 are rejected under 35 U.S.C. § 103 as being unpatentable over NAIDU in view of HA and DASHTDAR, as applied to claims 9 and 15 above, and further in view of DŽAFIĆ (Džafić , et al., “Kung’s component extraction in power system fault location”, Electrical Power and Energy Systems 119 (2020) 105888.) With respect to Claims 11, and 17, NAIDU in view of HA and DASHTDAR teaches the limitations of Claims 9, and 15, as above. the first set of voltage phasors and the first set of current phasors are calculated by applying a Fourier transform with a decaying direct current (DC) removal component to the set of measured voltage samples and the set of measured current samples. NAIDU further teaches: the first set of voltage phasors and the first set of current phasors are calculated by applying a Fourier transform ([0043]: “method comprises obtaining positive sequence voltage and current phasors from measurements of voltages and currents at each terminal of the multi-terminal mixed line…phasors may be obtained using a suitable phasor calculation such as, but not limited to, Fourier calculations”) NAIDU as modified by HA and DASHTDAR as taught above, does not teach: a Fourier transform with a decaying direct current (DC) removal component to the set of measured voltage samples and the set of measured current samples. DŽAFIĆ teaches: with a decaying direct current (DC) removal component to the set of measured voltage samples and the set of measured current samples. (DŽAFIĆ is in same technical field, Pg. 105887,1.Introduction: “occurrence of a fault in a typically nonlinear power network gives rise to transient signals (current and voltage) each formed by the fundamental frequency component, a decaying DC component”; and P105888,§2. “Component extraction methods”, section complete description of teaching various methods for extraction of DC component from signals, in the context of Fourier analysis.) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include as part of calculation of voltage and current phasors, a decaying direct current (DC) removal component to the set of measured voltage samples and the set of measured current samples, such as that of DŽAFIĆ because impact the accuracy of an impedance-based method that relies on the quality of estimated phasors. By incorporating the technique of DŽAFIĆ, any measured voltages or currents may include the undesired effects of the transient components, particularly after the occurrence of the fault can be accounted for and quantified, as is taught by Džafić (1. Introduction). One of ordinary skill would realize the advantage of combining a decay removal algorithm to address any undesired decaying component as taught by Džafić with the fault determination method for hybrid lines, as taught by NAIDU as modified by HA and DASHTDAR, to improve the ability to reliably and accurately locate a fault and determine fault parameters. Claims 5, 13, 19, 21 and 23-24 are rejected under 35 U.S.C. § 103 as being unpatentable over NAIDU in view of HA and DASHTDAR, as applied to claims 4(1), 12(9), and 18(15) above, and further in view of HA-2 (EP 3902079 A1)*. *numbered reference used for examination provided with this office action With respect to Claims 5, 13, and 19, NAIDU in view of HA and DASHTDAR as applied teaches limitations of claims 4, 12, and 18. NAIDU, as modified by HA and DASHTDAR as taught above, does not teach: the first condition and the second condition are based on whether the fault is a single-phase-to-ground fault or a phase-to-phase fault, and wherein the phase-to-phase fault is associated with a real function condition, and wherein the single-phase-to-ground fault is associated with an imaginary function condition. HA-2 teaches: the first condition and the second condition are based on whether the fault is a single-phase-to-ground fault or a phase-to-phase fault, (HA is in same technical field, Abstract: “aspects can comprise receiving data representing current and voltage components…for fault location determination of the fault”; [0013]: “Faulty phase identification is performed by a faulty phase identification component 114… faulty phase identification component 114 comprises the digital signal of the faulty phase, D_ftPhs, where the following values of D_ftPhs are shown accompanied by their representative meanings”, with details, Pg. 5, lines 6-16, including identification of phase-to-ground and phase-to-phase faults.) the phase-to-phase fault is associated with a real function condition, and wherein the single-phase-to-ground fault is associated with an imaginary function condition. ([0013]: “spatial vectors based on phases A, B, C, respectively, are used for identifying the faulty phase”, and see list of faulty types based on evaluation of imaginary and real parts of complex vectors, with [0014]: “faulty phase can be identified by comparing the imaginary and real part of the spatial vectors”) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include the first condition and the second condition are based on whether the fault is a single-phase-to-ground fault or a phase-to-phase fault, and wherein the phase-to-phase fault is associated with a real function condition, and wherein the single-phase-to-ground fault is associated with an imaginary function condition, such as that of HA-2 because it would provide valuable comparison of real (for finding positive sequence) and imaginary (for finding negative sequence) function conditions to allow for efficient more accurate differentiation between the two fault types based on measurements and determinations already built in to the method/system disclosed by NAIDU as modified by HA and DASHTDAR. One of ordinary skill would understand the advantage of using the uniquely manifested voltage and current characteristics, found in complex phasors, that signify a particular fault type to provide a more robust and accurate analysis of voltage and current signals and allow for more precise understanding of an fault type. With respect to Claim 21, NAIDU, in view of HA and DASHTDAR, teaches limitations of claim 1. NAIDU further teaches: the set of ABCD parameters comprises positive-sequence ABCD parameters (As above, Claim 2, [0040]: “ABCDBJ denotes positive sequence line impedance parameters of section BJ”; and [0043] teaching mathematical expressions;) DASHTDAR further teaches: and negative-sequence ABCD parameters (Pg 8763, Col1-2, “impedance of positive, negative, and zero sequences in the event of a fault can be calculated from Eq. (14)…” impedance of the positive, negative, and zero sequences can be obtained through Eq. (15), the values of the Zabc matrix for each source can be obtained” with Equations (14), (15)) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include determination of negative-sequence ABCD parameters, as further taught by DASHTDAR because this would add more specific understanding of the characteristics of a fault, namely a faulty occurring during an unbalanced line condition. Such a fault would be known to one of ordinary skill as a commonly occurring fault type, including single-line-to-ground faults. This would have the advantage of making the method/system as disclosed by NAIDU, as modified by HA and DASHTDAR as taught above, more robust in the ability to accurately determine detailed characteristics of a located fault in a hybrid line section. NAIDU, as modified by HA and DASHTDAAR as taught above, does not teach: wherein the faulty phase indicator provides an indication of one of a phase to-ground fault or a phase- to-phase fault in one or more sections of the hybrid lines system. HA-2 teaches:wherein the faulty phase indicator provides an indication of one of a phase to-ground fault or a phase-to-phase fault in one or more sections of the hybrid lines system. (As above, [0013]: “Faulty phase identification is performed by a faulty phase identification component 114… faulty phase identification component 114 (i.e., “faulty phase indicator”) comprises the digital signal of the faulty phase, D_ftPhs, where the following values of D_ftPhs are shown accompanied by their representative meanings”, with details, Pg. 5, lines 6-16, including identification of phase-to-ground and phase-to-phase faults based on evaluation of faulty phase indicator values.) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include the step of ensuring faulty phase indicator provides an indication of one of a phase to-ground fault or a phase-to-phase fault in one or more sections of the hybrid lines system, as taught by HA-2 because this would add specific, detailed knowledge about the faulty type, which would allow for better understanding of cause and subsequent necessary actions to correct the fault. Incorporating the step taught by HA-2 with the method/system of NAIDU as modified by HA and DASHTDAR would be possible without any additional measurements, making the step efficient, since it adds knowledge without extra cost. With respect to Claim 23, NAIDU in view of HA and DASHTDAR teaches limitations of claim 22. NAIDU, as modified by HA and DASHTDAR and taught above, does not teach: identifying the fault comprises one of identifying a phase-to-phase fault, identifying a phase-to-phase-to-ground fault, identifying a three-phase fault, or identifying a three-phase-to-ground fault. HA-2 teaches: identifying the fault comprises one of identifying a phase-to-phase fault, identifying a phase-to-phase-to-ground fault, identifying a three-phase fault, or identifying a three-phase-to-ground fault. (As above, [0013]: “Faulty phase identification is performed by a faulty phase identification component 114… faulty phase identification component 114 (i.e., “faulty phase indicator”) comprises the digital signal of the faulty phase, D_ftPhs, where the following values of D_ftPhs are shown accompanied by their representative meanings”, with details, Pg. 5, lines 6-16, including identification of phase-to-ground and phase-to-phase faults based on evaluation of faulty phase indicator values.) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include determination of specific faulty type as described and taught by HA-2, because this would have the advantage of providing specific information about what may have caused a fault, and allow for preemptive prevention to avoid subsequent faults and/or to make more informed decisions regarding necessary adjustments to correct a fault. Incorporating these calculational-based steps taught by HA-2 with the method/system of NAIDU as modified by HA and DASHTDAR has the advantage of improving value of obtainable results without any additional measurements, which adds knowledge without extra expense. With respect to Claim 24, NAIDU in view of HA and DASHTDAR and further in view of HA-2, teaches limitations of claim 23. NAIDU, as modified by HA and DASHTDAR and taught above, does not teach: generating each of the first section fault phase indicator and the second section fault phase indicator is based on applying one of a plurality of conditions in accordance with the one of the phase-to-phase-to-ground fault, the three-phase fault, or the three-phase-to-ground fault indicated by the faulty phase indicator. HA-2 teaches: generating each of the first section fault phase indicator and the second section fault phase indicator is based on applying one of a plurality of conditions in accordance with the one of the phase-to-phase-to-ground fault, the three-phase fault, or the three-phase-to-ground fault indicated by the faulty phase indicator. (As above, [0013]: “Faulty phase identification is performed by a faulty phase identification component 114…faulty phase identification component 114 (i.e., “faulty phase indicator”) comprises the digital signal of the faulty phase, D_ftPhs, where the following values of D_ftPhs are shown accompanied by their representative meanings”, with details, Pg. 5, lines 6-16) It would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to further modify NAIDU as modified by HA and DASHTDAR as taught above, to include a plurality of conditions in accordance with specific faulty types as described, to generate fault phase indicators in each section, as taught by HA-2, because this would have the advantage of quickly ascertaining a specific fault type based on expected parameter values from each. While NAIDU, as modified by HA and DASHTDAR above, teaches analysis of each section, it would be obvious improvement of that method to perform the more details analysis steps as taught by HA-2 in those sections to arrive at detailed location and type information for a faulty identification method/system. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is included in previous office actions. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONI D SAUNCY whose telephone number is (703)756-4589. The examiner can normally be reached Monday - Friday 8:30 a.m. - 5:30 p.m. ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Catherine Rastovski can be reached at 571-270-0349. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TONI D SAUNCY/Examiner, Art Unit 2857 /Catherine T. Rastovski/Supervisory Primary Examiner, Art Unit 2857
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Prosecution Timeline

Mar 22, 2023
Application Filed
Aug 26, 2025
Non-Final Rejection mailed — §101, §103
Nov 20, 2025
Response Filed
Feb 03, 2026
Final Rejection mailed — §101, §103
Apr 03, 2026
Response after Non-Final Action
Apr 28, 2026
Request for Continued Examination
May 04, 2026
Response after Non-Final Action
Jun 01, 2026
Non-Final Rejection mailed — §101, §103 (current)

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Expected OA Rounds
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