DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 24 April 2026 has been entered.
Response to Arguments
Applicant’s arguments, see Remarks, filed 21 January 2026, with respect to the objections to specifications, drawings, and claims 1, 12, and 20 have been fully considered and are persuasive. Therefore, these objections have been withdrawn. However, upon further considerations, a new grounds of objections and rejections under 35 USC § 112 are made due to the amendments to the independent claims. Furthermore, new grounds of rejection under 35 USC § 102 for independent claims 1, 12, and 20 as anticipated by Peng is made.
In summary, this application is not in a condition for an allowance.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the a first-cross-section having a first non-rectangular shape and a notch aligned to a signal contact area and a second cross-section having a second non-rectangular shape that includes an extension aligned with a power contact area, as required in claims 1, 12, and 20, must be shown or the features cancelled from the claims. No new matter should be entered.
The examiner notes that the drawings and specifications does not clearly delineate a first-cross section and a second cross-section of the power rail. For example, Fig. 2, reproduced below, only the first cross-section in the figure below having a non-rectangular shape with a notch (222) aligned to signal CA (116). The second cross-section continues to have a rectangular shape, and does not have any extensions aligned with the power contact area (114).
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Fig. 2 of the instant application
Similarly, Fig. 4, also reproduced below, shows no non-rectangular cross-sections, i.e., each cross-section is rectangularly shaped.
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Fig. 4 of the instant application
Furthermore, even though Fig. 5 of the instant application, shows two non-rectangular cross-sections (due to extensions 122 and 124), the figure does not show a notch in the first cross-section that is aligned with the signal CA (116).
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Fig. 5 of the instant application
Similarly, Fig. 3 of the instant application, reproduced below, shows no extensions in the second cross-section that is aligned with the power CA (114).
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Fig. 3 of the instant application
Furthermore, the middle-of-line (MOL) contact layer electrically connected to the power rail by a metal wiring layer, with the MOL contact layer being a different element than that of the power contact area, as required in claims 1, 12, and 20 must be shown or the features cancelled from the claims. No new matter should be entered. Paragraph [0023] refers to element 12 ( M1 ) as the metal wiring layer. However, no MOL contact layer is shown to be connected to both the power rail and the metal wiring layer. For the purpose of compact prosecution, the examiner will cite art that teaches the metal wiring layer to be the same as the power contact area.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 10-13, and 20-34 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claims contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. As explained in the drawings objection above, key subject matters added in the amendment to independent claims 1, 12, and 20 are missing in the disclosure. The originally filed specification does not describe a power rail having a non-rectangular shaped first cross-section that includes a notch aligned with a signal contact area and having a non-rectangular shaped second cross-section that includes an extension aligned with a power contact area. Hence, the amendment has introduced new matter to the application.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 10-13, and 20-34 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Peng (US 2021/0375851 A1).
Regarding claim 1, Peng teaches a semiconductor structure comprising:
a power rail (MP-2 & V1 & M1 & V0 & M0 & GT-E & M0-P; see Fig. 3B and ¶ [0048] ) having a plurality of cross-sections (M1&V0, top M0-P & right-most GT-E, M2-P & V1, bottom M0-P & left-most GT-E, and M0 & middle GT-E, are each independent cross-sections of the entire power rail) along a length (length of rail is along x-axis) of the power rail; and
a middle-of-line (MOL) contact layer (MD; ¶ [0027]: is a gate-layer conductive line; hence it is an MOL contact layer) electrically connected to the power rail by a metal wiring layer (VD-1),
wherein a first cross-section (M1 & V0), of the plurality of cross-sections, is at a first position (middle of Fig. 3B) along the length of the power rail and has a first non-rectangular shape (M1 & V0, as a unit, has a non-rectangular shape) that includes a notch (N, see Examiner Fig. 1) aligned with a signal contact area (CA) (214; see also Fig. 2A and ¶ [0038]: 214 is connected to output node ZN; hence it is a signal contact area );
wherein a second cross-section (top M0-P and right-most GT-E; see Fig. 3B), of the plurality of cross-sections, is at a second position (top and right side of Fig. 3B) along the length of the power rail and has a second non-rectangular shape (top M0-P and right-most GT-E, as a unit, has a non-rectangular shape) that includes an extension (the top M0-P is an extension of the right-most GT-E) aligned with a power CA (VD-1; see ¶ [0048]) of the MOL contact layer; and
wherein a first width (width of V0 along the Y-axis) of the first cross-section is different than a second width (width of top M0-P along the Y-axis) of the second cross-section (above-mentioned cross-sections have varying widths).
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Examiner Fig. 1. Taken from Figs. 2A and 3b of Peng
Regarding claim 10, the semiconductor structure of claim 1, wherein the power rail is a via rail (abovementioned power rail contains via elements such as V1 & V2; see Fig. 3B).
Regarding claim 11, the semiconductor structure of claim 1, wherein the power rail is a VARAIL (abovementioned power rail contains via elements such as V1 & V2; see Fig. 3B; see definition of VARAIL in ¶ [0026] of the instant application).
Regarding claim 12, Peng teaches a semiconductor structure comprising:
an irregular-shaped power rail (MP-2 & V1 & M1 & V0 & M0 & GT-E & M0-P; see Fig. 3B and ¶ [0048] ), wherein the irregular-shaped power rail includes a plurality of cross-sections (M1&V0, top M0-P & right-most GT-E, bottom M0-P & left-most GT-E, MP-2 & V1, and M0 & center GT-E are each independent cross-sections of the entire power rail) along a length (length of rail is along x-axis) of the irregular-shaped power rail; and
a middle-of-line (MOL) contact layer (MD; ¶ [0027]: is a gate-layer conductive line; hence it is an MOL contact layer) electrically connected to the irregular-shaped power rail by a metal wiring layer (VD-1),
wherein a first cross-section (M1 & V0), of the plurality of cross-sections, is at a first position (middle of Fig. 3B) along the length of the irregular-shaped power rail and includes a notch (N, see Examiner Fig. 1 in claim 1 rejection above) aligned with a signal contact area (CA) (214; see also Fig. 2A and ¶ [0038]: 214 is connected to output node ZN; hence it is a signal contact area );
wherein a second cross-section (top M0-P and right-most GT-E; see Fig. 3B), of the plurality of cross-sections, is at a second position (top and right side of Fig. 3B) along the length of the irregular-shaped power rail and includes a projection (the top M0-P is a projection of GT-E) aligned with a power CA (VD-1; see ¶ [0048]) of the MOL contact layer; and
wherein a first width (width of V0 along the Y-axis) of the first cross-section is different than a second width (width of top M0-P along the Y-axis) of the second cross-section.
Regarding claim 13, the semiconductor structure of claim 12, wherein the irregular-shaped power rail includes stepped portions (M2-P, M1, M0, and M0-P in Fig. 3B are each stepped portions since they belong to different metal layers).
Regarding claim 20, Peng teaches a method for constructing a semiconductor structure, the method comprising:
forming a power rail (MP-2 & V1 & M1 & V0 & M0 & GT-E & M0-P; see Fig. 3B and ¶ [0048] ) having a plurality of cross-sections (M1&V0&M0, top M0-P & right-most GT-E, are each independent cross-sections of the entire power rail) along a length (length of rail is along x-axis) of the power rail; and
electrically connecting a middle-of-line (MOL) contact layer (MD; ¶ [0027]: is a gate-layer conductive line; hence it is an MOL contact layer) to the power rail by a metal wiring layer (VD-1),
wherein a first cross-section (M1 & V0), of the plurality of cross-sections, is at a first position (middle of Fig. 3B) along the length of the power rail and has a first non-rectangular shape (M1 & V0, as a unit, has a non-rectangular shape) that includes a notch (N, see Examiner Fig. 1) aligned with a signal contact area (CA) (214; see also Fig. 2A and ¶ [0038]: 214 is connected to output node ZN; hence it is a signal contact area );
wherein a second cross-section (top M0-P and right-most GT-E; see Fig. 3B), of the plurality of cross-sections, is at a second position (top and right side of Fig. 3B) along the length of the power rail and has a second non-rectangular shape (top M0-P and right-most GT-E, as a unit, has a non-rectangular shape) that includes an extension (the top M0-P is an extension of GT-E) aligned with a power CA (VD-1; see ¶ [0048]) of the MOL contact layer; and
wherein a first width (width of V0 along the Y-axis) of the first cross-section is different than a second width (width of top M0-P along the Y-axis) of the second cross-section.
Regarding claim 21, the semiconductor structure of claim 1,
wherein the notch is a first notch (N; see claim 1 rejection);
wherein the signal CA is a first signal CA (214; see claim 1 rejection); and
wherein a third cross-section (M2-P & V1; see Fig. 3B), of the plurality of cross-sections, is at a third position (middle-left of Fig. 3B) along the length of the power rail and has a third non-rectangular shape (M2-P & V1, as a unit, has a non-rectangular shape) that includes a second notch (N2, see Examiner Fig. 2 below) aligned with a second signal CA (212; ¶ [0038]: 212 is connected to input node A1; hence it is a second signal CA) .
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Examiner Fig. 2. Taken from Peng Figs. 2A and 3B.
Regarding claim 22, the semiconductor structure of claim 21, wherein a third width (width of M2-P along the y-axis) of the third cross-section is different than the first width (width of V0 along the Y-axis).
Regarding claim 23, the semiconductor structure of claim 1,
wherein the extension is a first extension (top M0-P in Fig. 3B is a first extension);
wherein the power CA is a first power CA (VD-1 is a first power CA); and
wherein a third cross-section (M0 & middle GT-E), of the plurality of cross-sections, is at a third position (bottom-right of Fig. 3B) along the length of the power rail and has a third non-rectangular shape (as a unit, M0 & center GT-E is non-rectangular) that includes a second extension (M0) aligned with a second power CA (VD-2) of the MOL contact layer.
Regarding claim 24, the semiconductor structure of claim 21, wherein a third width (width of M2-P along the y-axis; see Fig. 3B) of the third cross-section is different than the second width (width of top M0-P along the Y-axis).
Regarding claim 25, the semiconductor structure of claim 1, wherein the second width (width of top M0-P along the Y-axis; see Fig. 3B) is greater than the first width (width of V0 along the Y-axis).
Regarding claim 26, the semiconductor structure of claim 1, wherein a third cross-section (M2-P & V1; see Fig. 3B), of the plurality of cross-sections, is at a third position (middle-left of Fig. 3B) that is:
along the length of the power rail (M2-P extends along the x-axis),
not aligned with the signal CA (Examiner Fig. 1 in claim 1 rejection above shows M2-P & V1 not aligned with 214), and
not aligned with the power CA (Fig. 3B shows M2-P & V1 not aligned with VD-1).
Regarding claim 27, the semiconductor structure of claim 26, wherein a third width (width of M2-P along the Y-axis) of the third cross-section is greater than the first width (width of V0 along the Y-axis).
Regarding claim 28, the semiconductor structure of claim 26, wherein a third width (width of V1 along the Y-axis) of the third cross-section is less than the second width (width of top M0-P along the Y-axis).
Regarding claim 29, the semiconductor structure of claim 12,
wherein the notch is a first notch (notch N; see claim 12 rejection above);
wherein the signal CA is a first signal CA (214; see claim 12 rejection above); and
wherein a third cross-section (M2-P & V1; see Fig. 3B), of the plurality of cross-sections, is at a third position (middle-left of Fig. 3B), of the plurality of cross-sections, is at a third position (middle-left of Fig. 3B) along the length of the irregular-shaped power rail and includes a second notch (N2, see Examiner Fig. 2 in claim 21 rejection above) aligned with a second signal CA (212; ¶ [0038]: 212 is connected to input node A1; hence it is a second signal CA); and
wherein a third width (width of M2-P along the Y-axis) of the third cross-section is different than the first width (width of V0 along the Y-axis).
Regarding claim 30, the semiconductor structure of claim 12,
wherein the projection is a first projection (the top M0-P is a projection, see claim 12 above);
wherein the power CA is a first power CA (VD-1 is a power CA, see claim 12 above); and
wherein a third cross-section (M0 & middle GT-E), of the plurality of cross-sections, is at a third position (bottom-right of Fig. 3B) along the length of the irregular-shaped power rail and includes a second projection (M0) aligned with a second power CA (VD-2) of the MOL contact layer; and wherein a third width (width of middle GT-E) of the third cross-section is different than the second width (width of top M0-P).
Regarding claim 31, the semiconductor structure of claim 12, wherein the second width (width of top M0-P along the Y-axis; see Fig. 3B) is greater than the first width (width of V0 along the Y-axis).
Regarding claim 32, the semiconductor structure of claim 12, wherein a third cross-section (M2-P & V1; see Fig. 3B), of the plurality of cross-sections, is at a third position (middle-left of Fig. 3B) that is:
along the length of the irregular-shaped power rail (M2-P extends along the x-axis),
not aligned with the signal CA (Examiner Fig. 1 in claim 1 rejection above shows M2-P & V1 not aligned with 214), and
not aligned with the power CA (Fig. 3B shows M2-P & V1 not aligned with VD-1).
Regarding claim 33, the semiconductor structure of claim 32, wherein a third width (width of M2-P along the Y-axis, see Fig. 3B) of the third cross-section is greater than the first width (width of V0 along the Y-axis).
Regarding claim 34, the semiconductor structure of claim 32, wherein a third width (width of V1 along the Y-axis, see Fig. 3B) of the third cross-section is less than the second width (width of top M0-P along the Y-axis).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS YAP whose telephone number is (703)756-1946. The examiner can normally be reached Monday - Friday 8:00 AM - 5:00 PM ET.
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/DOUGLAS YAP/Assistant Examiner, Art Unit 2899
/ZANDRA V SMITH/Supervisory Patent Examiner, Art Unit 2899
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