DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species B in the reply filed on 6/3/2026 is acknowledged.
Claims 1-7 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 6/3/2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 11 and 16-20 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 11, the limitations “a first high-k layer” and “a second high-k layer” are unclear as to how they are related to the “vertical high-k layer” recited in claim 8.
Regarding claim 16, the claim is unclear as to what constitutes the preamble. Specifically, the claim appears to be drawn to the “A replacement gate structure… the replacement gate structure comprising” however it is unclear if the claim requires “a gate spacer.”
Regarding claim 16, the limitations “a first (second) high-k layer around one or more first (second) channel(s) that are covered by the replacement gate structure,” is unclear as to how it is related to the previously recited “[a] replacement gate structure… the replacement gate structure comprising.” Specifically, the claim appears to be drawn to the replacement gate structure, and therefore it is unclear as to if the first (second) channel(s) are required by the claim because they are recited as elements outside the replacement gate structure (i.e. “covered by the replacement gate structure”), but present in the body of the claim following the language “the replacement gate structure comprising.”
Regarding claim 18, the limitation “further comprising: a common conductive gate upon the first WF gate and upon the second WF gate,” is unclear as to what is meant by “common conductive gate.” Specifically, a common gate would generally be understood to require a shared (i.e. not separate) gate, however applicant has elected the species of Fig. 22 which shows two separate conductive gates. It is therefore unclear as to the proper interpretation of the limitation.
Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 8-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang et al. (US 20220173097; herein “Yang”).
Regarding claim 8, Yang discloses in Fig. 10 and related text a semiconductor IC device comprising:
a first plurality of nanosheets (e.g. NSS of TR1, see [0025]) surrounded by a first work function (WF) gate (e.g. ML2 in TR1, see [0067]), the first WF gate comprising a first vertical WF gate portion;
a second plurality of nanosheets (e.g. NSS of TR2) surrounded by a second WF gate (e.g. ML1 in TR2, see [0067]), the second WF gate comprising a second vertical WF gate portion;
a vertical high-k layer (e.g. 152 and/or 550C, see [0046] and/or [0091]) in contact with and between the first vertical WF gate portion and the second vertical WF gate portion;
a first conductive gate (e.g. ML3 in TR1, see [0067]) upon the first WF gate; and
a second conductive gate (e.g. ML2 in TR2, see [0067]) upon the second WF gate.
Regarding claim 9, Yang further discloses wherein the first vertical WF gate portion, the vertical high-k layer, and the first vertical WF gate portion separate the first conductive gate from the second conductive gate (see Fig. 10).
Regarding claim 10, Yang further discloses the vertical high-k layer, the second WF gate, the first conductive gate, the second conductive gate are between a shared gate spacer (150A/150B, see [0036]).
Regarding claim 11, Yang further discloses wherein a first high-k layer (e.g. 152 around NSS of TR1, see [0046]) is between the first WF gate and the first plurality of nanosheets and wherein a second high-k layer (e.g. 152 around NSS of TR2) is between the second WF gate and the second plurality of nanosheets.
Regarding claim 12, Yang further discloses wherein a thickness of the vertical high-k layer (in the interpretation that the vertical high-k layer is 152 along 550) is equal to or less than a sum of a thickness of the first high-k layer (152 around NSS of TR1) and a thickness of the second high-k layer (152 around NSS of TR2).
Regarding claim 13, Yang further discloses
a replacement gate cap (e.g. 164, see [0054]) upon the first WF gate, the vertical high-k layer, the second WF gate, the first conductive gate, and the second conductive gate;
an interlayer dielectric (ILD) (e.g. 190, see [0059]) upon the replacement gate cap; and
a gate contact (e.g. 582, see [0095]) within the ILD and within the replacement gate cap, the gate contact connected to the first conductive gate and to the second conductive gate.
Regarding claim 14, Yang further discloses a gate contact (e.g. 582, see [0095]) connected to the first conductive gate and to the second conductive gate.
Regarding claim 15, Yang further discloses wherein the gate contact (582) is further connected to the first vertical WF gate portion (ML2 of TR1) and to the second vertical WF gate portion (ML1 of TR2).
Regarding claim 16, Yang discloses in Fig. 10 and related text a replacement gate structure within a gate spacer, the replacement gate structure comprising:
a first high-k layer (e.g. 152 around NSS of TR1, see [0046]) around one or more first channel(s) (e.g. NSS of TR1, see [0025]) that are covered by the replacement gate structure;
a second high-k layer (e.g. 152 around NSS of TR2) comprising around one or more second channel(s) (e.g. NSS of TR2) that are covered by the replacement gate structure;
a first work function (WF) gate (e.g. ML2 in TR1, see [0067]) upon the first high-k layer; and
a second WF gate (e.g. ML2 in TR1, see [0067]) upon the second high-k layer.
Regarding claim 17, Yang further discloses
a first conductive gate (e.g. ML3 in TR1, see [0067]) upon the first WF gate; and
a second conductive gate (e.g. ML2 in TR2, see [0067]) upon the second WF gate.
Regarding claim 18, Yang further discloses a common conductive gate (e.g. ML3 in TR1/ML2 in TR2/582/586) upon the first WF gate and upon the second WF gate.
Regarding claim 19, Yang further discloses wherein the first WF gate (ML2 in TR1) comprises a first vertical WF portion (portion along 152/550C) and a first channel WF portion (portion around NSS) around the one or more first channel(s) and wherein the second WF gate (ML1 in TR2) comprises a second vertical WF portion (portion along 152/550C) and a second channel WF portion (portion around NSS) around the one or more second channel(s).
Regarding claim 20, Yang further discloses wherein the first vertical gate WF portion, the first vertical high-k portion, the second vertical WF gate portion, and the second vertical high-k portion separate the first conductive gate from the second conductive gate (see Fig. 10).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LAUREN R BELL/Primary Examiner, Art Unit 2896