DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5-7, 9-11, 13-15 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over US 2008/0135846 A1 to Shi et al. (hereinafter “Shin” – previously cited reference) in further view of US 2021/0358968 A1 to Xu (hereinafter “Xu” – previously cited reference).
Regarding claim 1, Shin discloses a display panel, comprising an electrostatic protection circuit (display device having ESD protection circuit 100; abstract; Fig. 3; paragraphs [0003], [0040]), wherein the electrostatic protection circuit comprises a thin film transistor that comprises an active layer (ESD protection circuit 100 comprising protection TFT 110 having active region with semiconductor layers; abstract; Fig. 3; paragraphs [0012], [0040]) comprising:
a channel portion; and
at least one auxiliary electrode contacting the channel portion directly (channel region having plurality of floating electrodes 74 disposed therein; Fig. 3; paragraph [0049]);
wherein at least one auxiliary electrode is plural, the auxiliary electrodes are disposed on the channel portion, and the auxiliary electrodes are distributed at intervals along a channel length direction (channel region having plurality of floating electrodes 74 disposed at intervals therein; Fig. 3; paragraph [0049]);
wherein the thin film transistor further comprises a source electrode and a drain electrode, and the auxiliary electrodes, the source electrode, and the drain electrode are disposed in a same layer (TFT 110 having source 61, drain 71, and electrodes 74 disposed in the same horizontal plane; Fig. 3; paragraph [0049]), the auxiliary electrodes are distributed at the intervals between the source electrode and the drain electrode, one of the auxiliary electrodes closest to the source electrode is spaced from the source electrode, and one of the auxiliary electrodes closest to the drain electrode is spaced from the drain electrode (electrodes 74 spaced from the source 61 and drain 71 and disposed at intervals therebetween; Fig. 3; paragraph [0049]).
Shin fails to disclose wherein the channel portion comprises a plurality of bending sections, and bending directions of adjacent two of the bending sections are different.
However, Xu discloses wherein the channel portion comprises a plurality of bending sections, and bending directions of adjacent two of the bending sections are different (active layer comprises terminal ends that are bent downwardly in opposite directions; Fig. 2B).
Shin and Xu are both considered to be analogous to the claimed invention because they are in the same field of display device technology. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Shin to incorporate the teaching of Xu in order to potentially provide increased surface area for charge dissipation, improved field distribution, higher current capacity, and reduced resistance.
Regarding claim 5, Shin in view of Xu discloses the display panel of claim 1. Shin fails to disclose wherein each of the at least one auxiliary electrode is disposed on each of the bending sections.
However, Xu discloses wherein each of the at least one auxiliary electrode is disposed on each of the bending sections (auxiliary electrodes 271 disposed above bent terminal ends of active layer; Fig. 2B).
Shin and Xu are both considered to be analogous to the claimed invention because they are in the same field of display device technology. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Shin to incorporate the teaching of Xu in order to potentially provide increased surface area for charge dissipation, improved field distribution, higher current capacity, and reduced resistance.
Regarding claim 6, Shin in view of Xu discloses the display panel according to claim 1, wherein the channel portion comprises at least two sub-channel portions, and the sub-channel portions are disposed at intervals along a channel width direction (channel region comprises at least two sub-regions disposed between electrodes 74 along channel region width direction; Fig. 3).
Regarding claim 7, Shin in view of Xu discloses the display panel according to claim 6, wherein adjacent two of the at least two sub-channel portions are parallel to each other or disposed symmetrically (channel region comprises at least two sub-regions disposed parallel relative one another and symmetrically between electrodes 74 along channel region width direction; Fig. 3).
Regarding claim 9, Shin in view of Xu discloses the display panel according to claim 1, wherein the thin film transistor comprises a gate electrode, and the auxiliary electrodes are disposed on a surface of the active layer near or away from the gate electrode (TFT 110 comprises gate electrode 21 with electrodes 74 disposed within active region away from gate electrode 21; Fig. 3).
Regarding claim 10, Shin in view of Xu discloses the display panel according to claim 1, wherein material of the active layer is oxide semiconductor or silicon semiconductor (semiconductor layers may be made from amorphous silicon; paragraph [0071]).
Regarding claim 11, Shin discloses a display panel, comprising an electrostatic protection circuit (display device having ESD protection circuit 100; abstract; Fig. 3; paragraphs [0003], [0040]), wherein the electrostatic protection circuit comprises a thin film transistor that comprises an active layer (ESD protection circuit 100 comprising protection TFT 110 having active region with semiconductor layers; abstract; Fig. 3; paragraphs [0012], [0040]) comprising:
a channel portion; and
at least one auxiliary electrode contacting the channel portion directly (channel region having plurality of floating electrodes 74 disposed therein; Fig. 3; paragraph [0049]);
wherein at least one auxiliary electrode is plural, the auxiliary electrodes are disposed on the channel portion, and the auxiliary electrodes are distributed at intervals along a channel length direction (channel region having plurality of floating electrodes 74 disposed at intervals therein; Fig. 3; paragraph [0049]); wherein the channel portion is at least partially bending (channel region bent downwardly on either end; Fig. 3);
wherein the thin film transistor further comprises a source electrode and a drain electrode, and the auxiliary electrodes, the source electrode, and the drain electrode are disposed in a same layer (TFT 110 having source 61, drain 71, and electrodes 74 disposed in the same horizontal plane; Fig. 3; paragraph [0049]), the auxiliary electrodes are distributed at the intervals between the source electrode and the drain electrode, one of the auxiliary electrodes closest to the source electrode is spaced from the source electrode, and one of the auxiliary electrodes closest to the drain electrode is spaced from the drain electrode (electrodes 74 spaced from the source 61 and drain 71 and disposed at intervals therebetween; Fig. 3; paragraph [0049]).
Shin fails to disclose wherein the channel portion comprises a plurality of bending sections, and bending directions of adjacent two of the bending sections are different.
However, Xu discloses wherein the channel portion comprises a plurality of bending sections, and bending directions of adjacent two of the bending sections are different (active layer comprises terminal ends that are bent downwardly in opposite directions; Fig. 2B).
Shin and Xu are both considered to be analogous to the claimed invention because they are in the same field of display device technology. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Shin to incorporate the teaching of Xu in order to potentially provide increased surface area for charge dissipation, improved field distribution, higher current capacity, and reduced resistance.
Regarding claim 13, Shin in view of Xu discloses the display panel of claim 11. Shin fails to disclose wherein each of the at least one auxiliary electrode is disposed on each of the bending sections.
However, Xu discloses wherein each of the at least one auxiliary electrode is disposed on each of the bending sections (auxiliary electrodes 271 disposed above bent terminal ends of active layer; Fig. 2B).
Shin and Xu are both considered to be analogous to the claimed invention because they are in the same field of display device technology. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Shin to incorporate the teaching of Xu in order to potentially provide increased surface area for charge dissipation, improved field distribution, higher current capacity, and reduced resistance.
Regarding claim 14, Shin in view of Xu discloses the display panel according to claim 11, wherein the channel portion comprises at least two sub-channel portions, and the sub-channel portions are disposed at intervals along a channel width direction (channel region comprises at least two sub-regions disposed between electrodes 74 along channel region width direction; Fig. 3).
Regarding claim 15, Shin in view of Xu discloses the display panel according to claim 14, wherein adjacent two of the sub-channel portions are parallel to each other or disposed symmetrically (channel region comprises at least two sub-regions disposed parallel relative one another and symmetrically between electrodes 74 along channel region width direction; Fig. 3).
Regarding claim 17, Shin in view of Xu discloses the display panel according to claim 11, wherein the thin film transistor comprises a gate electrode, and the auxiliary electrodes are disposed on a surface of the active layer near or away from the gate electrode (TFT 110 comprises gate electrode 21 with electrodes 74 disposed within active region away from gate electrode 21; Fig. 3).
Regarding claim 18, Shin in view of Xu discloses the display panel according to claim 11, wherein material of the active layer is oxide semiconductor or silicon semiconductor (semiconductor layers may be made from amorphous silicon; paragraph [0071]).
Response to Arguments
Applicant's arguments filed June 5, 2026 have been fully considered. Applicant provides substantive amendments to claims 1 and 11 and corresponding arguments. Specifically, Applicant asserts that the disclosure of Xu that meets the limitation amended into claims 1 and 11 is done for a different purpose than what is disclosed in Applicant’s Specification. Even if Examiner concedes this point, this limitation is still disclosed by Xu. Applicant does not dispute the combination of Shin with Xu. Therefore, Shin in view of Xu discloses amended claims 1 and 11. If Applicant wishes to differentiate over Shin in view of Xu based upon the purpose of the bending sections, then Applicant should amend claims 1 and 11 accordingly in a manner that does not amount to mere functional language (assuming Shin in view of Xu would be capable of such functionality).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p.
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/IAN DEGRASSE/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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