DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lin et al. (United States Patent Application Publication No. US 2024/0023320 A1, hereinafter “Lin”).
In reference to claim 1, Lin discloses a device which meets the claim. Fig. 5 and 10 of Lin each discloses a semiconductor device which comprises a memory cell array (502) that includes a vertical conductive line (518), a horizontal conductive line (512), and a data storage element (516). A peripheral circuit portion (532) is disposed at a lower-level than the memory cell array (502). There is a first bonding pad structure ((538) under (518)) suitable for electrically connecting the vertical conductive line (518) of the memory cell array (502) and the peripheral circuit portion (532). Lin does not refer to the first bonding pad structure ((538) under (518)) as a bonding pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus this limitation is not patentable over Lin. The applicant’s currently filed specification defines a coupling/connecting relationship between two objects can mean that intervening objects can be between two objects that are coupled/connected to each other (p. 7-8, paragraphs 22-23). Thus in the broadest reasonable interpretation, an upper pad (522) is disposed at a higher level than the memory cell array (502) and is coupled to the data storage element (516). The upper pad (522) is connected to the data storage element (516) through a contact plug (note unlabeled contact plugs in direct contact with the upper pad (522)).
With regard to claim 2, a first contact plug (below (518) and (524) – note unlabeled tapered contact plugs) coupled to the vertical conductive line (518). A first lower pad ((524) under (518)) is between the first contact plug (below (518) and (524) – note unlabeled tapered contact plugs) and the first bonding pad structure (538). Lin does not refer to the first lower pad ((524) under (518)) as a pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus claim 2 is not patentable over Lin
In reference to claim 3, a second bonding pad structure ((524) under (519)) is disposed at a lower-level than the memory cell array (502) and electrically connects the horizontal conductive line (512) and the peripheral circuit portion (532). Lin does not refer to the second bonding pad structure ((524) under (519)) as a pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus claim 3 is not patentable over Lin.
With regard to claim 4, as noted above, the applicant’s currently filed specification defines a coupling/connecting relationship between two objects can mean that intervening objects can be between two objects that are coupled/connected to each other (p. 7-8, paragraphs 22-23). Therefore there is a second contact plug (note unlabeled tapered contact plugs under (519) and (524)) coupled to an end of the horizontal conductive line (512). A second lower pad (note unlabeled structure that is the same as (538) under (519) and (524)) between the second contact plug (note unlabeled tapered contact plugs under (519) and (524)) and the second bonding pad structure ((524) under (519)). Lin does not refer to the second lower pad (note unlabeled structure that is the same as (538) under (519) and (524)) as a pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus claim 4 is not patentable over Lin.
In reference to claim 5, Lin discloses that the first bonding pad structure ((538) under (518)) includes hybrid bonding (p. 10, paragraph 128).
With regard to claim 6, there is a multi-layer interconnection (note multiple conductive structures between (538) and the source/drain region of transistor in (532)) between the peripheral circuit portion (532) and the first bonding pad structure ((538) under (518)).
In reference to claim 7, the horizontal conductive line (512) includes a word line (p. 11, paragraph 136) and the data storage element (516) includes a capacitor (p. 7, paragraph 96). The vertical conductive line (518) is in direct conductive contact with the bit line (514) and thus functions as part of the bit line (514).
In reference to claim 8, Lin discloses a device which meets the claim. Fig. 5 and 10 of Lin each discloses a semiconductor device which comprises a memory cell array (502) that includes a vertical conductive line (518), a horizontal conductive line (512), and a data storage element (516). A peripheral circuit portion (532) is disposed at a lower-level than the memory cell array (502). There is a first bonding pad structure (note unlabeled structures that are the same as (538) under (516)) suitable for electrically connecting the data storage element (516) of the memory cell array (502) and the peripheral circuit portion (532). Lin does not refer to the first bonding pad structure (note unlabeled structures that are the same as (538) under (516)) as a bonding pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus this limitation is anticipated by Lin. The applicant’s currently filed specification defines a coupling/connecting relationship between two objects can mean that intervening objects can be between two objects that are coupled/connected to each other (p. 7-8, paragraphs 22-23). Thus in the broadest reasonable interpretation, an upper pad (522) is disposed at a higher level than the memory cell array (502) and is coupled to the vertical conductive line (518). The upper pad (522) is connected to the vertical conductive line (518) through a contact plug (note unlabeled contact plugs in direct contact with the upper pad (522)).
With regard to claim 9, a first contact plug (note unlabeled tapered contact plugs under (516)) coupled to the data storage element (516). A first lower pad (note unlabeled structure that is the same as (524) under (516)) is between the first contact plug (note unlabeled tapered contact plugs under (516)) and the first bonding pad structure (note unlabeled structures that are the same as (538) under (516)). Lin does not refer to the first lower pad (note unlabeled structure that is the same as (524) under (516)) as a pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required, thus claim 9 is anticipated by Lin.
In reference to claim 10, a second bonding pad structure ((524) under (519)) is disposed at a lower-level than the memory cell array (502) and electrically connects the horizontal conductive line (512) and the peripheral circuit portion (532).
With regard to claim 11, as noted above, the applicant’s currently filed specification defines a coupling/connecting relationship between two objects can mean that intervening objects can be between two objects that are coupled/connected to each other (p. 7-8, paragraphs 22-23). Thus there is a second contact plug (note unlabeled tapered contact plugs under (519) and (524)) coupled to an end of the horizontal conductive line (512). A second lower pad (note unlabeled structure that is the same as (538) under (519) and (524)) between the second contact plug (note unlabeled tapered contact plugs under (519) and (524)) and the second bonding pad structure ((524) under (519)). Lin does not refer to the second lower pad (note unlabeled structure that is the same as (538) under (519) and (524)) as a pad. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus claim 11 is anticipated by Lin.
In reference to claim 12, Lin discloses that the first bonding pad structure (note unlabeled structures that are the same as (538) under (516)) includes hybrid bonding (p. 10, paragraph 128).
With regard to claim 13, there is a multi-layer interconnection (note multiple conductive structures between (538) and the source/drain region of transistor in (532)) between the peripheral circuit portion (532) and the first bonding pad structure (note unlabeled structures that are the same as (538) under (516)).
In reference to claim 14, the horizontal conductive line (512) includes a word line (p. 11, paragraph 136) and the data storage element (516) includes a capacitor (p. 7, paragraph 96). The vertical conductive line (518) is in direct conductive contact with the bit line (514) and thus functions as part of the bit line (514).
With regard to claim 15, as noted above, the applicant’s currently filed specification defines a coupling/connecting relationship between two objects can mean that intervening objects can be between two objects that are coupled/connected to each other (p. 7-8, paragraphs 22-23). Thus fig. 5, 10, and 11 of Lin disclose that the upper pad (522) is connected to the data storage element (516) through a common conductive structure (525). Lin does not refer to the common conductive structure (525) as a common plate. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e. identity of terminology is not required; thus claim 15 is not patentable over Lin.
Response to Arguments
Applicant's arguments filed November 17, 2025 have been fully considered but they are not persuasive. The applicant has amended claim 1 to further state that, “the upper pad is connected to the data storage element through a contact plug.” In a similar manner, the applicant has amended claim 8 to further state that, “the upper pad is connected to the vertical conductive line through a contact plug.” The applicant argues that (p. 10 of the response, emphasis added), “Lin does not disclose any direct connection between the storage unit 516 and the pad structure 522, nor between the bit line 514 and the pad structure 522.” However amended claim 1 does not explicitly require that the storage unit 516 is directly connected to the pad structure 522. Furthermore amended claim 8 also does not explicitly require that the bit line 514 is directly connected to the pad structure 522. Therefore as further detailed in the above Office action, Lin anticipates amended claims 1 and 8. New claim 15 further describes the upper pad as being connected to a common plate of the data storage element. As noted in the above Office action, although not explicitly referred to as a common plate, Lin discloses this new limitation. Therefore claims 1-15 stand rejected in the above Office action.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KEVIN QUINTO/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893