Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 14-16 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/15/2025.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. [US PGPUB 20140184057] in view of Choi et al. [US PGPUB 20210335896] in view of Choi et al. [US PGPUB 20200286817] (hereinafter Kim, Choi, and Choi817).
Regarding claim 1, Kim teaches a display panel, comprising;
a circuit substrate (52, Fig. 5), comprising at least one installation area (region of structure 52 overlapping with structure 46/50, Fig. 5) and at least one connection area (region of structure 52 where conductive via 120 is formed, Fig. 5), and provided with a wiring through-hole (73, Para 49, Fig. 5) defined at the connection area (Fig. 5), wherein one installation area is spaced with adjacent one connection area (Fig. 5);
at least one substrate (48, Para 46, Fig. 5), disposed on a side of the circuit substrate (Fig. 5), and located at the installation area (Fig. 13);
at least one display assembly (46/50, Para 45), disposed on a side of the substrate away from the circuit substrate (Fig. 5), and comprising a driving circuit layer (Fig. 5; i.e., portion of layer 50 connected to thin-film transistor electrodes 54, Para 44);
at least one fan-out part (62, Fig. 5), wherein the fan-out part comprises a plurality of fan-out wirings (59, Para 57); and
at least one group of connection wiring (conductive material in microvias 73, Para 49, Fig. 5), wherein a first end of the connection wiring is connected to the driving circuit layer, and a second end of the connection wiring is connected to another end of the fan-out wirings through the wiring through-hole (Fig. 5).
In the embodiment of Fig. 5, Kim does not specifically disclose
at least one chip on film, disposed on a side of the circuit substrate away from the substrate; and
at least one fan-out part disposed between the circuit substrate and the chip on film, and an end of the fan-out wirings is connected to the chip on film.
In other embodiments of Kim, Kim discloses that the fan-out part 62 can be formed to carrier substate 52 (Figs. 9 and 13) and further disclosing implementing a display driver integrated circuit in a display device (Para 51).
In view of such further teaching by Kim, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Fig. 5 comprise the further teachings at least based on the rationale of combining prior art elements according to known methods to yield predictable results and/or simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.A/B).
Referring to the invention of Choi, Choi teaches providing at least one chip on film (730, Para 67, Fig. 7), disposed on lower exposed surface of substrate 740 (Fig. 7B).
In view of such teaching Choi, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Kim comprise the teachings of Choi in order to control the luminance of the device (Para 19).
Referring to the invention of Choi817, Choi817 discloses a chip on film package (Fig. 2, Para 57), wherein a chip on film 210 is attached to the end of wirings 220/260 (Para 70) of the structure 200/220/260/290 (Fig. 2 –structure similar to fan-out part of Kim).
In view of such teaching Choi817, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Kim comprise the teachings of Choi817 at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using (MPEP 2143.I.C).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. [US PGPUB 20140184057] in view of Choi et al. [US PGPUB 20210335896] in view of Choi et al. [US PGPUB 20200286817] and Chen et al. [CN113257143A] (hereinafter Kim, Choi, Choi817, and Chen).
Regarding claim 20, Kim teaches a display panel, comprising;
a circuit substrate (52, Fig. 5), comprising at least one installation area (region of structure 52 overlapping with structure 46/50, Fig. 5) and at least one connection area (region of structure 52 where conductive via 120 is formed, Fig. 5), and provided with a wiring through-hole (73, Para 49, Fig. 5) defined at the connection area (Fig. 5), wherein one installation area is spaced with adjacent one connection area (Fig. 5);
at least one substrate (48, Para 46, Fig. 5), disposed on a side of the circuit substrate (Fig. 5), and located at the installation area (Fig. 13);
at least one display assembly (46/50, Para 45), disposed on a side of the substrate away from the circuit substrate (Fig. 5), and comprising a driving circuit layer (Fig. 5; i.e., portion of layer 50 connected to thin-film transistor electrodes 54, Para 44);
at least one fan-out part (62, Fig. 5), wherein the fan-out part comprises a plurality of fan-out wirings (59, Para 57); and
at least one group of connection wiring (conductive material in microvias 73, Para 49, Fig. 5), wherein a first end of the connection wiring is connected to the driving circuit layer, and a second end of the connection wiring is connected to another end of the fan-out wirings through the wiring through-hole (Fig. 5).
In the embodiment of Fig. 5, Kim does not specifically disclose
a splicing screen, comprising at least panels, each of the display panels;
at least one chip on film, disposed on a side of the circuit substrate away from the substrate; and
at least one fan-out part disposed between the circuit substrate and the chip on film, and an end of the fan-out wirings is connected to the chip on film.
In other embodiments of Kim, Kim discloses that the fan-out part 62 can be formed to carrier substate 52 (Figs. 9 and 13) and further disclosing implementing a display driver integrated circuit in a display device (Para 51).
In view of such further teaching by Kim, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Fig. 5 comprise the further teachings at least based on the rationale of combining prior art elements according to known methods to yield predictable results and/or simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.A/B).
Referring to the invention of Choi, Choi teaches providing at least one chip on film (730, Para 67, Fig. 7), disposed on lower exposed surface of substrate 740 (Fig. 7B).
In view of such teaching Choi, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Kim comprise the teachings of Choi in order to control the luminance of the device (Para 19).
Referring to the invention of Choi817, Choi817 discloses a chip on film package (Fig. 2, Para 57), wherein a chip on film 210 is attached to the end of wirings 220/260 (Para 70) of the structure 200/220/260/290 (Fig. 2 –structure similar to fan-out part of Kim).
In view of such teaching Choi817, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the modified invention of Kim comprise the teachings of Choi817 at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using (MPEP 2143.I.C).
Referring to the invention of Chen, Chen teaches a splicing screen (Fig. 10), comprising at least panels, each of the display panels comprising similar structure as that of Kim, Choi, and Choi817.
In view of such teaching by Chen, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Kim comprise the teachings of Chen in order to provide a device with a larger viewing area.
Allowable Subject Matter
Claims 18-19 are allowed.
Claims 2-13 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
he following is an examiner’s statement of reasons for allowance:
Claims 18-19 are allowed because all prior arts of record and related prior arts not of record either singularly or in combination fail to anticipate or render obvious a display panel, comprising:
a circuit substrate, comprising an installation area and a connection area disposed at intervals, and provided with a wiring through-hole defined at the connection area and a groove defined at the installation area;
a connection wiring, disposed in the wiring through-hole;
a substrate, disposed on a side of the circuit substrate, and disposed in the groove; (as claimed in claim 18), in combination with the rest of claim limitations as claimed and defined by the Applicant.
Conclusion
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/ISMAIL A MUSE/ Primary Examiner, Art Unit 2812