CTNF 18/194,303 CTNF 79135 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim s 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Sharma et al . 07-15-02-aia The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. Regarding Claim 1, in Figs. 1 and 5A, Sharma et al. discloses an integrated circuit device comprising: a varactor comprising: a first conductive contact 520; a second conductive contact 540; and a thin film transistor (TFT) channel material 530 coupled between the first conductive contact and the second conductive contact. Regarding Claim 2, in Fig. 7 of Sharme et al the integrated circuit device comprises a front side comprising a plurality of transistors and interconnect layers and a back side comprising the varactor. Regarding Claim 3, in Sharma, the TFT channel material 530 has a charge carrier mobility within a range of 50 cm 2 /(V-s) to 700 cm 2 /(V-s) and a bandgap voltage within a range of 1.15 eV to 6.5 eV at 300 degrees Kelvin. Regarding Claim 4, in Sharma, the varactor further comprising a non- crystalline substrate 510 under the first conductive contact, second conductive contact, and TFT channel material 530. Regarding Claim 5, in Sharma, the non-crystalline substrate 510 comprises silicon oxide, silicon nitride, a metal oxide, or silicon oxynitride. Regarding Claim 6, in Sharma, the varactor further comprising a dielectric material 560 between the first conductive contact and the TFT channel material (Figs. 5D and 7) Regarding Claim 7, in Sharma et al., the first conductive contact, second conductive contact, and TFT channel material each contact a substrate comprising a dielectric material. Regarding Claim 8, in Sharma eta l, the first conductive contact 540 is substantially parallel to the second conductive contact, and wherein the TFT channel material is substantially orthogonal to the first conductive contact and the second conductive contact (see also Figs. 5B-5D and 7) Regarding Claim 9, in Sharma et al, the TFT channel material is substantially parallel to the first conductive contact and second conductive contact in a horizontal grating configuration. Regarding Claim 10, in Sharma et al, the TFT channel material is between the first conductive contact and second conductive contact in a vertical stack. Regarding Claim 11, in Sharma et al, a depletion region is to form in the TFT channel material responsive to a voltage applied to the varactor. Regarding Claim 12, in Sharma et all, the varactor is an inversion mode varactor. Regarding Claim 13, in paragraphs 0030, 0033, 0058: Sharma et al. discloses a varactor comprising: an anode 520/530; a cathode 520/530; a dielectric material (for example layer 560 in Fig. 5C) in contact with the cathode; and a thin film transistor (TFT) channel material 530 in contact with the dielectric material and coupled to the anode. Regarding Claim 14, an ohmic contact material (520/540 or 575/580) between the TFT channel material and the anode. Regarding Claim 15, in Fig. 7-11, an integrated circuit die comprising the varactor. Regarding Claim 16, in Fig. 7-11, a circuit board coupled to the integrated circuit die. Regarding Claim 17, in Figs. 7-11, at least one of a network interface, battery, or memory coupled to the integrated circuit die. Regarding Claim 18, in Figs. 1, 5 and 7-11, Sharma et al. discloses a method of forming a varactor, the method comprising: forming a first conductive contact; forming a second conductive contact; and forming a thin film transistor (TFT) channel material over a non-crystalline substrate and between the first conductive contact and the second conductive contact. Regarding Claim 19, in Sharma, the TFT channel material (for example 570 in Figs. 5C-5C) is deposited directly on the non-crystalline substrate. Regarding Claim 20, in Sharma et al., (Fig. 7-11) forming a plurality of TFTs with channels comprising the TFT channel material. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1, 13 and 18 are rejected under 35 U.S.C. 102 ( a)(1 ) as being anticipated by Pitts (20170323885) . Regarding Claim 1, in Figs. 1, 5, 7A, 7B, 8, Pitts discloses an integrated circuit device comprising: a varactor comprising: a first conductive contact 101/104; a second conductive contact 101/104; and a thin film transistor (TFT) channel material 105 coupled between the first conductive contact and the second conductive contact. Regarding Claim 13, in Figs. 1, 5, 7A, 7B and 8, Pitts discloses s a varactor comprising: an anode 101/104; a cathode 101/104; a dielectric material 102 in contact with the cathode; and a thin film transistor (TFT) channel material 105 in contact with the dielectric material and coupled to the anode. Regarding Claim 18, in Figs. 1, 5, 7A, 7B and 8, Pitts discloses, a method of forming a varactor, the method comprising: forming a first conductive contact 101/104; forming a second conductive contact 101/104; and forming a thin film transistor (TFT) channel material 105 over a non-crystalline substrate 102 and between the first conductive contact and the second conductive contact . 07-15 AIA Claim s 1, 13 and 18 are rejected under 35 U.S.C. 102 ( a)(1 ) as being anticipated by Demiryont (11,791,096) Regarding Claim 1, in Figs. 1, 4, 5A-6C, Demiryont discloses an integrated circuit device comprising: a varactor comprising: a first conductive contact top/bottom electrode; a second conductive contact top/bottom electrode; and a thin film transistor (TFT) channel material MOx coupled between the first conductive contact and the second conductive contact. Regarding Claim 13, in Figs. 1, 4, 5A-6C, Demiryont discloses s a varactor comprising: an anode bottom/tope electrode; a cathode bottom/top electrode; a dielectric material (aluminum oxide) in contact with the cathode; and a thin film transistor (TFT) channel material MOx in contact with the dielectric material and coupled to the anode. Regarding Claim 18, in Figs. 1, 4, 5A-6C, Demiryont discloses discloses, a method of forming a varactor, the method comprising: forming a first conductive contact bottom/top electrode forming a second conductive contact bottom/top electrode; and forming a thin film transistor (TFT) channel material MOx over a non-crystalline substrate and between the first conductive contact and the second conductive contact. Examiner is including Wei CN113013261 as a pertinent prior art that is not used in this rejection that discloses thin film varactor material. Furthermore, Naskar et al. (20240324167) discloses TFT channel material that can be used for a varactor (see 0039 of Naskar). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FAZLI ERDEM/Primary Examiner, Art Unit 2812 4/20/2026 Application/Control Number: 18/194,303 Page 2 Art Unit: 2812 Application/Control Number: 18/194,303 Page 3 Art Unit: 2812 Application/Control Number: 18/194,303 Page 4 Art Unit: 2812 Application/Control Number: 18/194,303 Page 5 Art Unit: 2812 Application/Control Number: 18/194,303 Page 6 Art Unit: 2812
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