Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/03/2026 has been entered.
Response to Amendment
Acknowledgment is made of the amendment filed 08/03/2026, in which: claim(s) 10, 12-13, 16, 21-23, and 27-28 is/are amended; claim(s) 19 is/are cancelled; claim(s) 31 is/are new; and the rejection of the claims are traversed. Claim(s) 10, 12-18, and 20-31 is/are currently pending an Office action on the merits as follows.
Response to Arguments
Applicant’s arguments filed 08/03/2026, with respect to the rejection(s) of claim(s) 10, 12-18, and 20-30 under 35 U.S.C. 103 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Objections
Claim 13 is objected to because of the following informalities: missing article “the” in “…copper plating [the] connector ring…”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 10, 12-13, 15-18, 20-24, and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Min et al. (US 20180076151 A1, hereinafter M1), and further in view of Zhu et al. (CN 101728347 A, hereinafter Z1).
Regarding independent claim 10, M1 discloses in M1 FIG. 5A, 6, and 8A-8C and associated text A method of manufacturing a semiconductor package, the method comprising: forming an under-bump metallization (under-bump metal layer 130/230), including: disposing a polymer layer (insulating layer 120/220, which may be a polymer, e.g. polyimide (M1 [0031]-[0032])) on a substrate (substrate 110/210); patterning the polymer layer to form a patterned polymer layer having openings (opening 122/222 and recesses 125/225); and forming a bonding pad (portions of 130/230 overlapping 122/222 in the vertical direction are considered a bonding pad) and a guard ring (portions of 130/230 not overlapping 122/222 in the vertical direction are considered a guard ring) on the patterned polymer layer (both the bonding pad and guard ring, as interpreted above, are formed on 120/220, as shown in M1 FIG. 6 and 8C), the guard ring including an annular ring encircling the bonding pad (portions of 130/230 in the inner recess 125/225 are an annular ring, which encircles the bonding pad, as shown in M1 FIG. 5A, 6, and 8C) and a connector ring (portions of 130/230 not overlapping 122/22 and not in 125/225, i.e. portions above upper surface 220u of 220, are considered a connector ring) formed on an encircling portion of the patterned polymer layer that encircles the bonding pad (portions of 120/220 between 125/225 or between 125/225 and 122/222 are considered the encircling portion which encircles the bonding pad), the connector ring connecting between the bonding pad and the annular ring (as shown in M1 FIG. 6 and 8C), the guard ring forming an annular pocket encircling the bonding pad (spaces between 125/225 or between 125/225 and 122/222 are considered the annular pocket(s) which encircles the bonding pad), the annular pocket being filled with the encircling portion of the patterned polymer layer on which the connector ring is formed (as shown in M1 FIG. 6 and 8C); forming a redistribution layer comprising a plurality of metallization layers (contact pad 113/213 and redistribution line 117/217) embedded in intermetal dielectric material (the layers of the RDL are embedded in 120/220, passivation layers 115/215, and, in M1 FIG. 8A-8C, interlayer insulating layer 111), the metallization layers of the redistribution layer electrically connecting a semiconductor die with the under-bump metallization (213 and 217 electrically connect 230 to semiconductor die 211). M1 does not explicitly disclose with the annular pocket filled with the encircling portion of the patterned polymer layer, attaching a second component comprising a semiconductor die or semiconductor package to the under-bump metallization.
However, in the same field of endeavor, Z1 discloses in Z1 Fig. 6 and 19 and associated text with the annular pocket filled with the portion of the patterned polymer layer, attaching the second component to the under-bump metallization (an annular pocket, corresponding to main opening 22 and auxiliary opening 21, is filled with stress buffer layer 40, a polymer (Z1 [0047]), when attaching substrate 90, a second component).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of manufacturing a semiconductor package of M1 with the inclusion of the annular pocket filled with polymer during bonding disclosed by Z1 to provide bonded packages with a mechanical locking effect that prevents a crack from expanding and improves reliability of the package (Z1 [0023]).
Regarding dependent claim 12, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 10, wherein the polymer material of the polymer layer is the same material as the intermetal dielectric material of the redistribution layer (120/220, which is both the polymer material of the polymer layer and an intermetal dielectric material of the redistribution layer, as interpreted above, thus the same material may also be the same material as 115/215 (M1 [0031]-[0032])).
Regarding dependent claim 13, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text the method of claim 10, wherein the forming the bonding pad and guard ring includes performing copper plating including copper plating connector ring on the encircling portion of the patterned polymer layer (130, which includes each of the aforementioned features, may be formed by plating on a seed layer of copper (M1 [0085]); 230 is as described with reference to M1 FIG. 2 (M1 [0070]), which describes 130, therefore it is interpreted that the structure and methods of forming 230 are the same as those of 130).
Regarding dependent claim 15, M1, as modified by Z1, further discloses in Z1 FIG. 18-19 and associated text The method of claim 10, wherein: the attaching uses a solder bump that is disposed between the second component and the bonding pad (solder bumps 70/welding points 72 are disposed between 90, corresponding to the second component, and pillar 60, corresponding to the bonding pad), and is bonded to the bonding pad during the attaching (as shown in Z1 FIG. 18-19, 70/72 remains bonded to 60 throughout the attaching); and the method further comprises, after the attaching, disposing underfill material between the second component and the under-bump metallization (underfill 91 (mislabeled as 92 in Z1 FIG. 19)).
Regarding independent claim 16, M1 discloses in M1 FIG. 5A, 6, and 8A-8C and associated text A method of manufacturing a semiconductor package, the method comprising: forming an under-bump metallization on a surface of a first semiconductor component (under-bump metal layer 130/230 is on semiconductor die 211), the under-bump metallization including a set of bonding pads (portions of 130/230 overlapping 122/222 in the vertical direction are considered a bonding pad; although only one bonding pad is shown, M1 provides support for a plurality of structures shown in the figure (M1 [0023]), i.e. a plurality of bonding pads according to the aforementioned interpretation) each encircled by a guard ring comprising an annular ring encircling the bonding pad (portions of 130/230 in the inner recess 125/225 are an annular ring, which encircles the bonding pad, as shown in M1 FIG. 5A, 6, and 8C) and a connector ring connecting between the bonding pad and the annular ring (portions of 130/230 not overlapping 122/22 and not in 125/225, i.e. portions above upper surface 220u of 220, are considered a connector ring, which connects between the bonding pad and annular ring, as interpreted above), wherein an annular structure comprising a polymer material is located between the bonding pad and the annular ring (portions of insulating layer 120/220, which may be a polymer, e.g. polyimide (M1 [0031]-[0032]), between 125/225 or between 125/225 and 122/222 are considered the annular structure), wherein the bonding pad and the guard ring are formed by copper plating including copper plating of the connector ring on the polymer material located between the bonding pad and the annular ring (130, which includes each of the aforementioned features, may be formed by plating on a seed layer of copper (M1 [0085]); 230 is as described with reference to M1 FIG. 2 (M1 [0070]), which describes 130, therefore it is interpreted that the structure and methods of forming 230 are the same as those of 130); and wherein each bonding bump bonds to a corresponding bonding pad but not to the annular ring encircling the corresponding bonding pad (conductive bump 140/240 bonds to the corresponding bonding pad, as interpreted above, but does not bond to the annular ring, as interpreted). M1 does not explicitly disclose bonding a second semiconductor component to the surface of the first semiconductor component using bonding bumps that bond to the bonding pads.
However, in the same field of endeavor, Z1 discloses in Z1 Fig. 6 and 19 and associated text bonding a second semiconductor component to the surface of the first semiconductor component using bonding bumps that bond to the bonding pads (PCB plate/substrate 90, corresponding to a second semiconductor component, is bonded to a surface of the first component (the structure shown in Z1FIG. 6) by solder bumps 70/welding points 72 that bond to pillars 60, corresponding to bonding pads).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the bonding of a second semiconductor component of Z1 with the method of manufacturing the semiconductor component of M1 to provide integration of the component into a larger device by physical and electrical connection to a PCB.
Regarding dependent claim 17, M1, as modified by Z1, further discloses in Z1 FIG. 18-19 and associated text The method of claim 16, further comprising: after the bonding, disposing underfill material between the second semiconductor component and the surface of the first semiconductor component, the underfill material at least partially surrounding the bonding bumps (underfill 91 (mislabeled as 92 in Z1 FIG. 19) surrounds 72).
Regarding dependent claim 18, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 16, wherein each bonding pad is further encircled by a second guard ring of an electrically conductive material (portions of 130/230 laterally outward of the opening and first/inner recess 125/225 are considered the second guard ring), the second guard ring comprising a second annular ring encircling the annular ring (portions of the second guard ring, as interpreted above, within outer recess 125/225 are considered the second annular ring, which encircles the annular ring, as interpreted above) and the connector ring further connecting between the annular ring and the second annular ring (the connector ring, as interpreted above, connects between portions of 130/230 in the inner and outer recess 125/225).
Regarding dependent claim 20, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 16, wherein the guard ring forms an annular pocket encircling the bonding pad (spaces between 125/225 or between 125/225 and 122/222 are considered the annular pocket), the annular pocket being filled with the annular structure (the annular pocket, as interpreted is filled with the annular structure, as interpreted above).
Regarding dependent claim 21, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 10, wherein the encircling portion of the patterned polymer layer filling the annular pocket is bounded by the bonding pad, the guard ring, the substrate on a first side of the encircling portion of the patterned polymer layer, and the connector ring on a second side of the encircling portion of the patterned polymer layer opposite from the first side (the encircling portion, as interpreted above, is bounded by 130/230, 125/225, and 110/210, which is on the opposite side of the encircling portion from the portions of 130/230 interpreted as the connector ring).
Regarding dependent claim 22, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 21, wherein: the guard ring further includes a second annular ring encircling the annular ring (portions of 130/230 in outer recess 125/225 encircle inner recess 125/225), the connector ring further connecting between the annular ring and the second annular ring (as shown, portions of 130/230 corresponding to the connector ring connect the first and second annular rings, as interpreted above); and a second annular pocket is formed between the annular ring and the second annular ring (space between inner and outer recesses 125/225), the second annular pocket being filled with a second encircling portion of the patterned polymer layer (portion of 120/220 filling the space between inner and outer recesses 125/225).
Regarding dependent claim 23, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 22, wherein the second encircling portion of the patterned polymer layer filling the second annular pocket is bounded by the annular ring, the second annular ring, and the connector ring (the second encircling portion, as interpreted above, is bounded by 130/230, and inner and outer recesses 125/225).
Regarding dependent claim 24, M1, as modified by Z1, discloses the method of claim 10. M1, as modified by Z1, does not explicitly disclose that the annulus of the annular pocket has a width between 30 and 40 microns. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to try various ranges of annular pocket width to optimize the under-bump metallization surface area for packing density or contact surface properties such as durability, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955).
Regarding dependent claim 26, M1, as modified by Z1, further discloses in M1 FIG. 5A, 6, and 8A-8C and associated text The method of claim 10, wherein the bonding pad, the annular ring, and the connector ring each comprise copper, aluminum, a copper alloy, or an aluminum alloy (130/230, which comprises all aforementioned features, may include any of the above, depending on the composition of its seed layer (M1 [0085], [0070])).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over M1, and further in view of Z1 and Chen, Yu-Feng et al. (US 20160020186 A1, hereinafter C3).
Regarding dependent claim 14, M1, as modified by Z1, discloses in Z1 FIG. 19 and associated text the method of claim 10, further comprising disposing underfill material between the second component and the under-bump metallization (underfill 91 (mislabeled as 92 in Z1 FIG. 19) is between PCB plat/substrate 90, corresponding to the second component and under-bump metallization features including bump lower metal seed layer (Under Bump Metallization) 50 and pillar 60). They do not explicitly disclose prior to the attaching, depositing pre-solder on the bonding pad, after depositing the pre-solder, performing the attaching of the second component comprising a semiconductor die to the under-bump metallization using a solder bump that attaches to the bonding pad via the pre-solder, the attaching leaving solder flux residue on the solder bump after the attaching is complete.
However, in the same field of endeavor, C3 discloses in C3 FIG. 10 and associated text prior to the attaching, depositing pre-solder on the bonding pad (solder bump 118 on UBM 114 includes a pre-solder (C3 [0027])), after depositing the pre-solder, attaching a second component comprising a semiconductor die (200) to the under-bump metallization (114) using a solder bump (206) that attaches to the bonding pad via the pre-solder, the attaching leaving solder flux residue on the solder bump after the attaching is complete (col 9, lines 31-34, the attaching process may include flux application and residue).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the teachings of M1, as modified by Z1, with the use of pre-solder and flux disclosed by C3 to provide attached semiconductor packages with improved adhesion and durability from pre-solder and solder flux application on the bonding bumps and/or pads.
Claim(s) 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over M1, and further in view of Z1 and Chen, Wei-Yu et al. (US 20170005052 A1, hereinafter C2).
Regarding dependent claim 25, M1, as modified by Z1, discloses the method of claim 24, but does not explicitly disclose that the annulus of the annular ring has a width between 10 microns and 40 microns inclusive. However, in the same field of endeavor, C2 teaches an annular ring width of 10 microns to 20 microns (C2 Fig. 6B, element W7; col 7, lines 21-22). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the teachings of M1, as modified by Z1, and C2 to try various ranges of annular pocket width including those which are known and industrially tested, as with the range taught by C2, to optimize the under-bump metallization surface area for packing density or contact surface properties such as durability, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955).
Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over M1, and further in view of Z1 and Ito et al. (US 20110193224 A1, hereinafter I1).
Regarding dependent claim 27, M1, as modified by Z1, discloses in Z1 FIG. 19 and associated text, the method of claim 15 wherein the method further comprises: during the disposing of the underfill material between the second component and the under-bump metallization, a crack in the underfill material (a crack forms in the underfill 91 and stress buffer layer 40 (Z1 [0062])). M1, as modified by Z1, does not explicitly disclose blocking, by the guard ring, a crack propagating into the encircling portion of the patterned polymer layer filling the annular pocket from penetrating into the redistribution layer.
However, in the same field of endeavor, I1 discloses in I1 FIG. 1-2 and associated text blocking, by the guard ring, a crack propagating into the encircling portion of the patterned polymer layer filling the annular pocket from penetrating into the redistribution layer (a crack propagating through surface-protective film 5, corresponding to the patterned polymer layer filling the annular pocket is terminated at the slit 5b (I1 [0031])). Though not shown, I1 further discloses an embodiment wherein a portion of the bump electrode 6 is formed in opening 5a/slit 5b (I1 [0050]), which may correspond more closely to the guard ring claimed, showing that the function of the slit 5b described is compatible with embodiments according to the combined references.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the semiconductor package of M1, as modified by Z1, with the function of an analogous guard ring disclosed by I1 to provide protection of the redistribution layer from cracks because I1 discloses that the combined structure is capable of doing so (I1 [0031]).
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 20190348352 A1, hereinafter H2), and further in view of I1.
Regarding independent claim 28, H2 discloses in H2 FIG. 1-2 and 5-28 and associated text A method of manufacturing a semiconductor package, the method comprising: forming an under-bump metallization (lower conductive structure 2), including: disposing a polymer layer (first insulating layer 10, which may be a polymer material, e.g. polyimide (H2 [0051])) on a substrate (first carrier 90); patterning the polymer layer to form a patterned polymer layer having openings (first openings 104); and forming a bonding pad on the patterned polymer layer (portions of lower circuit structure 22 which are ultimately exposed by through holes 240, i.e. portion 254 of wetting layer 25, are considered bonding pads); forming a redistribution layer comprising a plurality of metallization layers (RDL 23 and conductive structures 3 and 4) embedded in intermetal dielectric material (23, 3, and 4 are embedded in insulating layers 20, 30, and 40, respectively, which may include dielectric material (H2 [0062], [0065], [0068])), the metallization layers of the redistribution layer electrically connecting a semiconductor die with the under-bump metallization (semiconductor die 6 is connected to 2 by 23, 3, and 4); after forming the redistribution layer, exposing the bonding pad by debonding the substrate (bonding region 22a is exposed by removal of 90 as shown in H2 FIG. 25-27); and attaching a second component comprising a semiconductor die or semiconductor package to the exposed bonding pad of the under-bump metallization (electrical connecting elements 14 connects 22a to a mother board (H2 [0072]), which is a semiconductor package). H2 does not explicitly disclose the bonding pad surrounded by an isolated portion of the patterned polymer layer that is isolated from a remainder of the patterned polymer layer or attaching the second component with the isolated portion of the patterned polymer layer in place.
However, in the same field of endeavor, I1 discloses in I1 FIG. 1A-1B and associated text the bonding pad surrounded by an isolated portion of the patterned polymer layer that is isolated from a remainder of the patterned polymer layer (bump electrode 6, which is a bonding pad, is surrounded by a portion of surface-protective film 5 isolated from the remainder of the film by slit 5b) and attaching the second component with the isolated portion of the patterned polymer layer in place (5b and the isolated portion of 5 are present when the semiconductor device is mounted to a board (I1 [0031])).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the isolated portion of the patterned polymer layer of I1 with the method of manufacturing the semiconductor device of H2 to provide protection against propagation of a crack formed during attachment to external components (I1 [0031]-[0033]).
Claims 29-30 are rejected under 35 U.S.C. 103 as being unpatentable over H2, and further in view of I1 and Z1.
Regarding dependent claim 29, H2, as modified by I1, discloses in H2 FIG. 1-2 and 5-28 and associated text The method of claim 28, wherein: the attaching uses a solder bump that is disposed between the second component and the bonding pad (electrical connecting element 14 may be a solder ball (H2 [0072])), and is bonded to the bonding pad during the attaching (14 is attached to 22a and is used for the bonding and connection to external components (H2 [0072]), therefore it must remain bonded to 22a during the attaching). They do not explicitly disclose the method further comprises, after the attaching, disposing underfill material between the second component and the under-bump metallization.
However, in the same field of endeavor, Z1 discloses in Z1 FIG. 19 and associated text the method further comprises, after the attaching, disposing underfill material between the second component and the under-bump metallization (underfill 91 (mislabeled as 92 in Z1 FIG. 19) is between PCB plat/substrate 90, corresponding to the second component and under-bump metallization features including bump lower metal seed layer (Under Bump Metallization) 50 and pillar 60).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the underfill of Z1 with the method of manufacturing a semiconductor package according to H2, as modified by I1, to provide the well-known advantages of underfill material such as protection of components from contaminants.
Regarding dependent claim 30, H2, as modified by I1 and Z1, further discloses in Z1 FIG. 19 and I1 FIG. 1-2 and associated text The method of claim 29, further comprising: trapping propagation of a crack in the underfill material (Z1: a crack forms in the underfill 91 and stress buffer layer 40 (Z1 [0062]), which corresponds to an isolated portion of the polymer layer) in the isolated portion of the patterned polymer (I1: a crack propagating through surface-protective film 5 is terminated at the slit 5b (I1 [0031])).
Allowable Subject Matter
Claim 31 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 31, the prior art of record to the examiner’s knowledge does not teach or render obvious, at least to one skilled in the art, the instant invention regarding a method of manufacturing a semiconductor package comprising exposing the bonding pad by debonding the substrate; in combination with the other recited limitations.
The closes prior art of record includes Min et al. (US 20180076151 A1, hereinafter M1), which discloses a semiconductor under-bump metallization structure embodying many of the structural limitations of claim 31, as shown in M1 FIG. 5A, 6, and 8A-8C, for example. However, the instant application differs from the prior in that the instant application forms these structures starting from the patterned polymer layer directly on the substrate and the under-bump metallization directly on the patterned polymer layer, with the bonding surface of the UBM facing the substrate, forming the underlying structures from the bonding surface “out”. By comparison, the structure of M1 is formed in the opposite direction, so to speak, with underlying layers being formed on the substrate first, ending with the bonding pad. In particular, the claimed invention includes a step of debonding the substrate to expose the bonding pad, which is only logical when the bonding surface of the bonding pad is facing toward the substrate.
The prior art of record further includes Huang et al. (US 20190348352 A1, hereinafter H2), which discloses a method of forming a semiconductor under-bump metallization structure from the bonding surface “out”, exposing bonding pads by removal of a substrate. However, the instant application differs from the prior in that the instant application includes structures such as a guard ring comprising an annular ring and connector ring, which together form an annular pocket of polymer material.
While the further limitations of claim 31 are disclosed in H2, the claimed step of debonding the substrate to expose the bonding pad disclosed by H2 is not obvious to combine with M1 as the bonding pad is already exposed and removal of the substrate would not expose the bonding pad. Additionally, it would not have been obvious to combine the structure of M1 with the overall bonding surface-out formation method of the semiconductor package of H2, since the methods of forming the structures disclosed by M1 are drawn to an entirely different process and adaptation of M1’s process of forming the guard ring, as disclosed, would not have predictably succeeded in forming the device as claimed. Therefore, the method of claim 31 is not taught or rendered obvious by the prior art of record.
Conclusion
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to Applicant's disclosure:
US-20210151369-A1, a prior patent application disclosing a semiconductor package with an under-bump metallization including a pad with a center portion and a peripheral portion.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVERETT TRAJAN RIRIE whose telephone number is (571)272-9559. The examiner can normally be reached Mon - Thu: 8:30 am - 6:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EVERETT T RIRIE/ Examiner, Art Unit 2897
/CHAD M DICKE/ Supervisory Patent Examiner, Art Unit 2897
Prosecution Insights