DETAILED ACTION
This application, 18/416151, attorney docket AD9667-US, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is assigned to Forehope Electronic (Ningbo) Co., Ltd. and claims foreign priority to 2022105411391, filed 05/19/2022. Applicant's election without traverse of Group I, claims 1-12 in the reply filed on 3/27/2026 is acknowledged. Claims 13-20 are withdrawn by the applicant. Claims 1-12 are pending and are considered below. Note that examiner will use numbers in parentheses to indicate numbered elements in prior art figures, and brackets to point to paragraph numbers where quoted material or specific teachings can be found.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 1 recites, “a plastic body…” it is not clear if the claim is for a generic polymer or non-rigid material.
Claims 2, 3, 6 and 12 recites “wherein the first /second dielectric layer is provided thereon with a first/second /third/fourth electroplating bath” It is not clear how this limits the dielectric layer. It appears to claim that that the bath is part of the device. Examiner will assume the applicant intended to claim a product by process. The claim is directed to a product. It has been held that a product-by-process claim is directed to the product per se, regardless of how the product is actually made. In re Thorpe, 227 USPQ 964 (CAFC, 1985) and the related case law cited therein make it clear that it is the final product which must determine patentability in a product-by-process claim, and not the process by which it is made. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935) Perdue Pharma v. Epic Pharma, App. No. 2014-1294 (Fed. Cir. 2016). Here as long as the layer can be deposited by a bath, the limitation is satisfied.
Claim 7 recites, “between two adjacent second pads”, lacks antecedent.
Dependent claims inherit the defect of the parent.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 6, 9, 10 and 12 are rejected under 35 U.S.C. 102a1/a2 as being anticipated by Chung et al. (U.S. 2022/0216190).
As for claim 1,
Chung teaches in figure 12, a fan-out package structure, wherein the fan-out package structure comprises
a packaging element (110), a plastic package body (340/120),
a first dielectric layer (241), and a second dielectric layer (242),
the packaging element is provided thereon with a first pad (211) and a second pad (231),
wherein a height of the first pad is lower than that of the second pad (offset by the thickness of dielectric 241)
the plastic package body plastic-seals the packaging element ([0048]), and
an end surface of the first pad is exposed from a surface of the plastic package body (pads are exposed above 120),
one side of the first pad away from the packaging element is provided with a first wiring layer (260), the first wiring layer is electrically connected to the first pad, and the first wiring layer is provided thereon with a first solder ball (270); and
the first dielectric layer is provided on one side of the first wiring layer away from the packaging element,
an end surface of the second pad is exposed from a surface of the first dielectric layer, one side of the second pad away from the packaging element is provided with a second wiring layer (260), and the second pad is electrically connected to the second wiring layer; the second wiring layer is provided thereon with a second solder ball (270);
and one side of the second wiring layer away from the first wiring layer is provided with the second dielectric layer. (see annotated figure 12 below)
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As for claim 2,
Chung teaches the fan-out package structure according to claim 1, wherein the first dielectric layer is provided thereon with a first electroplating bath, the first electroplating bath is provided therein with a first bump, the first bump is electrically connected to the first wiring layer, and the first solder ball is provided on the first bump. (Chung describes bath-type processes in paragraphs [0039,0040] for forming the conductive layers.)
As for claim 3,
Chung teaches the fan-out package structure according to claim 1, wherein the second dielectric layer is provided thereon with a second electroplating bath, the second electroplating bath is provided therein with a second bump, the second bump is electrically connected to the second wiring layer, and the second solder ball is provided on the second bump. (Chung describes bath-type processes in paragraphs [0039,0040] for forming the conductive layers.)
As for claim 6,
Chung teaches the fan-out package structure according to claim 1, wherein the second dielectric layer is provided with a third electroplating bath, the third electroplating bath is provided therein with a third bump, the third bump is connected to the first wiring layer, and the first solder ball is connected to the third bump. (Chung describes bath-type processes in paragraphs [0039,0040] for forming the conductive layers.)
As for claim 9,
Chung teaches the fan-out package structure according to claim 1, and Chung teaches a flip chip (PK2), wherein the flip chip is provided on the first wiring layer and electrically connected to the first wiring layer.
As for claim 10,
Chung teaches the fan-out package structure according to claim 9, wherein the first wiring layer is provided thereon with a third pad (410), and the flip chip is provided on the third pad.
As for claim 12,
Chung teaches the fan-out package structure according to claim 1, wherein the first dielectric layer is provided thereon with a fourth electroplating bath, the fourth electroplating bath is provided around the second pad, the fourth electroplating bath is provided therein with a metal block, the metal block is directly connected to the second pad, and the metal block is configured to lead out the second wiring layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Chung in view of Chen et al. U.S. 7019407).
As for claim 4,
Chung teaches the fan-out package structure according to claim 1, but does not teach that a diameter of the first solder ball is larger than that of the second solder ball.
However, Chen teaches in figure 2, second solder balls (150) with a larger diameter than first solder balls (152). Chen [co2 ln35]
It would have been obvious to one skilled in the art at the effective filing date of this application to use the bump sizes taught by Chen in Chung to prevent the bumps being dislocated before soldering. (Chen[co2 ln7-17]). One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 5,
Chung teaches fan-out package structure according to claim 1, but does not teach that the first solder ball is partially embedded in the second dielectric layer.
However, Chen teaches in figure 2, the first solder ball is partially embedded in the second dielectric layer.
It would have been obvious to one skilled in the art at the effective filing date of this application to use the bump arrangement taught by Chen in Chung to prevent the bumps being dislocated before soldering. (Chen[co2 ln7-17]). One skilled in the art would have combined these elements with a reasonable expectation of success.
Claims 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Chung in view of view of Chia et al. (U.S. 2008/0237836).
As for claim 7
Chung teaches the fan-out package structure according to claim 1, but does not teach a first buffer layer, wherein the first buffer layer is provided between the first pad and the second pad adjacent to each other or between two adjacent second pads and a coefficient of thermal expansion of the first buffer layer is smaller than that of the plastic package body.
However, Chia teaches in figure 2F, a buffer layer (24) between pads, (231/233) with a lower CTE than the lower portion and higher than the RDLS.
It would have been obvious to one skilled in the art at the effective filing date of this application to substitute the buffer layer of Chia to Chung to help reduce cracking of the RDL during heated operation.(Chia, abstract) One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 8,
Chung in view of Chia makes obvious the fan-out package structure according to claim 7, wherein: if the first buffer layer is provided between the first pad and the second pad adjacent to each other, the first buffer layer is made of an insulation material; and if the first buffer layer is provided between the two adjacent second pads, the first buffer layer is made of an insulation material or a conductive material. In the combination Chia teaches an insulating polymer [0027]. It must be an insulator between conductors, to prevent shorting.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Chung.
As for claim 11,
Chung teaches the fan-out package structure according to claim 9, and that the flip chip is connected to the second wiring layer through the first chip (at left TSV330),
but does not teach the packaging element comprises a first chip and a second chip which are arranged at intervals, the first chip and the second chip are arranged at intervals, the flip chip is connected to the second wiring layer through the first chip and/or the second chip, and the second wiring layer is configured as a grounding circuit.
However, multiple chips is a duplication of useful parts, The court has held that mere duplication or arrangement of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bermis Co., 193 USPQ8. In re Harza establishes "a mere duplication of parts has no patentable significance unless a new and unexpected result is produced." 274 F.2d 669, 124 USPQ 378 (CCPA 1960); See, MPEP 2144.04 (VI)(C).Here, the applicant has not disclosed any unexpected results, and the additional chip merely expands the capacity of the device. Therefore, it would have been obvious to one skilled in the art at the invention was made to add the additional subregions.
Chung does not teach that the second wiring layer is configured as a grounding circuit.
However, the use of the wiring layer as a grounding circuit is an intended use of the wiring. It has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. Ex Parte Masham, 2 USPQ F.2d 1647 (1987).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN A BODNAR whose telephone number is (571)272-4660. The examiner can normally be reached M-Th and every other Friday 7:30-5:30 Central time.
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/JOHN A BODNAR/ Primary Examiner, Art Unit 2893
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