Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/23/2026 has been entered.
Acknowledgment
The amendment filed on 03/23/2026 has been entered. The present Office action is made with all the suggested amendments being fully considered. Claims 1-4, 8, 11-14, and 16-18 are amended. Accordingly, pending in this application are claims 1-20.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 11 and 16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 6-8, 11-13, 16-17, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 20220084923 A1; hereinafter “Wang”) in view of in view of Cheng et al. (US 20180337142 A1; hereinafter “Cheng”) and Kuo et al. (US 20110175220 A1; hereinafter “Kuo”).
In re claim 1, Wang discloses a method of manufacturing a semiconductor package (figs. 1-19), comprising:
forming a first redistribution layer 20 having an opening K on a transparent plate 10, the first redistribution layer 20 comprising first redistribution wirings 21 (¶37-39, 56);
forming a plurality of conductive structures 40 that extend in a vertical direction on the first redistribution layer 20 and are electrically connected to the first redistribution wirings 21 (¶42-43);
providing an image sensor chip 30 comprising a photosensitive region M1, and providing a plurality of conductive members 31 spaced apart along a peripheral region of the photosensitive region M1 (¶47);
disposing the image sensor chip 30 on the first redistribution layer 20 such that the photosensitive region M1 faces the opening K and the plurality of conductive members 31 are electrically connected to the first redistribution wirings 21;
forming an adhesive member 50 that extends along the peripheral region and surrounds the plurality of conductive members 31 between the first redistribution layer 20 and the image sensor chip 30 (¶87);
forming a sealing member 60 on the first redistribution layer 20 to cover the image sensor chip 30, the plurality of conductive structures 40, and the adhesive member 50 (¶54);
forming a second redistribution layer 01 comprising second redistribution wirings 011 electrically connected to the plurality of conductive structures 40, on the sealing member 60 (¶43, 69),
wherein at least one conductive structure 40 from the plurality of conductive structures is connected to a first bonding pad in the first redistribution layer 20 (e.g., a first pad as described in ¶43 and 80; “the second conductive bump 40 is electrically connected to the metal wire 21 through the first pad”), extends through the sealing member 60, and is connected to a second bonding pad (e.g., connection portion of the wiring layer 011 adjacent to the bump 40 can be interpreted as a second bonding pad, because the claim in its current form does not distinguish it from the redistribution wirings) in the second redistribution layer 01.
Wang does not expressly disclose:
forming a spacer layer having a cavity on a transparent plate;
forming a first redistribution layer having an opening communicating with the cavity on the spacer layer,
the photosensitive region of the image sensor chip comprising a lens;
a first surface of the second redistribution layer is in contact with the sealing member;
forming external connection members on a second surface of the second redistribution layer opposite to the first surface,
the external connection members being electrically connected to the second redistribution wirings.
In the same field of endeavor, Cheng discloses in figs. 1A-1J, a method of manufacturing a semiconductor package comprising:
forming a spacer layer 110 having a cavity 115 on a transparent plate 100 (fig. 1A; ¶19-20);
forming a first redistribution layer 120 having an opening communicating with the cavity 115 on the spacer layer 110 (fig. 1B; ¶22),
forming an image sensor chip 150 having a photosensitive region 165 comprising a lens 190 (fig. 1C; ¶28-29, 33);
a first surface (e.g., bottom surface) of a second redistribution layer 210, 220, 230 (hereinafter “RDL2”) is in contact with a sealing member 200 (fig. 1H; ¶38-42);
forming external connection members 240 on a second surface (e.g., upper surface) of the second redistribution layer RDL2 opposite to the first surface (fig. 1I; ¶44),
the external connection members 240 being electrically connected to the second redistribution wirings 220 (¶44).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Cheng and form lenses in the sensing region of the image sensor chip of Wang to maximize light collection by the image sensor chip. Furthermore, one would have been motivated to combine the teachings of Cheng into the package of Wang in order to efficiently integrate sensing devices using system-in-package (SiP) technology and reduce the size of the circuit board and of the finished electronic product (¶3-7 of Cheng).
Wang, as modified by Cheng does not expressly disclose wherein a material of the first bonding pad is different from a material of the first redistribution wirings.
In the same field of endeavor, Kuo discloses a semiconductor device (figs. 12A-12E)
wherein a material of a first bonding pad 1146 is different from a material of a first redistribution wiring 1142, 1144 (¶57).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Kuo into the package of Wang/Cheng to reduce stress and strain of the semiconductor chip during bonding to the package substrate (¶4-5 of Kuo).
In re claim 2, Wang, as modified by Cheng and Kuo, discloses the method of claim 1, wherein forming the second redistribution layer further comprises exposing upper surfaces of the plurality of conductive structures 40 by grinding an upper surface of the sealing member 60 (¶55 of Wang).
In re claim 3, Wang, as modified by Cheng and Kuo, discloses the method of claim 1.
Wang further discloses in figs. 1-19, wherein the sealing member 60 comprises a first sealing portion that covers an upper surface of the image sensor chip 30 (the upper surface is the surface of the image sensor chip 30 facing the second redistribution layer 01) and a second sealing portion that surrounds side surfaces of the plurality of conductive structures 40 around the image sensor chip 30.
In re claim 6, Wang, as modified by Cheng and Kuo, discloses the method of claim 1, wherein the image sensor chip 130 is a CMOS image sensor (CIS) chip (¶2-6 of Wang).
In re claim 7, Wang, as modified by Cheng and Kuo, discloses the method of claim 1, wherein a space between the opening on the transparent plate 10 (Wang: K; fig. 19) and the lens (Cheng: 190; fig. 1J) is enclosed by the adhesive member (Wang: 50; fig. 19).
In re claim 8, Wang, as modified by Cheng and Kuo, discloses the method of claim 1,
Wang does not expressly disclose wherein the at least one conductive structure comprises at least one of nickel (Ni), antimony (Sb), bismuth (Bi), zinc (Zn), indium (In), palladium (Pd), platinum (Pt), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), chromium (Cr), and tin (Sn).
However, Cheng discloses in figs. 1A-1J, wherein a conductive structure 130 comprises at least one of nickel (Ni), antimony (Sb), bismuth (Bi), zinc (Zn), indium (In), palladium (Pd), platinum (Pt), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), chromium (Cr), and tin (Sn) (¶24).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Cheng into the package of Wang/Kuo to reduce via/wire resistance.
In re claim 11, same as claims 1 and 6 above.
In re claim 12, same as claim 2 above.
In re claim 13, same as claim 3 above.
In re claim 16, Wang discloses a semiconductor package (fig. 19), comprising:
a transparent plate 10 configured to allow light to transmit therethrough (¶46);
a first redistribution layer 20 disposed on the transparent plate 10 (¶39), the first redistribution layer having an opening K through which light may pass (¶56), the first redistribution layer comprising first redistribution wirings 21 (¶39);
an image sensor chip 30 comprising a photosensitive region M1, further comprising a plurality of conductive members 31 in a peripheral region surrounding the photosensitive region M1 (¶41, 47), and
wherein the image sensor chip 30 is disposed on the first redistribution layer 20 such that the plurality of conductive members 31 are electrically connected to the first redistribution wirings 21, the photosensitive region M1 facing the opening K that such that light may be incident on the photosensitive region M1;
an adhesive member 50 extending along the peripheral region between the first redistribution layer 20 and the image sensor chip 30 (¶87),
the adhesive member 50 surrounding the plurality of conductive members 31 to enclose a space between the photosensitive region M1 and the opening K from an outside;
a sealing member 60 provided on the first redistribution layer 20 to cover the image sensor chip 30 and the adhesive member 50 (¶54);
a second redistribution layer 01 provided on the sealing member 60, the second redistribution layer 01 having second redistribution wirings 011 (¶67); and
a plurality of conductive structures 40 penetrating through the sealing member 60 and electrically connecting the first redistribution wirings 21 and the second redistribution wirings 011 (¶43, 69),
wherein at least one conductive structure 40 from the plurality of conductive structures is connected to a first bonding pad in the first redistribution layer 20 (e.g., a first pad as described in ¶43 and 80; “the second conductive bump 40 is electrically connected to the metal wire 21 through the first pad”), extends through the sealing member 60, and is connected to a second bonding pad (e.g., connection portion of the wiring layer 011 adjacent to the bump 40 can be interpreted as a second bonding pad, because the claim in its current form does not distinguish it from the redistribution wirings) in the second redistribution layer 01.
Wang does not expressly disclose:
forming a spacer layer having a cavity on a transparent plate;
forming a first redistribution layer having an opening communicating with the cavity on the spacer layer,
the photosensitive region of the image sensor chip comprising a lens;
a first surface of the second redistribution layer is in contact with the sealing member;
forming external connection members on a second surface of the second redistribution layer opposite to the first surface,
the external connection members being electrically connected to the second redistribution wirings.
In the same field of endeavor, Cheng discloses in figs. 1A-1J, a method of manufacturing a semiconductor package comprising:
forming a spacer layer 110 having a cavity 115 on a transparent plate 100 (fig. 1A; ¶19-20);
forming a first redistribution layer 120 having an opening communicating with the cavity 115 on the spacer layer 110 (fig. 1B; ¶22),
forming an image sensor chip 150 having a photosensitive region 165 comprising a lens 190 (fig. 1C; ¶28-29, 33);
a first surface (e.g., bottom surface) of a second redistribution layer 210, 220, 230 (hereinafter “RDL2”) is in contact with a sealing member 200 (fig. 1H; ¶38-42);
forming external connection members 240 on a second surface (e.g., upper surface) of the second redistribution layer RDL2 opposite to the first surface (fig. 1I; ¶44),
the external connection members 240 being electrically connected to the second redistribution wirings 220 (¶44).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Cheng and form lenses in the sensing region of the image sensor chip of Wang to maximize light collection by the image sensor chip. Furthermore, one would have been motivated to combine the teachings of Cheng into the package of Wang in order to efficiently integrate sensing devices using system-in-package (SiP) technology and reduce the size of the circuit board and of the finished electronic product (¶3-7 of Cheng).
Wang, as modified by Cheng does not expressly disclose wherein a material of the first bonding pad is different from a material of the first redistribution wirings.
In the same field of endeavor, Kuo discloses a semiconductor device (figs. 12A-12E)
wherein a material of a first bonding pad 1146 is different from a material of a first redistribution wiring 1142, 1144 (¶57).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Kuo into the package of Wang/Cheng to reduce stress and strain of the semiconductor chip during bonding to the package substrate (¶4-5 of Kuo).
In re claim 17, Wang, as modified by Cheng and Kuo, discloses the semiconductor package of claim 16.
Wang further discloses (fig. 19) wherein the sealing member 60 includes a first sealing portion that covers an upper surface of the image sensor chip 30 (the upper surface is the surface of the image sensor chip 30 facing the second redistribution layer 01) and a second sealing portion that surrounds side surfaces of the conductive structures 40 around the image sensor chip 30.
In re claim 20, Wang, as modified by Nakagawa and Kuo, discloses the semiconductor package of claim 16, wherein a space between the opening (Wang: K; fig. 19) and the lens (Nakagawa: 28; figs. 9-11) is enclosed by the adhesive member (Wang: 50; fig. 19).
Claim(s) 4, 9, 14, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Cheng and Kuo and further in view of Nakagawa et al. (US 20250255028 A1; hereinafter “Nakagawa”).
In re claim 4, Wang, as modified by Cheng and Kuo, discloses the method of claim 1.
Wang further discloses in figs. 1-19, wherein the adhesive member 50 comprises a first adhesive portion that surrounds the plurality of conductive members 31.
Wang does not expressly disclose a second adhesive portion that fills a space between the plurality of conductive members.
Nakagawa further discloses the method (figs. 9-11) comprising an adhesive member 55 around bumps 5 having a second adhesive portion 55a that fills a space between the conductive members 5 (¶186-190).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Nakagawa into the package of Wang/Cheng/Kuo.
One would have been motivated to do so as Nakagawa teaches with the configuration including the underfill portion 55, the underfill portion 55 can protect and reinforce the metallic bumps 5 provided between the image sensor 2 and the rewiring layer 3 and the connecting portions formed by the metallic bumps 5. Thus, the bonding strength of the image sensor 2 to the rewiring layer 3 can be improved (¶186 of Nakagawa).
In re claim 9, Wang, as modified by Cheng and Kuo, discloses the method of claim 1,
Wang does not expressly disclose wherein the adhesive member comprises at least one of epoxy resin, UV resin, polyurethane resin, silicone resin, and silica filler.
In the same field of endeavor, Nakagawa discloses in figs. 9-11, wherein the adhesive member 55 comprises at least one of epoxy resin, UV resin, polyurethane resin, silicone resin, and silica filler (¶176).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Nakagawa into the package of Wang/Cheng/Kuo.
One would have been motivated to do so as Nakagawa teaches with the configuration and material including the underfill portion 55, the underfill portion 55 can protect and reinforce the metallic bumps 5 provided between the image sensor 2 and the rewiring layer 3 and the connecting portions formed by the metallic bumps 5. Thus, the bonding strength of the image sensor 2 to the rewiring layer 3 can be improved (¶176 and 186 of Nakagawa).
In re claim 14, same as claim 4 above.
In re claim 18, Wang, as modified by Cheng and Kuo, discloses the semiconductor package of claim 16.
Wang further discloses (fig. 19) wherein the adhesive member 50 includes a first adhesive portion that surrounds the conductive member 31.
Wang does not expressly disclose a second adhesive portion that fills a space between the conductive members.
In the same field of endeavor, Nakagawa further discloses the semiconductor package (figs. 9-11) comprising an adhesive member 55 around bumps 5 having a second adhesive portion 55a that fills a space between the conductive members 5 (¶186-190).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Nakagawa into the package of Wang/Cheng/Kuo.
One would have been motivated to do so as Nakagawa teaches with the configuration including the underfill portion 55, the underfill portion 55 can protect and reinforce the metallic bumps 5 provided between the image sensor 2 and the rewiring layer 3 and the connecting portions formed by the metallic bumps 5. Thus, the bonding strength of the image sensor 2 to the rewiring layer 3 can be improved (¶186 of Nakagawa).
Claim(s) 5, 15 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Cheng and Kuo and further in view of Kim et al. (US 20070007667 A1 ; hereinafter “Kim”).
In re claims 5, 15 and 19, Wang, as modified by Cheng and Kuo, discloses the method of claims 1 and 11 and the semiconductor package of claim 16 outlined above.
Wang discloses wherein the adhesive member 50 having a predetermined width and a predetermined height.
Wang doesn’t expressly disclose the predetermined width is within a range of from about 50 µm to about 200 µm, the predetermined height is within a range of from about 15 µm to about 150 µm.
In the same field of endeavor, Kim discloses a semiconductor package (figs. 6-8) wherein:
an adhesive member 142 having a predetermined width and a predetermined height,
the predetermined width is within a range of from about 50 µm to about 200 µm (¶68; width of approximately 200-500 micrometers), the predetermined height is within a range of from about 15 µm to about 150 µm (¶64; approximately 25-100 micrometers).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Kim into the package of Wang/Cheng/Kuo. One would have been motivated to control the height and width of the adhesive member to avoid resin bleed into unwanted areas.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Cheng and Kuo and further in view of Fang et al. (US 20210327819 A1; hereinafter “Fang”).
In re claim 10, Wang, as modified by Cheng and Kuo, discloses the method of claim 1.
Wang does not expressly disclose wherein the sealing member comprises an epoxy mold compound (EMC).
In the same field of endeavor, Fang further discloses a method of manufacturing a semiconductor package (figs. 10-22) wherein the sealing member 190 comprises an epoxy mold compound (EMC) (¶43-46).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Fang into the package of Wang/Cheng/Kuo to protect the image sensor chip and wirings from outside.
Conclusion
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/NILUFA RAHIM/Primary Examiner, Art Unit 2893
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