Prosecution Insights
Last updated: July 17, 2026
Application No. 18/195,950

SEMICONDUCTOR DEVICE HAVING WORD LINES ARRANGED IN DIFFERENT PITCHES

Non-Final OA §102
Filed
May 11, 2023
Priority
Jun 24, 2021 — CN 202110704388.3 +2 more
Examiner
ANDERSON, WILLIAM H
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fujian Jinhua Integrated Circuit Co., Ltd.
OA Round
4 (Non-Final)
86%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
180 granted / 210 resolved
+17.7% vs TC avg
Strong +16% interview lift
Without
With
+16.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
48 currently pending
Career history
253
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
76.9%
+36.9% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
11.4%
-28.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 210 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/21/2026 has been entered. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-9, 11-13, 15-18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nejad (US 20070049015 A1). Regarding claim 1, Nejad discloses a semiconductor device (Fig. 1), comprising; a substrate (11) comprising a shallow trench isolation ([0031]: “surrounded by field isolation elements”; See annotated figure, the trench is shown in cross-sectional view in Fig. 2) and an active structure (an area including a plurality of 16, See dashed reference square) defined by the shallow trench isolation, the active structure comprising: a first active area (the area enclosed within the dashed reference square) comprising a plurality of active area units (16) extended along a first direction (See annotated figure for direction designation); and a second active area (the area outside the dashed reference square) disposed outside a periphery of the first active area, wherein the second active area comprising a first part (See annotated figure) extending in a second direction (See annotated figure for direction designation) and a second part (See annotated figure) extending in a third direction (See annotated figure for direction designation); and a plurality of word lines (12a-12d), disposed in the substrate (“in” shown in cross-sectional view in Fig. 2), extending in the second direction to intersect with the active area units (intersecting in the second direction), the second part of the second active area (intersecting in the second direction), and the shallow trench isolation (intersecting in the second direction), wherein the word lines comprises a plurality of first word lines (12a and 12b) and at least one second word line (12c), the first word lines are sequentially arranged along the third direction perpendicular to the second direction by a first pitch (See annotated figure. Note: this pitch includes only one contact 20 within the pitch), the at least one second word line is between (between in the 3rd direction) the first part of the second active area and a closest one of the first word lines (12b), wherein the at least one second word line comprises a long side (See annotated figure) in the second direction and is spaced apart from the closest one of the first word lines (the closest one of the first word lines is 12b) by a second pitch (See annotated figure. Note: this pitch includes two contacts 18 within the pitch as well as third direction spacing between these contacts), and the second pitch is greater than the first pitch (“greater” because the second pitch includes multiple contacts as well as spacing between these contacts). Illustrated below is a marked and annotated figure of a First Interpretation of Figs. 1 and 2 of Nejad. PNG media_image1.png 584 664 media_image1.png Greyscale PNG media_image2.png 650 495 media_image2.png Greyscale Regarding claim 2, Nejad discloses the semiconductor device according to claim 1 (Fig. 1), further comprising: at least one first contact (20), disposed on the active area units and between two adjacent ones of the first word lines (between 12a and 12b); and at least one second contact (18), disposed on the active area units and between adjacent ones of the first word lines and the at least one second word line (between 12a/12b and 12c), wherein a width of the at least one second contact in the first direction (greatest width, See annotated figure) is greater than a width of the at least one first contact in the first direction (The 1st contact is a circular shape, therefore it has a variable width in the 1st direction and must have at least some width along the 1st direction that is smaller than the greatest width of contact 18, See annotated figure). Regarding claim 3, Nejad discloses the semiconductor device according to claim 2 (Fig. 1), wherein one of the active area units (See annotated figure for selected unit) connects to the second active area (connects through the substrate 11), and the at least one second contact does not contact the one of the active area units (the selected contact as the 2nd contact is directly contacting a different unit). Regarding claim 4, Nejad discloses the semiconductor device according to claim 2 (Fig. 1), wherein the at least one second word line directly contacts (16 is directly overlapped by the 2nd word line 12c, thus “directly contacts”) an end portion (See annotated figure for the selected end) of one of the active area units (See annotated figure for the selected unit). Regarding claim 6, Nejad discloses the semiconductor device according to claim 4 (Fig. 1), wherein the one of the active area units directly contacts the second active area (“directly contacts” the demarcation which begins at a portion of the trench isolation). Regarding claim 8, Nejad discloses the semiconductor device according to claim 2 (Fig. 1), further comprising: a plurality of bit lines (14a-14b), disposed on the substrate to intersect with the word lines (intersecting in the 3rd direction), the bit lines extended along the third direction to connect to the at least one first contact (connect through 22, as shown in Fig. 2) and the at least one second contact (indirect connection through the substrate 11) respectively. Regarding claim 9, Nejad discloses the semiconductor device according to claim 8 (Fig. 2), wherein the bit lines are integrally formed with the at least one first contact and the at least one second contact, respectively (A series electrical connection is formed from 18 through 20 and continues to the bitline 14b. This electrical connection is a functional integration required for device operation and is described in [0037]: “read” and “written”. Thus, these components are “integrally formed”). Regarding claim 11, Nejad discloses the semiconductor device according to claim 1, wherein one of the active area units (See annotated figure for the selected unit) has one end (See annotated figure for the selected end) directly in contact with the at least one second word line (16 is directly overlapped by the 2nd word line 12c, thus “directly in contact”), and another end (See annotated figure for the selected end) directly in contact with the second active area (“directly in contact” with the demarcation which begins at a portion of the trench isolation). Regarding claim 5, Nejad discloses the semiconductor device according to claim 4 (Fig. 1), wherein the one of the active area units does not contact the second active area (See the alternative demarcation square below, which includes a gap between the selected unit 16 and the demarcation). Illustrated below is a marked and annotated alternative interpretation of Fig. 1 of Nejad. PNG media_image3.png 584 528 media_image3.png Greyscale Regarding claim 7, Nejad discloses the semiconductor device according to claim 5 (Fig. 2), wherein sidewalls of the at least one second word line (See dashed reference lines for 12a-12b. These lines are similarly interpreted for 12c which is not shown) and the at least one second contact (See dashed reference lines) are vertically (See annotated figure for direction designation) aligned with each other (Each extends vertically without fully reaching each other. Thus, alignment is a parallel vertical alignment). Regarding independent claim 12, Nejad discloses a semiconductor device (Fig. 1, First Interpretation), comprising; a substrate (11) comprising a shallow trench isolation ([0031]: “surrounded by field isolation elements”; See annotated figure, the trench is shown in Fig. 2) and an active structure (an area including a plurality of 16, See dashed reference square) defined by the shallow trench isolation, the active structure comprising: a plurality of first active area units (16 on left, See annotated figure for direction designation) and a plurality of second active area units (16 on right, See annotated figure for direction designation) extended along a first direction (See annotated figure for direction designation), and each of the first active area units and the second active area units comprising two opposite ends (“one end” and “another end” of annotated figure) and a middle portion (“middle portion” of annotated figure) between the two opposite ends in the first direction (between in the first direction), wherein each of the first active area units comprises a same first length in the first direction (a major length, See annotated figure for measurement markings), and each of the second active area units comprises a second length in the first direction (a minor length, See annotated figure for measurement markings), and the second length is different from the first length (“different” because these measurements are related as major and minor lengths); and a plurality of word lines (12a-12d), disposed in the substrate (“in” shown in cross-sectional view in Fig. 2), extending in a second direction (See annotated figure for direction designation) to intersect with the first active area units (intersecting in the second direction), the second active area units (intersecting in the second direction), and the shallow trench isolation (intersecting in the second direction) and arranging in a third direction (See annotated figure for direction designation) being perpendicular to the second direction, wherein the word lines comprises a plurality of first word lines (12a and 12b) and at least one second word line (12c), wherein each of the first word lines crosses the middle portion of corresponding ones of the first active area units (crosses in the 2nd direction), and the at least one second word line crosses one of the two opposite ends of a corresponding one of the second active area units (crosses in the 2nd direction). Regarding claim 13, Nejad discloses the semiconductor device according to claim 12 (Fig. 1, First Interpretation), wherein the at least one second word line further crosses (“crosses” indirectly alongside, without crossing through) one of the two opposite ends of one of the first active area units. Regarding claim 15, Nejad discloses the semiconductor device according to claim 12 (Fig. 1, First Interpretation), wherein the one of the two opposite ends of the corresponding one of the second active area units is aligned (these two structures mutually interface as cited below, and thus are “aligned” in at least some way) with an edge (See annotated figure, annotated as Long Side) of the at least one second word line in the second direction. Regarding claim 16, Nejad discloses the semiconductor device according to claim 12 (Fig. 1, First Interpretation), wherein the first word lines are sequentially arranged along the third direction perpendicular to the second direction by a first pitch (See annotated figure. Note: this pitch includes only one contact 20 within the pitch), the at least one second word line is arranged along the third direction by a second pitch (See annotated figure. Note: this pitch includes two contacts 18 within the pitch as well as third direction spacing between these contacts), and the second pitch is greater than the first pitch (“greater” because the second pitch includes multiple contacts as well as spacing between these contacts). Regarding claim 17, Nejad discloses the semiconductor device according to claim 16 (Fig. 1, First Interpretation), further comprising: at least one first contact (20), disposed on the active area units and between two adjacent ones of the first word lines (between 12a and 12b); and at least one second contact (18), disposed on the active area units and between adjacent ones of the first word lines and the at least one second word line (between 12a/12b and 12c), wherein a width of the at least one second contact in the first direction (greatest width, See annotated figure) is greater than a width of the at least one first contact in the first direction (The 1st contact is a circular shape, therefore it has a variable width in the 1st direction and must have at least some width along the 1st direction that is smaller than the greatest width of contact 18, See annotated figure). Regarding claim 18, Nejad discloses the semiconductor device according to claim 17 (Fig. 1, First Interpretation), wherein the at least one first contact and the second contact do not contact the corresponding one of the active area units (the selected contacts as the 1st and 2nd contacts are directly contacting a different unit). Regarding claim 20, Nejad discloses the semiconductor device according to claim 17 (Fig. 1, First Interpretation), further comprising: a plurality of bit lines (14a-14b), disposed on the substrate to intersect with the word lines (intersecting in the 3rd direction), the bit lines extended along the third direction to connect to the at least one first contact (connect through 22, as shown in Fig. 2) and the at least one second contact (indirect connection through the substrate 11) respectively, wherein the bit lines, the at least one first contact, and the at least one second contact are monolithic (Fig. 2 shows each of these structures separately are monolithic). Claim 21 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jeon (US 11177264 B2). Regarding independent claim 21, Jeon discloses a semiconductor device (Fig. 5), comprising; a substrate (101) comprising a shallow trench isolation (ISO) and an active structure (Fig. 4: MCA) defined by the shallow trench isolation, the active structure comprising: a plurality of active area units (A1) being parallel extended along a first direction (Fig. 4: direction W) and having a same length in the first direction (the plurality of A1 are shown as replicated structures, thus the dimensions are also replicated, i.e., “same length”); and a plurality of word lines (WL), disposed in the substrate (“in” is shown in cross-sectional view in Fig. 5), extending in a second direction (Fig. 4: direction X) to intersect with the active area units (intersecting in the X direction) and the shallow trench isolation (intersecting in the X direction), wherein the word lines comprises a plurality of first word lines (110A/110B) and at least one second word line (110C), wherein an intersection portion (choosing the embodiment of Fig. 7: the portion of 110 intersecting A1, the portion with width WA1/WA2) of the at least one second word line (Fig. 4: 110C, already cited and repeated here) intersecting one of the active area units (choosing one of the units A1) is smaller than (“smaller than” is shown by the curved shape of the intersection portion) an intersection portion (the portion of another of 110 intersecting another A1, the portion with width TWA1/TWA2) of a corresponding one of first word lines (Fig. 4: 110B) intersecting the one of the active area units (Fig. 4: there is at least one unit A1 intersected by first and second word lines 110B and 110C), and the intersection portion of the corresponding one of first word lines intersecting the one of the active area units is the same as an intersection portion of the corresponding one of first word lines intersecting another one of the active area units (another unit A1. Note: these portions are “the same” when measured on the same portion of the word line.). Response to Arguments Applicant's arguments filed 5/21/2026 have been fully considered but they are not persuasive. Applicant argues: Applicant argues with respect to amended claim 1 that “Nejad does not disclose the claimed features “the second active area having a first part extending in a second direction and a second part extending in a third direction” and “the at least one second word line is between the first part of the second active area and a closest one of the first word lines, wherein the at least one second word line comprises a long side in the second direction and is spaced apart from the closest one of the first word lines by a second pitch” currently amended in claim 1 of the instant application”. Remarks at pg. 11. Examiner’s reply: The examiner disagrees and points to MPEP 2111: Broadest Reasonable Interpretation. Applicant’s remarks and amendments appear to be directed to differences in shape and arrangement of parts (i.e., “second active area”). However, the claim as written reasonably includes configurations beyond the configurations of Applicant’s disclosure. For example, “second active area” as limited by the claim could reasonably include structures exactly replicated from the “first active area” or could include a wholly different structure with varied configurations. Applicant’s disclosure (Fig. 1) suggests different structures, and the claim as written reasonably includes a plurality of different shapes and arrangements, such as the configuration relied upon in the instant Office action. Accordingly, the rejection is maintained, though has been adjusted as required by the claim amendments and to promote clarity of the record. The examiner also points to MPEP 2173.02 (II) “the examiner should allow claims which define the patentable subject matter with the required degree of particularity and distinctness” and notes the contended configurations as claimed reasonable overlap the scope of the prior art, as reasoned with respect to MPEP 2111. Applicant argues: Applicant argues with respect to amended claim 12 that “Nejad fails to disclose a word line crossing an end of an active area in a different length. That is, the word lines 12a, 12b, 12c, 12d of the cited Nejad are all disposed in the cell region, rather than partially disposed at an outer side of the cell region, being failed to isolate the bit lines within the cell region. Accordingly, the cited Nejad does not disclose the claimed features currently amended in claim 12 of the instant application”. Remarks at pg. 14. Examiner’s reply: The examiner disagrees and points to MPEP 2111: Broadest Reasonable Interpretation. Applicant’s remarks and amendments appear to be directed to differences in shape and arrangement of parts (i.e., “length”). However, the claim as written reasonably includes configurations beyond the configurations of Applicant’s disclosure. For example, “length” as limited by the claim could reasonably include alternative measurement endpoint designations. Accordingly, the rejection is maintained, though has been adjusted as required by the claim amendments and to promote clarity of the record. The examiner also points to MPEP 2173.02 (II) “the examiner should allow claims which define the patentable subject matter with the required degree of particularity and distinctness” and notes the contended configurations as claimed reasonable overlap the scope of the prior art, as reasoned with respect to MPEP 2111. Applicant argues: Applicant argues with respect to amended claim 21 that “Nejad does not disclose the claimed features currently amended in claim 21 of the instant application” and “the cited Jeon fails to include two gate trenches respectively having different trench average width in the same active region. That is, the cited Jeon also not disclose the claimed features currently amended in claim 21 of the instant application”. Remarks at pgs. 16-17. Examiner’s reply: Applicant’s arguments with respect to claim(s) 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The examiner points to MPEP 2111: Broadest Reasonable Interpretation. Applicant’s remarks and amendments appear to be directed to differences in shape and arrangement of parts (i.e., “width”). However, the claim as written reasonably includes configurations beyond the configurations of Applicant’s disclosure. For example, “width” and “portion” as limited by the claim could reasonably include alternative measurement endpoint and portion designations. The examiner also points to MPEP 2173.02 (II) “the examiner should allow claims which define the patentable subject matter with the required degree of particularity and distinctness” and notes the contended configurations as claimed reasonable overlap the scope of the prior art, as reasoned with respect to MPEP 2111. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM H ANDERSON/ Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Show 1 earlier event
Jul 23, 2025
Non-Final Rejection mailed — §102
Sep 25, 2025
Response Filed
Oct 23, 2025
Non-Final Rejection mailed — §102
Jan 21, 2026
Response Filed
Feb 24, 2026
Final Rejection mailed — §102
May 21, 2026
Request for Continued Examination
May 26, 2026
Response after Non-Final Action
Jun 29, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

4-5
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+16.2%)
2y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 210 resolved cases by this examiner. Grant probability derived from career allowance rate.

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