Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after non-final rejection (mailed 10/23/2025). Since prosecution in this application was not closed at the time of filing the request, the application is being examined under 37 CFR 1.111(b). Applicant's submission filed on 1/21/2026 appears to be fully responsive to the non-final rejection and has been entered.
Claim Objections
Claim 12 is objected to because of the following informalities: “two opposites” in line 6. For the sake of compact prosecution, claim 12 is interpreted in the instant Office action as follows: “two” is found to be a typographical error and is believed to be equivalent to “two opposite ends”; however, no actual change to the claim language has been applied during examination of the instant set of claims. Appropriate correction is required.
Claim 15 is objected to because of the following informalities: “the one of the active area units” in lines 3-4. For the sake of compact prosecution, claim 15 is interpreted in the instant Office action as follows: “the one of the active area units” is found to be a typographical error and is believed to be equivalent to “the corresponding one of the active area units” based on antecedence for this term earlier in the claim; however, no actual change to the claim language has been applied during examination of the instant set of claims. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nejad (US 20070049015 A1).
Regarding claim 1, Nejad discloses a semiconductor device (Fig, 1), comprising;
a substrate (11) comprising a shallow trench isolation ([0031]: “surrounded by field isolation elements”; See annotated figure, the trench is shown in Fig. 2) and an active structure (an area including a plurality of 16, See dashed reference square) defined by the shallow trench isolation, the active structure comprising:
a first active area (the area enclosed within the dashed reference square) comprising a plurality of active area units (16) being parallel extended along a first direction (See annotated figure for direction designation); and
a second active area (the area outside the dashed reference square) disposed outside a periphery of the first active area, to surround all of the active area units (fully surround); and
a plurality of word lines (12a-12d), disposed in the substrate (“in” shown in cross-sectional view in Fig. 2), extending in a second direction (See annotated figure) to intersect with the active area units (intersecting in the second direction) and the shallow trench isolation (intersecting in the second direction), wherein the word lines comprises a plurality of first word lines (12a and 12b) and at least one second word line (12c), the first word lines are sequentially arranged along a third direction (See annotated figure) perpendicular to the second direction by a first pitch (See annotated figure. Note: this pitch includes only one contact 20 within the pitch), the at least one second word line is arranged along the third direction and is spaced apart from a closest one of the first word lines (the closest one of the first word lines is 12b) by a second pitch (See annotated figure. Note: this pitch includes two contacts 18 within the pitch as well as third direction spacing between these contacts), and the second pitch is greater than the first pitch (“greater” because the second pitch includes multiple contacts as well as spacing between these contacts).
Illustrated below is are marked and annotated figures of Figs. 1 and 2 of Nejad.
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Regarding claim 2, Nejad discloses the semiconductor device according to claim 1 (Fig. 1), further comprising:
at least one first contact (20), disposed on the active area units and between two adjacent ones of the first word lines (between 12a and 12b); and
at least one second contact (18), disposed on the active area units and between adjacent ones of the first word lines and the at least one second word line (between 12a/12b and 12c), wherein a width of the at least one second contact in the first direction (greatest width, See annotated figure) is greater than a width of the at least one first contact in the first direction (The 1st contact is a circular shape, therefore it has a variable width in the 1st direction and must have at least some width along the 1st direction that is smaller than the greatest width of contact 18, See annotated figure).
Regarding claim 3, Nejad discloses the semiconductor device according to claim 2 (Fig. 1), wherein one of the active area units (See annotated figure for selected unit) connects to the second active area (connects through the substrate 11), and the at least one second contact does not contact the one of the active area units (the selected contact as the 2nd contact is directly contacting a different unit).
Regarding claim 4, Nejad discloses the semiconductor device according to claim 2 (Fig. 1), wherein the at least one second word line directly contacts (16 is directly overlapped by the 2nd word line 12c, thus “directly contacts”) an end portion (See annotated figure for the selected end) of one of the active area units (See annotated figure for the selected unit).
Regarding claim 6, Nejad discloses the semiconductor device according to claim 4 (Fig. 1), wherein the one of the active area units directly contacts the second active area (“directly contacts” the demarcation which begins at a portion of the trench isolation).
Regarding claim 8, Nejad discloses the semiconductor device according to claim 2 (Fig. 1), further comprising: a plurality of bit lines (14a-14b), disposed on the substrate to intersect with the word lines (intersecting in the 3rd direction), the bit lines extended along the third direction to connect to the at least one first contact (connect through 22, as shown in Fig. 2) and the at least one second contact (indirect connection through the substrate 11) respectively.
Regarding claim 9, Nejad discloses the semiconductor device according to claim 8 (Fig. 2), wherein the bit lines are integrally formed with the at least one first contact and the at least one second contact, respectively (A series electrical connection is formed from 18 through 20 and continues to the bitline 14b. This electrical connection is a functional integration required for device operation and is described in [0037]: “read” and “written”. Thus, these components are “integrally formed”).
Regarding claim 10, Nejad discloses the semiconductor device according to claim 1 (Fig. 1), wherein the second active area comprises a first edge (See annotated figure, a demarcation rather than any specific structure) extending along the second direction, and a second edge (See annotated figure, a demarcation rather than any specific structure) extending along the third direction, and the first edge is parallel with the word lines (each of these structures extend in the second direction, thus the are “parallel”).
Regarding claim 11, Nejad discloses the semiconductor device according to claim 1, wherein one of the active area units (See annotated figure for the selected unit) has one end (See annotated figure for the selected end) directly in contact with the at least one second word line (16 is directly overlapped by the 2nd word line 12c, thus “directly in contact”), and another end (See annotated figure for the selected end) directly in contact with the second active area (“directly in contact” with the demarcation which begins at a portion of the trench isolation).
Regarding claim 5, Nejad discloses the semiconductor device according to claim 4 (Fig. 1), wherein the one of the active area units does not contact the second active area (See the alternative demarcation square below, which includes a gap between the selected unit 16 and the demarcation).
Illustrated below is a marked and annotated alternative interpretation of Fig. 1 of Nejad.
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Regarding claim 7, Nejad discloses the semiconductor device according to claim 5 (Fig. 2), wherein sidewalls of the at least one second word line (See dashed reference lines for 12a-12b. These lines are similarly interpreted for 12c which is not shown) and the at least one second contact (See dashed reference lines) are vertically (See annotated figure for direction designation) aligned with each other (Each extends vertically without fully reaching each other. Thus, alignment is a parallel vertical alignment).
Regarding independent claim 12, Nejad discloses a semiconductor device (Fig. 1, First Interpretation), comprising;
a substrate (11) comprising a shallow trench isolation ([0031]: “surrounded by field isolation elements”; See annotated figure, the trench is shown in Fig. 2) and an active structure (an area including a plurality of 16, See dashed reference square) defined by the shallow trench isolation, the active structure comprising:
a first active area (the area outside the dashed reference square) comprising a plurality of active area units (16) being parallel extended along a first direction (See annotated figure for direction designation), and each of the active area units comprising two end portions at two opposites thereof (“one end” and “another end” of annotated figure) and a middle portion (“middle portion” of annotated figure) between the two end portions (between in the first direction); and
a second active area (the area outside the dashed reference square) disposed outside a periphery of the first active area, to surround all of the active area units (fully surround); and
a plurality of word lines (12a-12d), disposed in the substrate (“in” shown in cross-sectional view in Fig. 2), extending in a second direction (See annotated figure) to intersect with the active area units (intersecting in the second direction) and the shallow trench isolation (intersecting in the second direction) and arranging in a third direction (See annotated figure) being perpendicular to the second direction, wherein the word lines comprises a plurality of first word lines (12a and 12b) and at least one second word line (12c), wherein each of the first word lines crosses the middle portion of corresponding ones of the active area units (crosses in the 2nd direction), and the at least one second word line crosses an end portion (crosses in the 2nd direction) of a corresponding one of the active area units (See annotated figure for selected unit).
Regarding claim 14, Nejad discloses the semiconductor device according to claim 12 (Fig. 1, First Interpretation), wherein the corresponding one of the active area units directly contacts the second active area (“directly contacts” the demarcation which begins at a portion of the trench isolation).
Regarding claim 15, Nejad discloses the semiconductor device according to claim 14 (Fig. 1, First Interpretation), wherein one end of the corresponding one of the active area units (See annotated figure for the selected end) is directly in contact with the at least one second word line (16 is directly overlapped by the 2nd word line 12c, thus “directly in contact”) and another end of the one of the active area units (See annotated figure for the selected end) is directly in contact with the second active area (“directly in contact with” the demarcation which begins at a portion of the trench isolation).
Regarding claim 16, Nejad discloses the semiconductor device according to claim 12 (Fig. 1, First Interpretation), wherein the first word lines are sequentially arranged along the third direction perpendicular to the second direction by a first pitch (See annotated figure. Note: this pitch includes only one contact 20 within the pitch), the at least one second word line is arranged along the third direction by a second pitch (See annotated figure. Note: this pitch includes two contacts 18 within the pitch as well as third direction spacing between these contacts), and the second pitch is greater than the first pitch (“greater” because the second pitch includes multiple contacts as well as spacing between these contacts).
Regarding claim 17, Nejad discloses the semiconductor device according to claim 16 (Fig. 1, First Interpretation), further comprising:
at least one first contact (20), disposed on the active area units and between two adjacent ones of the first word lines (between 12a and 12b); and
at least one second contact (18), disposed on the active area units and between adjacent ones of the first word lines and the at least one second word line (between 12a/12b and 12c), wherein a width of the at least one second contact in the first direction (greatest width, See annotated figure) is greater than a width of the at least one first contact in the first direction (The 1st contact is a circular shape, therefore it has a variable width in the 1st direction and must have at least some width along the 1st direction that is smaller than the greatest width of contact 18, See annotated figure).
Regarding claim 18, Nejad discloses the semiconductor device according to claim 17 (Fig. 1, First Interpretation), wherein the at least one first contact and the second contact do not contact the corresponding one of the active area units (the selected contacts as the 1st and 2nd contacts are directly contacting a different unit).
Regarding claim 20, Nejad discloses the semiconductor device according to claim 17 (Fig. 1, First Interpretation), further comprising: a plurality of bit lines (14a-14b), disposed on the substrate to intersect with the word lines (intersecting in the 3rd direction), the bit lines extended along the third direction to connect to the at least one first contact (connect through 22, as shown in Fig. 2) and the at least one second contact (indirect connection through the substrate 11) respectively, wherein the bit lines, the at least one first contact, and the at least one second contact are monolithic (Fig. 2 shows each of these structures separately are monolithic).
Regarding claim 13, Nejad discloses the semiconductor device according to claim 12 (Fig. 1, Alternative Interpretation), wherein the corresponding one of the active area units does not contact the second active area (See the alternative demarcation square above, which includes a gap between the selected unit 16 and the demarcation).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Nejad in view of Jeon (US 11177264 B2).
Regarding independent claim 21, Nejad discloses a semiconductor device (Fig. 1, First Interpretation), comprising;
a substrate (11) comprising a shallow trench isolation ([0031]: “surrounded by field isolation elements”; See annotated figure, the trench is shown in Fig. 2) and an active structure (an area including a plurality of 16, See dashed reference square) defined by the shallow trench isolation, the active structure comprising:
a first active area (the area enclosed within the dashed reference square) comprising a plurality of active area units (16) being parallel extended along a first direction (See annotated figure for direction designation); and
a plurality of word lines (12a-12d), disposed in the substrate (“in” shown in cross-sectional view in Fig. 2), extending in a second direction (See annotated figure) to intersect with the active area units (intersecting in the second direction) and the shallow trench isolation (intersecting in the second direction),
wherein the word lines comprises a plurality of first word lines (12a and 12b) and at least one second word line (12c),
wherein an intersection portion of a corresponding one of first word lines (See annotated figure for designated/encircled portion) intersecting one of the active area units is the same as an intersection portion of the corresponding one of first word lines intersecting another one of the active area units (See annotated figure for designated portion, the same portion is designated/encircled), […].
Nejad teaches intersection portions that are substantially uniform and similar. Thus, Nejad fails to teach “an intersection portion of the at least one second word lines intersecting one of the active area units is greater than an intersection portion of the at least one second word line intersecting another one of the active area units”.
Jeon discloses an intersection portion (Fig. 7: the portion of 110 intersecting A11, the portion with width TWA1) of the at least one second word lines (110) intersecting one of the active area units (A11) is greater than (“greater than” is shown by the curved shape of the intersection portion) an intersection portion (the portion of 110 intersecting A12, the portion with width WA2) of the at least one second word line intersecting another one of the active area units (A12). Modifying the intersection portions of Nejad to have the shapes and selectable widths disclosed by Jeon would arrive at the claimed intersection portion configuration. A person of ordinary skill in the art before the effective filing date would have a reasonable expectation of success because in each situation the intersection portion is performing the same function as a gate (Nejad: [0037]: “function as gates”; Jeon: col. 10, lines 27-29: “a gate structure”). Jeon provides a teaching to motivate one of ordinary skill in the art before the effective filing date to have the claimed intersection portion configuration in that it would enable a compact device by reducing electrical interference during operation (col. 8, lines 32-45: “a possibility of electrical interference between gate structures may be reduced, thereby enhancing device reliability”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed configuration because it would enable a compact device. 2143 (I)(G).
Response to Arguments
Applicant's arguments filed 1/21/2026 have been fully considered but they are not persuasive.
Applicant remarks:
Applicant remarks “Claim 21 is new. Previously presented claims 1-20 remain pending”. Remarks at pg. 7.
Examiner’s reply:
The examiner finds the most recently entered set of claims (filed 1/21/2026) cancelling claim 19, thus, only claims 1-18 and 20-21 are pending. These claims filed 1/21/2026 are the set of claims examined in the instant Office action.
Applicant argues:
Applicant argues with respect to amended claim 1 that “the word lines WL of the cited Park are namely arranged in the same pitch, and the cited Park fails to disclose the claimed features “the at least one second word line is arranged along the third direction, and is spaced apart from a closest one of the first word lines by a second pitch, and the second pitch is greater than the first pitch” in claim 1 of the instant application” and “the buried wirings 22 of the cited Ota are also arranged by the same pitch, with any two closed ones of buried wirings 22 being separated by the same pitch. Thus, the cited Ota also fails to disclose the claimed features”. Remarks at pgs. 9-10.
Examiner’s reply:
The examiner is interpreting pitch consistent with Applicant’s remarks, which is consistent with Applicant’s disclosure, the prior art of record, and the ordinary and customary meaning. The examiner finds Applicant’s remarks persuasive for reasons consistent with the arguments. Therefore, the rejection has been withdrawn. However, the examiner notes the amendments have changed the scope of the claims and upon further consideration, a new ground(s) of rejection is made in view of a newly found reference (Nejad) as necessitated by the claim amendment.
Applicant argues:
Applicant argues with respect to amended claim 12 that “claim 12 is not anticipated by the cited Park”. Remarks at pg. 12.
Examiner’s reply:
Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Nejad is relied upon in the instant Office action as necessitated by claim amendment.
Applicant argues:
Applicant argues with respect to new claim 21 that “the new claim 21 is also not anticipated by the cited Park and the cited Ota, and which should also be in condition for allowance for the same and similar reasons above”. Remarks at pg. 14.
Examiner’s reply:
Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Nejad and Jeon are relied upon in the instant Office action.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM H ANDERSON/ Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 February 20, 2026