DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 8, 9, 11, 14, 19, 20 is/are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/11/25.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-7, 10, 12, 13, 15-18 have been considered but are moot because the new ground of rejection does not relies on a new reference for teaching matters specifically challenged in the argument.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-7, 10, 12, 13, 15-18 is/are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
There is support in paragraphs, [0006]-[0008] of the specification, as filed, for an adhesive layer that is “configured to block light” as previously claimed. Although this is a relatively broad functional limitation, it requires the adhesive layer, in the package, to block light. The limitation does not require that the adhesive itself be inherently opaque or be the component responsible for the light blocking.
The current amendment now structurally characterizes the adhesive as a light-blocking layer. Whereas paragraph [0062] of the specification states “[t]he adhesive layer 300 may block light.” Accordingly, a person of ordinary skill generally would understand this to mean that the adhesive itself constitutes the light-blocking material or layer, rather than merely being capable of blocking light. This amendment is narrowing.
If a reference discloses a transparent substrate, a clear adhesive, and a separate black matrix or opaque coating, it would read on “configured to block light” since the adhesive together with the coating blocks light. However, it would not teach “the adhesive being a light blocking layer” unless the adhesive itself is described as opaque or light blocking.
Paragraph [0061] of the specification states: “[t]he adhesive layer 300 may include, for example, but not limited to, an epoxy resin composition containing a filler.” However, the specification does not identify the adhesive itself as a light-blocking layer. Accordingly, there is a written description question. The distinction is subtle, but it matters since the amendment changes the characterization of the structure. Therefore, new art is applied below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 2, 4-7, 10, 12, 13, 15-18 is/are rejected under 35 U.S.C. 103 as being obvious over U.S. Patent Application Publication No. 2022/0077209 (Kim) or unpatentable over U.S. Patent Application Publication No. 2009/0267170 (Chien), in view of U.S. Patent Application Publication No. 2023/0161390 (Silvanto).
The applied reference (Kim) has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
Kim discloses (at least Fig. 4)
1. (Currently Amended) A semiconductor package comprising:
a package substrate 500;
a semiconductor chip 100 disposed on the package substrate 500;
a transparent substrate 400 disposed on the semiconductor chip 100; and
an adhesive layer 200 (a polymer [0050]) that is disposed between the semiconductor chip 100 and the transparent substrate 400;
wherein the transparent substrate 400 comprises:
a first lower side 401 that faces the semiconductor chip 100,
a second lower side 402 that faces the semiconductor chip 100 and is disposed above the first lower side 401.
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Chien discloses (at least Fig. 4B)
1. A semiconductor package comprising:
a package substrate 301 / 315;
a semiconductor chip 302 disposed on the package substrate 301 / 315;
a transparent substrate 340 disposed on the semiconductor chip 302; and
an adhesive layer 408-A (epoxy spacer paste [0013]) that is disposed between the semiconductor chip 302 and the transparent substrate 340;
wherein the transparent substrate 340 comprises:
a first lower side 408-B that faces the semiconductor chip 302,
a second lower side 342 that faces the semiconductor chip 302 and is disposed above the first lower side 408-B.
Kim or Chien fail to disclose
the adhesive layer is a light blocking layer; and
a first inner side wall that connects the first lower side and the second lower side, and wherein the adhesive layer is in contact with the second lower side and the first inner side wall.
Silvanto teaches
A semiconductor package comprising:
an adhesive layer 325 being a light blocking layer (opaque, [0056]);
a transparent substrate 322 / 324 comprising:
a first inner side wall (near 325) that connects the first lower side (of 324) and the second lower side (of 322), and wherein the adhesive layer 325 is in contact with the second lower side (of 322) and the first inner side wall (of 324).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a transparent substrate having a first inner side wall, a first lower side, and a second lower side in contact with a light-blocking adhesive layer Kim or Chien. The motivation would be to provide multiple individual layers, some or all of which may provide an optical function to facilitate the operation of the display. Also, the adhesive would seal and/or otherwise protect the components of the display stack from delamination or other damage that may occur if such components are not suitably strong or resistant to damage during normal use of the device as taught by Silvanto.
Kim discloses [0030] / Chien discloses ([0013]-[0015])
2. The semiconductor package of claim 1, wherein the semiconductor chip 100 or 302 is an image sensor chip that comprises a plurality of microlenses 160 or 307 disposed below the first lower side 401 or 408-B of the transparent substrate 400 or 340.
Kim discloses / Chien discloses
4. The semiconductor package of claim 2, wherein the adhesive layer 200 or 408-A does not overlap the plurality of microlenses 160 or 307.
Kim discloses / Chien discloses
5. The semiconductor package of claim 1, wherein the adhesive layer 200 (polymer) or 408-A (epoxy paste) is configured to have a lower light reflectivity and a higher light absorptivity than the transparent substrate 400 (glass or plastic) or 340 (glass).
Silvanto teaches
6. The semiconductor package of claim 1, wherein the second lower side (of 322) surrounds the first lower side (of 324) from a plan viewpoint.
Silvanto teaches
7. The semiconductor package of claim 1, wherein a side wall of the adhesive layer 325 that in contact with the first inner side (of 324) wall is flat.
Kim discloses / Chien discloses
10. The semiconductor package of claim 1, wherein an upper side of the transparent substrate 400 or 340 is flat.
Kim or Chien discloses
12. The semiconductor package of claim 1, wherein the adhesive layer 200 or 408-A is in contact with an upper side of the semiconductor chip 100 or 302.
Kim discloses (at least Fig. 4)
13. An image sensor package comprising:
a package substrate 500;
an image sensor chip 100 disposed on the package substrate 500, the image sensor chip 100 comprising a plurality of microlenses 160;
a transparent substrate 400 disposed on the image sensor chip 100; and
an adhesive layer 200 (a polymer [0050]) that is disposed between the semiconductor chip 100 and the transparent substrate 400.
Chien discloses (at least Fig. 4B)
13. An image sensor package comprising:
a package substrate 301 / 315;
an image sensor chip 302 disposed on the package substrate 301 / 315, the image sensor chip 302 comprising a plurality of microlenses 307;
a transparent substrate 340 disposed on the image sensor chip 302; and
an adhesive layer 408-A (epoxy spacer paste [0013]) that is disposed between the semiconductor chip 302 and the transparent substrate 340.
Kim or Chien fail to disclose
the adhesive layer is a light blocking layer; and
wherein the transparent substrate comprises a protrusion protruding toward the image sensor chip in a central region of the transparent substrate that overlaps the plurality of microlenses, and wherein the adhesive layer is in contact with an upper side of the image sensor chip, and the adhesive layer is in contact with a side surface of the protrusion to surround the protrusion.
Silvanto teaches
A semiconductor package comprising:
an adhesive layer 325 being a light blocking layer (opaque, [0056]);
a transparent substrate 322 / 324 comprising:
a first inner side wall (near 325) that connects the first lower side (of 324) and the second lower side (of 322), and wherein the adhesive layer 325 is in contact with the second lower side (of 322) and the first inner side wall (of 324).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a transparent substrate having a first inner side wall, a first lower side, and a second lower side in contact with a light-blocking adhesive layer Kim or Chien. The motivation would be to provide multiple individual layers, some or all of which may provide an optical function to facilitate the operation of the display. Also, the adhesive would seal and/or otherwise protect the components of the display stack from delamination or other damage that may occur if such components are not suitably strong or resistant to damage during normal use of the device as taught by Silvanto.
The combination of references fails to teach
15. The image sensor package of claim 13, wherein a width of the protrusion is greater than or equal to a width of a region in which the plurality of microlenses are disposed.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to determine the optimum width of the protrusion in Kim or Chien. The motivation would be the width of the protrusion of the claimed transparent substrate is a matter of choice or routine experimentation which a person of ordinary skill in the art would have found obvious. See MPEP 2144.04, 2144.05.
Kim discloses
16. The image sensor package of claim 13, further comprising
a molding film 300 that surrounds the image sensor chip 100, the transparent substrate 400, and the adhesive layer 200
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a molding film in Chien. The motivation would be to protect the package as a matter of choice or routine experimentation which a person of ordinary skill in the art would have found obvious. See MPEP 2144.04, 2144.05.
Silvanto teaches
17. The image sensor package of claim 13, wherein the adhesive layer 325 does not overlap a lower side of the protrusion.
Kim or Chien disclose
18. The image sensor package of claim 13, wherein the adhesive layer 200 or 408-A is opaque, and the adhesive layer 200 or 408-A is configured to have a lower light reflectivity and a higher light absorptivity than the transparent substrate 400 or 340.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Application Publication Nos. 2013/0128106 (Tam), 2006/0255253 (Hsiao), 2002/0006687 (Lam), CN Publication No. 103178038 (Lin) teach a package substrate having an image sensor chip, an adhesive, and a transparent substrate.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571.272.1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TERESA M. ARROYO/Primary Examiner, Art Unit 2893
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