DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 13 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Zhang (CN 111834317a)
Regarding claim 1.
A semiconductor structure, comprising: a substrate (fig 4:301; [para 0058]); a conductive layer (fig 4:3031,3032; [para 0061,0063]),
wherein the conductive layer (fig 4:3031,3032; [para 0061,0063]) is disposed on the substrate (fig 4:301; [para 0058]);
a dielectric layer (fig 4:311; [para 0059]),
wherein the dielectric layer (fig 4:311; [para 0059]) is disposed on the conductive layer (fig 4:3031.3032; [para 0061,0063]) and comprises a first opening;
and a re-distribution layer (fig 4:304,308,309; [para 0065]),
wherein the re-distribution layer (fig 4:304,308,309; [para 0065]) is disposed on the dielectric layer (fig 4:3 [para 0059]) and is connected to the conductive layer (fig 4:3031,3032; [para 0061,0063]),
the re-distribution layer (fig 4:304,308,309; [para 0065]) comprises a bond pad (fig 4:308; [para 0065]) and a probe pad (fig 4:309; [para 0065]),
the bond pad (fig 4:308; [para 0065]) and the probe pad (fig 4:309; [para 0065]) are disposed adjacent to each other,
at least one recess (fig 4:305 through hole; [para 0063]) is formed in the re-distribution layer on a side of the re-distribution layer (fig 4:304,308,309; [para 0065]) opposite to the first opening,
and the at least one recess is disposed between the bond pad (fig 4:308; [para 0065]) and the probe pad (fig 4:309; [para 0065]),
and wherein a first orthographic projection of the recess on the substrate (fig 4:301; [para 0058]);
is within a second orthographic projection of the first opening on the substrate (fig 4:301; [para 0058]),
an air gap (fig 4:306; [para 0058]) is formed in the re- distribution layer (fig 4:304,308,309; [para 0065]) on a side of the re-distribution layer (fig 4:304,308,309; [para 0065]) facing the first opening,
and the air gap (fig 4:306; [para 0058]) is located below the recess and above the first opening,
wherein the re-distribution layer (fig 4:304, 308,309; [para 0065]) fills a portion (fig 4:304; [para 0061]) of the first opening.
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Regarding claim 2.
Zhang teaches the semiconductor structure according to claim 1, further
Zhang teaches:
the at least one recess consists of one recess,
and the bond pad (fig 4:308; [para 0065]) and the probe pad (fig 4:309; [para 0065]) are respectively disposed on two opposite sides of the recess.
Regarding claim 13.
Zhang teaches the semiconductor structure according to claim 1, further
Zhang teaches:
the first opening exposes the conductive layer (fig 4:3031,3032; [para 0061,0063]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 3, 4, 5, 6, 8, 13, 14, 15, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 2003/0197289) in view of Zhang (CN 111834317a)
Regarding claim 1.
Lin teaches:
A semiconductor structure, comprising:
a substrate (fig 3b:350,352; [para 0032]);
a dielectric layer (fig 3b:330; [para 0031]), ;
and a re-distribution layer (fig 3a,3b:312,314,320; [para 0031,0032]), wherein the re-distribution layer (fig 3a,3b:312,314,320; [para 0031,0032]) is disposed on the dielectric layer (fig 3b:330; [para 0031]), the re-distribution layer (fig 3a,3b:312,314,320; [para 0031,0032]) comprises a bond pad (fig 3a,3b:312,; [para 0003]) and a probe pad (fig 3a,3b:314 ; [para 0033]), the bond pad (fig 3a,3b:312,; [para 0033]) and the probe pad (fig 3a,3b:314 ; [para 0033]) are disposed adjacent to each other (fig 3a,3b), at least one recess (fig 3a:360; [para 0037]) is formed in the re-distribution layer (fig 3a,3b:312,314,320; [para 0031,0032]) , and the at least one recess (fig 3a:360; [para 0037]) is disposed between the bond pad (fig 3a,3b:312,; [para 0033]) and the probe pad (fig 3a,3b:314 ; [para 0033]); ,
Lin does not teach an air gap is formed in the redistribution layer over an opening in the dielectric.
Zhang teaches:
A semiconductor structure, comprising: a substrate (fig 4:301; [para 0058]); a conductive layer (fig 4:303; [para 0060]),
wherein the conductive layer (fig 4:303; [para 0060]) is disposed on the substrate (fig 4:301; [para 0058]);
a dielectric layer (fig 4:302; [para 0056]),
wherein the dielectric layer (fig 4:302; [para 0056]) is disposed on the conductive layer (fig 4:303; [para 0060]) and comprises a first opening (fig 4:305; [para 0063]);
wherein the pad layer (fig 4:308,309; [para 0065]) is disposed on the dielectric layer (fig 4:302; [para 0056]) and is connected to the conductive layer (fig 4:303; [para 0060]),
a bond pad (fig 4:308; [para 0065]) and a probe pad (fig 4:309; [para 0065]),
the bond pad (fig 4:308; [para 0065]) and the probe pad (fig 4:309; [para 0065]) are disposed adjacent to each other,
at least one recess is (fig 4:307 comprising a crater; [para 0065,0098]) formed in the pad layer on a side of the pad layer (fig 4:308,309; [para 0065]) opposite to the first opening,
and the at least one recess is disposed between the bond pad (fig 4:308; [para 0065]) and the probe pad (fig 4:309; [para 0065]),
and wherein a first orthographic projection of the recess on the substrate (fig 4:3011; [para 0058]);
is within a second orthographic projection of the first opening (fig 4:305; [para 0063]) on the substrate (fig 4:3011; [para 0058]),
an air gap (fig 4:306; [para 0058]) is formed in the pad layer (fig 4:308,309; [para 0065]) on a side of the pad layer (fig 4:308,309; [para 0065]) facing the first opening (fig 4:305; [para 0063]),
and the air gap (fig 4:306; [para 0058]) is located below the recess and above the first opening (fig 4:305; [para 0063]),
wherein the pad layer (fig 4:308,309; [para 0065]) fills a portion of the first opening (fig 4:305; [para 0063]).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an opening below the pad to function as a barrier so that the bonding section and probe section do not effect each other (Zhang abstract)
Regarding claim 2.
Lin in view of Zhang teaches the semiconductor structure according to claim 1, further
Zhang teaches:
the at least one recess consists of one recess (fig 4:307 comprising a crater; [para 0065,0098]),
and the bond pad (fig 4:308; [para 0065]) and the probe pad (fig 4:309; [para 0065]) are respectively disposed on two opposite sides of the recess.
Regarding claim 3.
Lin in view of Zhang teaches the semiconductor structure according to claim 2
Lin teaches:
widths of the recess (fig 3d:368; [para 0038]) sampled along a length direction of the recess are uniform.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the width of the recess to be uniform in order to provide a clear demarcation between the probe and bonding pad.
Regarding claim 4.
Lin in view of Zhang teaches the semiconductor structure according to claim 2
Lin teaches:
widths of the recess (fig 3a:368; [para 0037]) sampled along a length direction of the recess are varied.
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the width of the recess to be varied in order to aid in finding the center of the division line.
Regarding claim 5.
Lin in view of Zhang teaches the semiconductor structure according to claim 4, further
Lin teaches:
the widths of the recess (fig 3a:368; [para 0037]) gradually decrease from two opposite edge regions of the recess to a middle region of the recess (fig 3a:368; [para 0037]).
Regarding claim 6.
Lin in view of Zhang teaches the semiconductor structure according to claim 1
Lin teaches:
the at least one recess consists of a plurality of the recesses (fig 3c:362; [para 0038]),
and the bond pad (fig 3c:312; [para 0038]) and the probe pad (fig 3c:314; [para 0038]) are respectively disposed on two opposite sides of a recess region formed by the plurality of the recesses (fig 3c:362; [para 0038]).
Regarding claim 8.
Lin in view of Zhang teaches the semiconductor structure according to claim 6, further
Lin teaches:
the recesses (fig 3c:362; [para 0038]) are disposed and spaced apart along a length direction of the recess region,
and the length direction of the recess region is substantially parallel to an edge line between the probe pad (fig 3c:314; [para 0038]) and the recesses (fig 3c:362; [para 0038]).
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Regarding claim 13.
Lin iv view of Zhang teaches the semiconductor structure according to claim 1, further
Zhang teaches:
the first opening (fig 4:305; [para 0063]) exposes the conductive layer (fig 4:303; [para 0060]).
Regarding claim 14.
Lin in view of Zhang teaches the semiconductor structure according to claim 1, further
Zhang teaches:
a width of the first opening is not greater than 3 µm (the second through hole is 0.1-0.3 um; [para 0015]).
Given the teaching of the references, it would have been obvious to determine the optimum width of the opening involved. See In re Aller, Lacey and Hall (10 USPQ 233-237) It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575,1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 15.
Lin in view of Zhang teaches the semiconductor structure according to claim 1, further
Zhang teaches:
a width of the first opening is not 1um to 3 µm (the second through hole is 0.1-0.3 um; [para 0015]).
Given the teaching of the references, it would have been obvious to determine the optimum width of the opening involved. See In re Aller, Lacey and Hall (10 USPQ 233-237) It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575,1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 16.
Lin in view of Zhang teaches the semiconductor structure according to claim 1
Lin teaches:
an optical identification layer (fig 3b,3d:340; [para 0034]),
wherein the optical identification layer (fig 3b,3d:340; [para 0034]) is disposed on the re-distribution layer (fig 3b,3d:312,314; [para 0031]),
and the optical identification layer comprises a second opening to expose the bond pad (fig 3c:312; [para 0038]), the probe pad (fig 3c:314; [para 0038]), and the recess (fig 3c:362; [para 0038]).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over
Lin (US 2003/0197289) in view of Zhang (CN 111834317a) as applied to claim 6 and further in view of Tanabe (US 2011/0175241).
Regarding claim 7.
Lin in view of Zhang teaches the semiconductor structure according to claim 6, above
Lin in view of Zhang does not teach recesses spaced apart along a width of the recess region.
Tanabe teaches:
the recesses (fig 5:123,121:0031]) are disposed and spaced apart along a width direction of the recess region.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a plurality of recesses in at least two rows in order to designate the boundaries of the probe region, the bonding region, and the intimidate area between the two which provides an offset toto ensure that there is no overlap (paragraph 31)
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over
Lin (US 2003/0197289) in view of Zhang (CN 111834317a) as applied to claim 8 and further in view of Tanabe (US 2011/0175241).
Regarding claim 9.
Lin in view of Zhang teaches the semiconductor structure according to claim 8, above
Lin in view of Zhang does not teach at least two rows in the recess region.
Tanabe teaches:
the plurality of the recesses (fig 5:123,121:0031]) are arranged in at least two rows in the recess region.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a plurality of recesses in at least two rows in order to designate the boundaries of the probe region, the bonding region, and the intimidate area between the two which provides an offset toto ensure that there is no overlap (paragraph 31)
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Newly applied Zhang (CN 111834317a) anticipates the claims
Conclusion
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/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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