Prosecution Insights
Last updated: April 19, 2026
Application No. 18/197,768

SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Final Rejection §112
Filed
May 16, 2023
Examiner
YUSHINA, GALINA G
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
2y 5m
To Grant
96%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
838 granted / 1059 resolved
+11.1% vs TC avg
Strong +17% interview lift
Without
With
+17.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
38 currently pending
Career history
1097
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
47.7%
+7.7% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
35.4%
-4.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1059 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Acknowledgement of Amendment Applicant’ amendment filed 01/22/26 has been acknowledged. Applicant amended Claim 1 by incorporating into this claim the allowable limitation of Claim 7 as well as limitations of Claim 6, on which Claim 7 depend, cancelled Claims 6-7, and also amended earlier examined Claims 4, 9, and withdrawn from consideration Claim 8. Status of Claims Claims 8, 10, and 19-10 were earlier withdrawn from considerations as belonging to inventions not chosen for examination. Claims 1-5, 9, and 11-18 are examined on merits herein. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “circuit elements disposed on the first substrate”, as Claims 1 and 12 recite, must be shown or the feature(s) canceled from the claims: Currently Fig. 7 of the application shows that portions of transistors are disposed inside the first substrate, and only gates are disposed over the first substrate. No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-5, 9, and 11-18 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. In re Claim 1: Lines 2-3 of Claim 1 recite: “circuit elements disposed on the first substrate”. The recitation is not clear, since circuit elements of the current application are transistors - similar to PT in Fig. 7, and these transistors have source and drain regions (based on the accepted images of such transistors) disposed in the first substrate 200. Appropriate correction is required to clarify the claim language. For this Office Action, the cited limitation was interpreted as: “circuit elements portions of which are disposed on the first substrate”. In re Claim 12: Claim 12 has some issues similar to those of Claim 1 described above. For this Office Action, it was interpreted as the interpretation of a similar limitation of Claim 1 In re Claims 2-3, 5, 9, 11, and 13-18: Claims 2-3, 5, 9, 11, and 13-18 are rejected under 35 U.S.C. 112(b) due to dependency either on Claim 1 or on Claim 12. Allowable Subject Matter Claims 1, 9, and 12, as interpreted, contain allowable subject matter. Reason for Identification of Allowable Subject Matter Re Claim 1: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitations as: “each of the via structures includes: a first extension disposed in the first and second areas and extending in the third direction; and a first spaced portion disposed in the third area and spaced apart from the first extension”, in combination with other limitations of Claim 1. Re Claim 9: The prior arts of record, alone or in combination, do not anticipate and do not render obvious such limitations of Claim 9 (as interpreted) as: “each of the via connecting structures includes: a second extension disposed in the first and second areas and extending in the second direction; and a second spaced portion disposed in the third area and spaced apart from the second extension”, in combination with limitations of Claim 1, on which Claim 9 depends. Re Claim 12: The prior arts of record, alone or in combination, do not anticipate and do not render obvious such limitations of Claim 12 (as interpreted) as: “each of the via structures includes: a first extension disposed in the first area and extending in the second direction; and a first spaced portion disposed in the second area and spaced apart from the first extension in each of the first and second directions” and: “each of the via connecting structures includes: a second extension disposed in the first area and extending in the first direction; a second spaced portion disposed in the second area and spaced apart from the second extension in each of the first and second directions”, in combination with other limitations of Claim 12. The prior arts of record include: Tagami (US 2022/0069093), Park (US 2021/0066313), Shim (Us 2019/0057898), Zhang et al. (US 2021/0375806), Shim et al. (US 2020/0402923), Kim et al. (US 2022/0115294), and Yun et al. (US 2021/0143096). Response to Arguments Applicant’ arguments (REMARKS, filed 01/22/26) have been fully considered. Examiner agrees with the presented Interview Summary (REMARKS, page 10). Since the Applicant did not address all issues having grounds for rejections under 35 U.S.C. 112(b) (REMARKS, pages 10-11), the current Office Action contains rejections of all remaining examined claims of the application under 35 U.S.C. 112(b). As the current Office Action shows, Claims 1-5, 9, and 11-18 may be allowed after Claims 1 and 12 are amended to provide no grounds for rejections under 35 U.S.C. 112(b) (REMARKS, page 11). As it was pointed out during an interview with Mr. Min Choi conducted on 01/27/26, earlier withdrawn from consideration Claims 8 and 10 can be rejoined with a set of earlier examined claims, but each of these claims shall be amended to recite: “the first extension is one of a plurality of first extensions” – for Claim 8 and: “the second extension is one of a plurality of second extensions” – for Claim 10. As it was also pointed during the interview, if the Applicant is willing to include Claims 19 and 20 into a potential patent, Claim 19 must be amended to include all limitations of either Claim 1 or Claim 12, corrected with respect to grounds for rejections under 35 U.S.C. 112(b). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication should be directed to GALINA G YUSHINA whose telephone number is 571-270-7440. The Examiner can normally be reached between 8 AM - 7 PM Pacific Time (Flexible). Examiner interviews are available. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s Supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300; a fax phone number of Galina Yushina is 571-270-8440. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center - for more information about Patent Center and visit https://www.uspto.gov/patents/docx - for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GALINA G YUSHINA/Primary Patent Examiner, Art Unit 2811, TC 2800, United States Patent and Trademark Office E-mail: galina.yushina@USPTO.gov Phone: 571-270-7440 Date: 01/27/26
Read full office action

Prosecution Timeline

May 16, 2023
Application Filed
Oct 19, 2025
Non-Final Rejection — §112
Nov 26, 2025
Interview Requested
Dec 17, 2025
Examiner Interview Summary
Dec 17, 2025
Applicant Interview (Telephonic)
Jan 22, 2026
Response Filed
Jan 27, 2026
Examiner Interview (Telephonic)
Feb 08, 2026
Final Rejection — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
96%
With Interview (+17.2%)
2y 5m
Median Time to Grant
Moderate
PTA Risk
Based on 1059 resolved cases by this examiner. Grant probability derived from career allow rate.

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