Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of the second embodiment in the reply filed on 11/17/25 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 12-13, 16-17, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al., 2021/0151439 in view of Cho et al., US 2021/0202490.
Choi et al. shows the invention substantially as claimed including a semiconductor device, comprising:
A substrate 10;
A plurality of storage node pads/landing pads 53, disposed on the substrate 10;
A supporting structure, disposed on the substrate and comprising a first supporting layer (for example, 95L) and a second supporting layer (for example, 85a) from bottom to top; and
A capacitor structure, disposed on the substrate, the capacitor structure comprising a plurality of columnar bottom electrodes 91, a capacitor dielectric layer 93 and a top electrode layer 95 stacked from bottom to top, wherein each of the columnar bottom electrodes comprise two recess portions 91cs extending from second supporting layer to first supporting layer (see fig. 1C and paragraphs 0034-0044).
Choi et al. does not expressly disclose where the two recess portions are asymmetric to each other. Cho et al. discloses the formation of a lower columnar electrode including recess portions (see recesses formed in electrode 81b, for example) that are asymmetric to each other (see fig. 3C and paragraphs 0041-0043). In view of this disclosure, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify the primary reference of Choi et al. so as to include a lower electrode with asymmetric recess portions because Cho et al. shows such a configuration to be suitable for a lower electrode of a capacitor.
With respect to dependent claim 13, Choi et al. does not expressly disclose wherein one of the two recess portions extends to below the first supporting layer in a direction vertical to the substrate. However, a prima facie case of obviousness exists because the configuration of the claimed recess portions is a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the recess portions is significant.
Concerning dependent claim 16, note that in Cho et al. the two recess portions comprise different extending lengths in the direction vertical to the substrate (see fig. 3C),
With respect to dependent claim 17, note that in Cho et al. the recesses of the two recess portions have different recess degrees in a direction horizontal to the substrate (again, see fig. 3C where the rightmost recess of sub-electrode 81b in fig. 3C has a further indentation in comparison to the left).
As to dependent claims 19-20, note that the two recess portions are in different shapes and are partially inclined in different degrees in the direction vertical to the substrate (see fig. 3C).
Claim(s) 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al., 2021/0151439 in view of Cho et al., US 2021/0202490 as applied to claims 12-13, 16-17, and 19-20 above, and further in view of Zenke, U.S. Patent 5,811,333.
Choi et al. and Cho et al. are applied as above but do not expressly disclose wherein one of the two recess portions has an irregular surface and uneven recesses. Zenke discloses forming the lower electrode of a capacitor with a roughened irregular service which has uneven recesses (see, for example, abstract, fig. 3C and col. 6-lines 5-11). In view of this disclosure, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify the device of Choi et al. modified by Cho et al. so as to comprise a lower electrode having the claimed surface configuration because in such a way the surface area and storage capacity of the capacitor can be improved.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al., 2021/0151439 in view of Cho et al., US 2021/0202490 as applied to claims 12-13, 16-17, and 19-20 above, and further in view of Kim et al., U.S. Patent 6,207,487.
Choi et al. and Cho et al. are applied as above but do not expressly disclose wherein the capacitor dielectric layer disposed on the two opposite sidewalls has different thicknesses. Kim et al. discloses wherein a capacitor dielectric layer disposed on two opposite sidewalls has different thicknesses (132a,132b---see fig. 3E and col. 7-lines 53-65). In view of this disclosure, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify the device of Choi et al. modified by Cho et al. so as to include the claimed capacitor dielectric of Kim et al. because in such a way a capacitor with low leakage current can be produced.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent 12,409,062 discloses the formation of a vertically stacked capacitor with support layers (see abstract). Additionally, US 2024/0234486 discloses a vertically stacked capacitor with support layers and recesses formed in the electrodes (see, for example, fig. 8), and US 2024/0090201 discloses a vertically stacked U-shaped capacitor with upper and lower supporting layers (see abstract).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICHARD A BOOTH whose telephone number is (571)272-1668. The examiner can normally be reached Monday to Friday, 8:30 to 5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RICHARD A BOOTH/ Primary Examiner, Art Unit 2812
February 21, 2026