DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 2 (Claims 1-17) in the reply filed on 11/6/2025 is acknowledged.
Claims 18-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/6/2025.
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 8/18/2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 5-7, 10-12, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Cetnar et al (US 2023/0327011 A1, hereafter Cetnar) in view of Shealy et al (US 2021/0067123 A1, hereafter).
Re Claim 1, Cetnar discloses a semiconductor device (FIG. 2; [0042]-[0044]) comprising:
a not intentionally doped III N layer (220; [0042]), III being one or more Group 3 semiconductor element ([0042]);
an other III N barrier layer (230; [0043]), where the other III N includes at least one other III element different from the III element in the not intentionally doped III N layer (220; [0043]), the other III N barrier layer (230) being disposed on the not intentionally doped III N layer (220; [0043]);
a Sc--xAl1-xN layer (240; [0042]) epitaxially disposed on the other III N layer (230; [0042]).
Cetnar does not explicitly disclose a further III N layer, where III includes at least one further III element different from Aluminum; the further III N layer disposed on the Sc--xAl1-xN layer (240).
However, Shealy teaches a semiconductor device (FIG. 12; [0052]) comprising a further III N layer (130; [0027]), where III includes at least one further III element different from Aluminum ([0040]); the further III N layer (130) disposed on the Sc--xAl1-xN layer (125; [0039]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the limitations taught by Cetnar with the limitations taught by Shealy include a further III N layer (Shealy: 130) to protect underlying layers from cracking as taught by Shealy ([0019]).
Re Claim 2, Cetnar and Shealy teach the device according to Claim 1, while Cetnar further teaches wherein composition and thickness of the other III N barrier layer (230) are selected such that a 2D electron gas forms at a boundary between the other III N barrier layer (230) and the not intentionally doped III N layer (220; [0044]).
Re Claim 5, Cetnar and Shealy teach the device according to Claim 1, while Cetnar further teaches the device comprises:
an n-doped drain region (D; [0030]) recessed into or disposed on the not intentionally doped III N layer (220; [0043]) and in contact with a first end of the other III N barrier layer (230; [0043]) and with a first end of the Sc--xAl1-xN layer (240; [0043]); and
an n-doped source region (S; [0030]) recessed into or disposed on the not intentionally doped III N layer (220; [0043]) and in contact with a second end of the other III N barrier layer (230; [0043]) and with a second end of the Sc--xAl1-xN layer (240; [0043]).
Re Claim 6, Cetnar and Shealy teach the device according to Claim 5, while Cetnar further teaches wherein composition and thickness of the other III N barrier layer (230) are selected such that a 2D electron gas forms at a boundary between the other III N barrier layer (230) and the not intentionally doped III N layer (220; [0044]).
Re Claim 7, Cetnar and Shealy teach the device according to Claim 6, while they do not explicitly disclose in the used embodiments wherein the n-doped drain region (Cetnar: S) is recessed into the not intentionally doped III N layer (Cetnar: 220) up to or beyond a location of the 2D electron gas forms; and wherein the n-doped source region (Cetnar: S) is recessed into the not intentionally doped III N layer (Cetnar: 220) up to or beyond a location of the 2D electron gas forms.
Cetnar teaches in a separate embodiment (FIG. 1; [0029]-[0031]) wherein the n-doped drain region (D; [0030]) is recessed into the not intentionally doped III N layer (120; [0030]) up to or beyond a location of the 2D electron gas forms ([0030]); and wherein the n-doped source region (S; [0030]) is recessed into the not intentionally doped III N layer (120; [0030]) up to or beyond a location of the 2D electron gas forms ([0030]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device as discussed for Claim 6 with the limitations taught by Cetnar to have the source/drain regions (Cetnar: S/D) recessed around the not intentionally doped III N layer (Cetnar: 220) to establish sufficient connection with the 2DEG channel as taught by Cetnar ([0030]).
Re Claim 10, Cetnar and Shealy teach the device according to Claim 1, while Cetnar further teaches wherein the not intentionally doped III N layer (220) is a not intentionally doped GaN layer ([0042]), the other III N barrier layer (230) is an AlN layer ([0043]).
Shealy further teaches wherein the further III N layer (130) is a GaN layer ([0040]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure discussed for Claim 1 with the limitations taught by Shealy to have the further III N layer (Shealy: 130) be a GaN layer to protect underlying layers from cracking as taught by Shealy ([0019]).
Re Claim 11, Cetnar and Shealy teach the device according to Claim 10, while Cetnar further teaches the device comprises:
an n-doped drain region (D; [0030]) recessed into or disposed on the not intentionally doped GaN layer (220; [0043]) and in contact with a first end of the AlN barrier layer (230; [0043]) and with a first end of the Sc--xAl1-xN layer (240; [0043]); and
an n-doped source region (S; [0030]) recessed into or disposed on the not intentionally doped GaN layer (220; [0043]) and in contact with a second end of the AlN barrier layer (230; [0043]) and with a second end of the Sc--xAl1-xN layer (240; [0043]).
Re Claim 12, Cetnar and Shealy teach the device according to Claim 11, while Cetnar further teaches wherein composition and thickness of the AlN barrier layer (230) are selected such that a 2D electron gas forms at a boundary between the AlN barrier layer (230) and the not intentionally doped GaN layer (220; [0044]).
Re Claim 15, Cetnar and Shealy teach the device according to Claim 12, while they do not explicitly disclose in the used embodiments wherein the n-doped drain region (Cetnar: S) is recessed into the not intentionally doped GaN layer (Cetnar: 220) up to or beyond a location of the 2D electron gas forms; and wherein the n-doped source region (Cetnar: S) is recessed into the not intentionally doped GaN layer (Cetnar: 220) up to or beyond a location of the 2D electron gas forms.
Cetnar teaches in a separate embodiment (FIG. 1; [0029]-[0031]) wherein the n-doped drain region (D; [0030]) is recessed into the not intentionally doped GaN layer (120; [0030]) up to or beyond a location of the 2D electron gas forms ([0030]); and wherein the n-doped source region (S; [0030]) is recessed into the not intentionally doped GaN layer (120; [0030]) up to or beyond a location of the 2D electron gas forms ([0030]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device as discussed for Claim 6 with the limitations taught by Cetnar to have the source/drain regions (Cetnar: S/D) recessed around the not intentionally doped GaN layer (Cetnar: 220) to establish sufficient connection with the 2DEG channel as taught by Cetnar ([0030]).
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Cetnar and Shealy, as applied to Claim 1, further in view of Wang et al (US 2025/0169097 A1, hereafter Wang).
Re Claim 3, Cetnar and Shealy teach the device according to Claim 1, while they do not explicitly disclose wherein the Sc--xAl1-xN layer (Cetnar: 125) is a ferroelectric layer.
However, Wang teaches a semiconductor device (FIG. 11A) wherein the Sc--xAl1-xN layer (ScAlN; [0103]) is a ferroelectric layer ([0011]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device as discussed for Claim 1 with the limitations taught by Wang to specify the Sc--xAl1-xN layer (Cetnar: 125) is a ferroelectric layer to maintain an internal electrical polarization to modulate the threshold voltage of the device as taught by Wang ([0011]).
Re Claim 4, Cetnar, Shealy, and Wang teach the device according to Claim 3, while Cetnar further teaches wherein x is between about 0.1 and 0.36 ([0047]).
Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Cetnar and Shealy, as applied to Claim 5, further in view of Vishwanath et al (US 2021/0399119 A1, hereafter Vishwanath).
Re Claim 8, Cetnar and Shealy teach the device according to Claim 5, while Cetnar further teaches the device comprises:
a first electrically conducting contact (Au/Ti; [0030]) disposed on the n-doped source region (S; [0030]);
a second electrically conducting contact (Au/Ti; [0030]) disposed on the n-doped drain region (D; [0030]).
Cetnar and Shealy do not explicitly disclose the device comprises an electrically conductive gate contact disposed between the electrically conductive contacts (Cetnar: Au/Ti) on the n doped source and drain region (Cetnar: S, D) and disposed on the further III N layer (Shealy: 130).
However, Vishwanath teaches a device (FIG. 2; [0030]-[0033]) comprising an electrically conductive gate contact (214; [0030]) disposed between the electrically conductive contacts (212; [0030]) on the n doped source and drain region and disposed on the further III N layer (taught by Shealy, but would be on the further III N layer in combination since Vishwanath’s gate contact 214 is on the ScAlN layer 205; [0051]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device as discussed for Claim 5 with the limitations taught by Vishwanath to include a gate contact (Vishwanath: 214) to provide the necessary voltage for modulating electrical conductivity in the channel as taught by Vishwanath ([0033]) (for configuration in which a gate is used for the HEMT structure, see [0051] of Cetnar).
Re Claim 9, Cetnar, Shealy, and Vishwanath teach the device according to Claim 8, while Cetnar further teaches wherein a maximum cutoff frequency is at least 150 GHz ([0044]).
Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Cetnar and Shealy, as applied to Claim 10, further in view of Wang.
Re Claim 13, Cetnar and Shealy teach the device according to Claim 10, while they do not explicitly disclose wherein the Sc--xAl1-xN layer (Cetnar: 125) is a ferroelectric layer.
However, Wang teaches a semiconductor device (FIG. 11A) wherein the Sc--xAl1-xN layer (ScAlN; [0103]) is a ferroelectric layer ([0011]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device as discussed for Claim 10 with the limitations taught by Wang to specify the Sc--xAl1-xN layer (Cetnar: 125) is a ferroelectric layer to maintain an internal electrical polarization to modulate the threshold voltage of the device as taught by Wang ([0011]).
Re Claim 14, Cetnar, Shealy, and Wang teach the device according to Claim 13, while Cetnar further teaches wherein x is between about 0.1 and 0.36 ([0047]).
Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Cetnar and Shealy, as applied to Claim 11, further in view of Vishwanath.
Re Claim 16, Cetnar and Shealy teach the device according to Claim 11, while Cetnar further teaches the device comprises:
a first electrically conducting contact (Au/Ti; [0030]) disposed on the n-doped source region (S; [0030]);
a second electrically conducting contact (Au/Ti; [0030]) disposed on the n-doped drain region (D; [0030]).
Cetnar and Shealy do not explicitly disclose the device comprises an electrically conductive gate contact disposed between the electrically conductive contacts (Cetnar: Au/Ti) on the n doped source and drain region (Cetnar: S, D) and disposed on the further III N layer (Shealy: 130).
However, Vishwanath teaches a device (FIG. 2; [0030]-[0033]) comprising an electrically conductive gate contact (214; [0030]) disposed between the electrically conductive contacts (212; [0030]) on the n doped source and drain region and disposed on the further III N layer (taught by Shealy, but would be on the further III N layer in combination since Vishwanath’s gate contact 214 is on the ScAlN layer 205; [0051]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device as discussed for Claim 11 with the limitations taught by Vishwanath to include a gate contact (Vishwanath: 214) to provide the necessary voltage for modulating electrical conductivity in the channel as taught by Vishwanath ([0033]) (for configuration in which a gate is used for the HEMT structure, see [0051] of Cetnar).
Re Claim 17, Cetnar, Shealy, and Vishwanath teach the device according to Claim 16, while Cetnar further teaches wherein a maximum cutoff frequency is at least 150 GHz ([0044]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLIN RUSSELL MCCUTCHEON whose telephone number is (703)756-1897. The examiner can normally be reached Monday-Friday, 12:30-9:30 EST.
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/COLIN RUSSELL MCCUTCHEON/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892