Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/22/2026 and 6/9/2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 21 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 21 requires “the first metallic clip (104) […] welded […] to the first substrate (100) […]”. This claim depends from claim 1, which requires the “first metallic clip (104) […] welded […] to […] the first power semiconductor die (102)” and the “first power semiconductor die (102) attached to the first substrate (100)”. This combination of limitations requires the clip to be simultaneously welded to the substrate and the die attached to the same substrate. Applicant points to Fig. 7 and [0039]-[0040] to support the new combination of limitations. The examiner disagrees with these citations because:
Fig. 7 shows “the first metallic clip (104_1) […] welded to a first metallic region (122) of the second substrate (100_2)”, which does not support the simultaneous configuration required by claim 21..
[0039]-[0040] describes Fig. 7 consistent with the term mapping above, which does not support the simultaneous configuration required by claim 21.
The original disclosure fails to teach the first metallic clip (104) simultaneously welded to the first substrate (100) and the first power semiconductor die (102) attached to the first substrate (100) because:
Figs. 1-8 do not show the clip welded to the same substrate attached to the die.
[0003], [0005], [0006], [0042], [0059], and [0062] use “either […] or” language to describe the “welded” configuration, which does not support the simultaneous configuration required by claim 21.
[0004] and [0054] teach “a second metallic clip having a plurality of first contact regions ultrasonically welded to the first metallic region of the first substrate”, which does not support the simultaneous configuration required by claim 21.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 21 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
MPEP 2173.03 Correspondence Between Specification and Claims: “A claim, although clear on its face, may also be indefinite when a conflict or inconsistency between the claimed subject matter and the specification disclosure renders the scope of the claim uncertain as inconsistency with the specification disclosure or prior art teachings may make an otherwise definite claim take on an unreasonable degree of uncertainty.”
Regarding claim 21, the claim is clear on its face, by describing a simultaneous “welded” configuration. However, a conflict exists between the simultaneous “welded” configuration of the claim and Figs. 1-8 and [0003]-[0006], [0042], [0054], [0059], and [0062] of the specification. Thus, the scope of the claim is uncertain and therefore indefinite. For the sake of compact prosecution (MPEP 2173.06), claim 21 is interpreted in the instant Office action as follows: “the first substrate” in lines 2-3 is equivalent to “a second substrate”. This interpretation is to be confirmed by applicant in the next office action.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claims 1-6, 8, 11-14, 17, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson (US 20240213124 A1) in view of Ewer (US 6075286 A).
Regarding claim 1, McPherson discloses a power semiconductor module (Fig. 12, exploded view), comprising:
a first substrate (300);
a first power semiconductor die (any one of 200; [0087]: “power semiconductor devices”) attached to the first substrate (“attached” shown in the assembled view in Fig. 34); and
a first metallic clip (406 or a combination of 406 with 408) having a plurality of first contact regions (See annotated figure, showing a single contact per region of each die) ultrasonically welded ([0125]: “may include welded portions”) via respective ultrasonic welding spots to a first metallic region of the first power semiconductor die (Welding is to 422 which corresponds to die 200. See annotated figure. Note: the plate must necessarily be metallic in order to be welded to the metal clip, because welding is the joining of two metals by flowing them together. Clip material [0238]: “The clip may be a formed metal”),
wherein the first contact regions of the first metallic clip are laterally separated from one another by a first gap in the first metallic clip,
wherein a length of the first gap between two adjacent ones of the ultrasonic welding spots is greater than a length of the ultrasonic welding spots.
Illustrated below is a marked and annotated figure of Fig. 12 and Fig. 34 of McPherson.
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McPherson fails to teach the welding method for the first contact regions. Thus, McPherson fails to teach:
“[…] first contact regions ultrasonically welded via respective ultrasonic welding spots”.
However, McPherson teaches welding methods used for other regions of the first metallic clip include ultrasonically welded via respective ultrasonic welding spots ([0099]: “ultrasonic welding”) among a finite selection of known suitable methods. Modifying the welding method applied to the first contact regions by choosing ultrasonic welding would meet the claim. Doing so would have been obvious to one of ordinary skill in the art before the effective filing date and had predictable results because it uses a method chosen from a finite selection of methods pertinent to the claimed structure. Therefore, it would have been obvious to have the claimed first contact regions ultrasonically welded because it uses a method known suitable for the structure. MPEP 2143 (I)(E).
McPherson only teaches a single contact region per die, and fails to teach pluralized regions per die. Thus, McPherson fails to teach:
“[…] a plurality of first contact regions ultrasonically welded via respective ultrasonic welding spots to a first metallic region of the first power semiconductor die,
wherein the first contact regions of the first metallic clip are laterally separated from one another by a first gap in the first metallic clip,
wherein a length of the first gap between two adjacent ones of the ultrasonic welding spots is greater than a length of the ultrasonic welding spots”.
Ewer teaches clips having pluralized contact regions on a single die. In particular, Ewer teaches:
[…] a plurality of first contact regions (Fig. 3: 12b) ultrasonically welded via respective ultrasonic welding spots (Col. 2, ln. 66-Col. 3, ln. 3: “ultrasonic bonding”) to a first metallic region of the first power semiconductor die (30, as shown in Fig. 2 for the alternative clip embodiment),
wherein the first contact regions of the first metallic clip are laterally separated from one another by a first gap (gap 12c) in the first metallic clip,
wherein a length (as measured in the Y direction, See dashed reference lines for Gap endpoints) of the first gap (See annotated figure “First/Second Gap”, which is directed to the complete and entire separation between contact regions) between (between in the X direction) two adjacent ones of the ultrasonic welding spots (See annotated figure “First Contact Regions” 12b) is greater than (“greater than” because the gap fully encompasses the spots as well as the extensions of the clip extending beyond and away from the spots) a length (as measured in the Y direction, See dashed reference lines for spot endpoints) of the ultrasonic welding spots (See annotated figure “First Contact Regions” 12b, which is directed to the flat portions of the clip directly contacting the die. Note: the lengths are interpreted here consistent with Fig. 1 of Applicant’s disclosure.).
Modifying the first contact region of McPherson by including a plurality of contact regions for the first power semiconductor die would arrive at the claimed contact region configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each situation ultrasonic welding is used (Ewer: Col. 2, ln. 66-Col. 3, ln. 3: “ultrasonic bonding”; McPherson: [0099]: “ultrasonic welding”). Ewer provides a teaching to motivate one of ordinary skill in the art before the effective filing date to have a plurality of contact regions on a die in that it would improve resistance to thermal stress for the weld (Col. 3, lns. 19-24: “provides improved resiliency to thermal stresses”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed contact region configuration because it would improve resistance to thermal stress for the weld. MPEP 2143 (I)(G).
Illustrated below is a marked and annotated figure of Fig. 3 of Ewer.
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Regarding claim 2, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (Ewer: Fig. 3),
wherein the first contact regions of the first metallic clip are connected to a body region (See annotated figure, a portion of 12d) of the first metallic clip by a level transition region (See annotated figure, a portion of 12d) of the first metallic clip such that the first contact regions are disposed at a first level (a level in the Z direction) and the body region is disposed at a second level (a level in the Z direction) different than the first level (different in the Z direction),
and wherein the first level is closer to the first substrate than the second level (closer in the Z direction).
Regarding claim 3, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (McPherson: Fig. 12), further comprising:
a second power semiconductor die (another one of 200) attached to the first substrate (“attached” shown in the assembled view in Fig. 34),
wherein the first metallic clip has a plurality (Ewer: Fig. 3: regions 12b. Note: the same reasons cited/relied upon in the claim 1 rejection of “a plurality of first contact regions” is relied upon here for these substantially similar “plurality of second contact regions”.) of second contact regions (McPherson: Fig. 12: See annotated figure) ultrasonically welded ([0125]: “may include welded portions”. Note: “ultrasonically welded” is reasonably taught here for the same reasons applied to the first contact regions in the claim 1 rejection) to a first metallic region of the second power semiconductor die (See annotated figure),
wherein the second contact regions are laterally separated from one another by a second gap (Ewer: Fig. 3: gap 12c) in the first metallic clip.
Regarding claim 4, McPherson in view of Ewer discloses the power semiconductor module of claim 3 (McPherson: Fig. 12),
wherein the first contact regions of the first metallic clip are connected to a body region (See annotated figure) of the first metallic clip by a first level transition region (See annotated figure) of the first metallic clip and the second contact regions of the first metallic clip are connected to the body region by a second level transition region (See annotated figure) of the first metallic clip such that the first contact regions and the second contact regions are disposed at a first level (a level in the Y direction) and the body region is disposed at a second level (a level in the Y direction) different than the first level (different in the Y direction. Similarly shown in cross-sectional view of Fig. 35), and
wherein the first level is closer to the first substrate than the second level (closer in the Y direction. Similarly shown in cross-sectional view of Fig. 35).
Regarding claim 5, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (McPherson: Fig. 12), further comprising:
a second power semiconductor die (another one of 200) attached to the first substrate (“attached” shown in the assembled view in Fig. 34); and
a second metallic clip (408) having a plurality of first contact regions (See annotated figure) ultrasonically welded (Note: “ultrasonically welded” is reasonably taught here for the same reasons applied to the first contact regions in the claim 1 rejection) to a first metallic region of the first substrate (shown in the assembled view in Fig. 34),
wherein the first metallic clip has a plurality (Ewer: Fig. 3: regions 12b. Note: the same reasons cited/relied upon in the claim 1 rejection of “a plurality of first contact regions” is relied upon here for these substantially similar “plurality of first contact regions”.) of second contact regions (McPherson: Fig. 12: See annotated figure) ultrasonically welded ([0125]: “may include welded portions”. Note: “ultrasonically welded” is reasonably taught here for the same reasons applied to the first contact regions in the claim 1 rejection) to a first metallic region of the second power semiconductor die (See annotated figure),
wherein the second contact regions are laterally separated from one another by a second gap (Ewer: Fig. 3: gap 12c) in the first metallic clip.
Regarding claim 6, McPherson in view of Ewer discloses the power semiconductor module of claim 5 (McPherson: Fig. 12),
wherein the first contact regions of the first metallic clip are connected to a body region (See annotated figure) of the first metallic clip by a first level transition region (See annotated figure) of the first metallic clip and the second contact regions of the first metallic clip are connected to the body region by a second level transition region (See annotated figure) of the first metallic clip such that the first contact regions and the second contact regions are disposed at a first level (a level in the Y direction) and the body region is disposed at a second level (a level in the Y direction) different than the first level (different in the Y direction. Similarly shown in cross-sectional view of Fig. 35), and
wherein the first level is closer to the first substrate than the second level (closer in the Y direction. Similarly shown in cross-sectional view of Fig. 35).
Regarding claim 8, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (McPherson: Fig. 12), wherein the first metallic region of the first power semiconductor die is a metallic plate (422 is shown as a plate) attached to a bond pad of the first power semiconductor die ([0186]: “between…may be arranged…422”).
Regarding claim 11, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (Ewer, Fig. 3), wherein a linear dimension of the first gap (See annotated figure) in the first metallic clip measured in a lateral direction (as measured in the Y direction) between the first contact regions of the first metallic clip is greater than a linear dimension of the first contact regions of the first metallic clip (See annotated figure) measured in the same lateral direction (as measured in the Y direction).
Regarding claim 12, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (McPherson: Fig. 12), further comprising:
a second substrate (Fig. 13 shows a duplication of the module of Fig. 12. Citations here for the second substrate and associated structures are made in reference to a duplicated Fig. 12 module, and configured according to Fig. 13.);
a second power semiconductor die (any one of 200; [0087]: “power semiconductor devices”) attached to the second substrate (“attached” shown in the assembled view in Fig. 34); and
a second metallic clip (406 with 408. See annotated Fig. 13) having a plurality of first contact regions (See annotated Fig. 12) ultrasonically welded (Note: “ultrasonically welded” is reasonably taught here for the same reasons applied to the first contact regions in the claim 1 rejection) to a first metallic region of the first substrate (shown for 408 in the assembled view in Fig. 34) and
a plurality (Ewer: Fig. 3: regions 12b. Note: the same reasons cited/relied upon in the claim 1 rejection of “a plurality of first contact regions” is relied upon here for these substantially similar “plurality of first contact regions”.) of second contact regions (McPherson: Fig. 12: See annotated figure) ultrasonically welded ([0125]: “may include welded portions”. Note: “ultrasonically welded” is reasonably taught here for the same reasons applied to the first contact regions in the claim 1 rejection) to a first metallic region of the second power semiconductor die (See annotated figure),
wherein the first contact regions of the second metallic clip are laterally separated from one another by a first gap (See annotated Fig. 13) in the second metallic clip,
wherein the second contact regions of the second metallic clip are laterally separated from one another by a second gap (Ewer: Fig. 3: gap 12c) in the second metallic clip.
Illustrated below is a marked and annotated figure of Fig. 13 of McPherson.
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Regarding claim 21 as noted in the 112(b) rejection, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (McPherson: Fig. 12),
wherein the first metallic clip (choosing the interpretation of 406 with 408 as “the first metallic clip”, which corresponds to the combination of 106 with 104 in Fig. 13. Note: Fig. 13 shows a duplication of the module of Fig. 12. Citations here for the second substrate and associated structures are made in reference to a duplicated Fig. 12 module, and configured according to Fig. 13.) has a plurality of second contact regions (Two are shown. See annotated Fig. 13: “1st Contact Regions of 2nd Metallic Clip”) ultrasonically welded (Note: “ultrasonically welded” is reasonably taught here for the same reasons applied to the first contact regions in the claim 1 rejection) to a first metallic region of a second substrate (shown for 408 in the assembled view in Fig. 34),
wherein the second contact regions are laterally separated from one another by a second gap (See annotated Fig. 13: “Gap”) in the first metallic clip, and
wherein a linear dimension of the second gap in the first metallic clip measured in a lateral direction (X direction) between the second contact regions (between in the Z direction) is greater than (“greater than” because the gap extends in the X direction beyond the substrate, and is therefore larger than the portion directly contacting the second substrate) a linear dimension of the second contact regions (the portion of Fig. 12: 408/Fig. 13: 104 directly contacting the second substrate) measured in the same lateral direction.
Regarding independent claim 13, McPherson discloses a power semiconductor module (Fig. 12, exploded view), comprising:
a first substrate (300);
a second substrate (Fig. 13 shows a duplication of the module of Fig. 12. Citations for the second substrate and associated structures are made in reference to a duplicated Fig.12 module, and configured according to Fig. 13.);
a plurality of first power semiconductor dies (any ones of 200; [0087]: “power semiconductor devices”) attached to a first metallic region of the first substrate (“attached” shown in the assembled view in Fig. 13);
a plurality of second power semiconductor dies (any other ones of 200; [0087]: “power semiconductor devices”) attached to a first metallic region of the second substrate (“attached” shown in the assembled view in Fig. 13);
a first metallic clip (406. See annotated Fig. 13) having a plurality of first contact regions (See annotated figure, showing a single contact per region of each die) ultrasonically welded ([0125]: “may include welded portions”) via respective ultrasonic welding spots to a first metallic region of each of the first power semiconductor dies (Welding is to 422 which corresponds to die 200. See annotated figure. Note: the plate must necessarily be metallic in order to be welded to the metal clip, because welding is the joining of two metals by flowing them together. Clip material [0238]: “The clip may be a formed metal”); and
a second metallic clip (406 with 408. See annotated Fig. 13) having a plurality of first contact regions (See annotated Fig. 12) ultrasonically welded to the first metallic region of the first substrate (shown for 408 in the assembled view in Fig. 34; [0126]: “a direct welded connection”) and
a plurality of second contact regions (See annotated Fig. 12) ultrasonically welded ([0125]: “may include welded portions”) to a first metallic region of each of the second power semiconductor dies (Welding is to 422 which corresponds to die 200. See annotated figure. Note: the plate must necessarily be metallic in order to be welded to the metal clip, because welding is the joining of two metals by flowing them together. Clip material [0238]: “The clip may be a formed metal”),
wherein each group of the first contact regions of the first metallic clip ultrasonically welded to the first metallic region of the same first power semiconductor die are laterally separated from one another by a first gap in the first metallic clip,
wherein a length of the first gap in the first metallic clip between two adjacent ones of the ultrasonic welding spots is greater than a length of the ultrasonic welding spots,
wherein the first contact regions of the second metallic clip are laterally separated from one another (separated in the Z direction) by a first gap in the second metallic clip (See annotated Fig. 12. Annotated as “Gap” for 408),
wherein each group of the second contact regions of the second metallic clip ultrasonically welded to the first metallic region of the same second power semiconductor die are laterally separated from one another by a second gap in the second metallic clip.
McPherson fails to teach the welding method for the first and second contact regions. Thus, McPherson fails to teach:
“a first metallic clip having a plurality of first contact regions ultrasonically welded via respective ultrasonic welding spots […];
“a second metallic clip having a plurality of first contact regions ultrasonically welded […] and a plurality of second contact regions ultrasonically welded […],”.
However, McPherson teaches welding methods used for other regions of the first metallic clip include ultrasonically welded via respective ultrasonic welding spots ([0099]: “ultrasonic welding”) among a finite selection of known suitable methods. Modifying the welding method applied to the first and second contact regions by choosing ultrasonic welding would meet the claim. Doing so would have been obvious to one of ordinary skill in the art before the effective filing date and had predictable results because it uses a method chosen from a finite selection of methods pertinent to the claimed structure. Therefore, it would have been obvious to have the claimed first and second contact regions ultrasonically welded because it uses a method known suitable for the structure. MPEP 2143 (I)(E).
McPherson only teaches a single contact region per die, and fails to teach pluralized regions per die. Thus, McPherson fails to teach:
“a first metallic clip having a plurality of first contact regions ultrasonically welded via respective ultrasonic welding spots to a first metallic region of each of the first power semiconductor dies;
a second metallic clip having a plurality of first contact regions ultrasonically welded to the first metallic region of the first substrate and a plurality of second contact regions ultrasonically welded to a first metallic region of each of the second power semiconductor dies,
wherein each group of the first contact regions of the first metallic clip ultrasonically welded to the first metallic region of the same first power semiconductor die are laterally separated from one another by a first gap in the first metallic clip,
wherein a length of the first gap in the first metallic clip between two adjacent ones of the ultrasonic welding spots is greater than a length of the ultrasonic welding spots,
[…]
wherein each group of the second contact regions of the second metallic clip ultrasonically welded to the first metallic region of the same second power semiconductor die are laterally separated from one another by a second gap in the second metallic clip.”
Ewer teaches clips having pluralized contact regions on a single die/welded surface. In particular, Ewer teaches:
a first metallic clip (Fig. 3: 10) having a plurality of first contact regions (12b) ultrasonically welded via respective ultrasonic welding spots (Col. 2, ln. 66-Col. 3, ln. 3: “ultrasonic bonding”) to a first metallic region of each of the first power semiconductor dies (30, as shown in Fig. 2 for the alternative clip embodiment);
[…]
wherein each group of the first contact regions of the first metallic clip ultrasonically welded to the first metallic region of the same first power semiconductor die are laterally separated from one another by a first gap (12c) in the first metallic clip,
wherein a length (as measured in the Y direction, See dashed reference lines for Gap endpoints) of the first gap (See annotated figure “First/Second Gap”, which is directed to the complete and entire separation between contact regions) in the first metallic clip between (between in the X direction) two adjacent ones of the ultrasonic welding spots (See annotated figure “First Contact Regions” 12b) is greater than (“greater than” because the gap fully encompasses the spots as well as the extensions of the clip extending beyond and away from the spots) a length (as measured in the Y direction, See dashed reference lines for spot endpoints) of the ultrasonic welding spots (See annotated figure “First Contact Regions” 12b, which is directed to the flat portions of the clip directly contacting the die. Note: the lengths are interpreted here consistent with Fig. 1 of Applicant’s disclosure.),
Modifying the first and second contact regions of McPherson’s first and second metallic clips by including multiple contact regions on each of the first and second power semiconductor dies and the first substrate would arrive at the claimed contact region configurations. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each situation ultrasonic welding is used (Ewer: Col. 2, ln. 66-Col. 3, ln. 3: “ultrasonic bonding”; McPherson: [0099]: “ultrasonic welding”). Ewer provides a teaching to motivate one of ordinary skill in the art before the effective filing date to have a plurality of first/second contact regions on a same die/substrate in that it would improve resistance to thermal stress for the weld (Col. 3, lns. 19-24: “provides improved resiliency to thermal stresses”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed contact region configurations because they would improve resistance to thermal stress for the weld. MPEP 2143 (I)(G).
Regarding claim 14, McPherson in view of Ewer discloses the power semiconductor module of claim 13 (McPherson: Fig. 12),
wherein: each group of the first contact regions of the first metallic clip ultrasonically welded to the first metallic region of the same first power semiconductor die are connected to a body region (See annotated figure) of the first metallic clip by a level transition region (See annotated figure) of the first metallic clip such that the first contact regions of the first metallic clip are disposed at a first level (a level in the Y direction) and the body region of the first metallic clip is disposed at a second level (a level in the Y direction) different than the first level (different in the Y direction. Similarly shown in cross-sectional view of Fig. 35);
each group of the second contact regions of the second metallic clip ultrasonically welded to the first metallic region of the same second power semiconductor die are connected to a body region (See annotated figure) of the second metallic clip by a level transition region (See annotated figure) of the second metallic clip such that the second contact regions of the second metallic clip are disposed at the first level (a level in the Y direction) and the body region of the second metallic clip is disposed at the second level (a level in the Y direction); and
the first level is closer to the first and second substrates than the second level (closer in the Y direction. Similarly shown in cross-sectional view of Fig. 35).
Regarding claim 17, McPherson in view of Ewer discloses the power semiconductor module of claim 13 (Ewer: Fig. 3),
wherein a linear dimension of each first gap (See annotated figure) in the first metallic clip measured in a lateral direction (as measured in the Y direction) between the corresponding group of first contact regions of the first metallic clip (the gap is between adjacent contact regions in the X direction) is greater than a linear dimension of the group of first contact regions (See annotated figure) of the first metallic clip measured in the same lateral direction (as measured in the Y direction), and
wherein a linear dimension of each second gap (See annotated figure) in the second metallic clip measured in a lateral direction (as measured in the Y direction) between the corresponding group of second contact regions of the second metallic clip (the gap is between adjacent contact regions in the X direction) is greater than a linear dimension of the group of second contact regions (See annotated figure) of the second metallic clip measured in the same lateral direction (as measured in the Y direction).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over McPherson in view of Ewer as applied to claim 1 above, and further in view of Minotti (US 20220320032 A1).
Regarding claim 7, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (Fig. 12),
wherein the first metallic region of the first power semiconductor die is a bond pad (200 is weld bonded to 406 thus the place of bonding is a “bond pad”), and wherein the bond pad has a thickness greater than 5 µm.
McPherson in view of Ewer fails to teach dimensions for the bond pad. Thus, McPherson fails to teach “and wherein the bond pad has a thickness greater than 5 µm”.
Minotti discloses a first metallic region (Fig. 11: 85) of a first power semiconductor die (72) that is a bond pad ([0061]: “contact pad”; See Fig. 10 for bonding with clip 50), and wherein the bond pad has a thickness greater than 5 µm ([0061]: “for example with a thickness of 4-9 μm”, overlapping the claimed range).
Modifying the bond pad of McPherson in view of Ewer by including the thickness of Minotti would arrive at the claimed bond pad configuration. Doing so would have been prima facie obvious to one of ordinary skill in the art before the effective filing date and had a reasonable expectation of success because both McPherson and Minotti teach bond pads for a first power semiconductor die (McPherson: 200: [0087]: “power semiconductor devices”; Minotti: 72: [0041]: “dice may integrate power devices”). Therefore, it would have been obvious to have the claimed bond pad configuration because it is a known thickness in the prior art. MPEP 2144.04 (IV)(A) Gardner.
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson in view of Ewer as applied to claim 1 above, and further in view of Nanba (US 20060118932 A1, from IDS).
Regarding claim 9, McPherson in view of Ewer discloses the power semiconductor module of claim 1 (McPherson: Fig. 12), but fails to teach “wherein a surface of each of the first contact regions of the first metallic clip that faces away from the first substrate has a sonotrode imprint, and wherein each of the first contact regions of the first metallic clip has an area that is less than 4 times an area of the sonotrode imprint”.
Nanba discloses a power semiconductor module (Fig. 3; [0091]: “The specific example of the semiconductor device is such as a power MOSFET”),
wherein a surface of each of the first contact regions (See annotated figure) of the first metallic clip (6; [0056]: “aluminum can be used as materials of the bonding strap”) that faces away from the first substrate (8) has a sonotrode imprint ([0060]: “the top protruding portions 4 of the bonding-tool 1” imprints into clip 6 during “the bonding tool 1 for propagating ultrasonic vibration comes in contact with the bonding-strap 6”. See annotated figure for regions defining the imprint), and
wherein each of the first contact regions of the first metallic clip has an area that is less than 4 times an area of the sonotrode imprint (The first contact regions are smaller than/similar to the sonotrode imprint, based on the dashed reference lines. Thus, these regions have an area “less than 4 times” the imprint area).
Modifying the first contact regions of McPherson by including the sonotrode imprint of Nanba would arrive at the claimed regions and imprint. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success because in each situation ultrasonic welding is used (Nanba: [0060]: “ultrasonic vibration”; McPherson: [0099]: “ultrasonic welding”). Nanba provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the imprint in that it would 1) reduce manufacturing cost by extending the service life of the sonotrode ([0062]: “improve the life of the ultrasonic bonding-tool”) and 2) would improve bonding strength in the module ([0063]: “a mechanical strength of the semiconductor device…is higher”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed imprint because it would reduce manufacturing cost and improve bonding strength. MPEP 2143 (I)(G).
Illustrated below is a marked and annotated figure of Fig. 3 of Nanba.
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Regarding claim 10, McPherson in view of Ewer discloses the semiconductor module of claim 1 (McPherson: Fig. 12),
wherein a surface of each of the first contact regions of the first metallic clip that faces away from the first substrate has a sonotrode imprint,
wherein the first gap in the first metallic clip extends (extends in the X direction) along a side of the sonotrode imprint (by being aside in the Z direction), and
wherein the first gap in the first metallic clip is longer than the side of the sonotrode imprint (The gap 12c of Ewer: Fig. 3 is “longer” because the gap extends beyond the contact regions, up a level transition region, and into a body region. See annotated figure).
McPherson in view of Ewer fails to disclose the first contact regions including a sonotrode imprint. Thus, McPherson in view of Ewer fails to teach “wherein a surface of each of the first contact regions of the first metallic clip that faces away from the first substrate has a sonotrode imprint, wherein the first gap in the first metallic clip extends along a side of the sonotrode imprint, and wherein the first gap in the first metallic clip is longer than the side of the sonotrode imprint”.
Nanba discloses a power semiconductor module (Fig. 3; [0091]: “The specific example of the semiconductor device is such as a power MOSFET”), wherein a surface of each of the first contact regions (See annotated figure) of the first metallic clip (6; [0056]: “aluminum can be used as materials of the bonding strap”) that faces away from the first substrate (8) has a sonotrode imprint ([0060]: “the top protruding portions 4 of the bonding-tool 1” imprints into clip 6 during “the bonding tool 1 for propagating ultrasonic vibration comes in contact with the bonding-strap 6”. See annotated figure for regions defining the imprint).
Modifying the first contact regions of McPherson by including the sonotrode imprint of Nanba would arrive at the claimed regions, imprint, and gap configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success because in each situation ultrasonic welding is used (Nanba: [0060]: “ultrasonic vibration…bonding”; McPherson: [0099]: “ultrasonic welding”). Nanba provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the imprint in that it would 1) reduce manufacturing cost by extending the service life of the sonotrode ([0062]: “improve the life of the ultrasonic bonding-tool”) and 2) would improve bonding strength in module ([0063]: “a mechanical strength of the semiconductor device…is higher”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed imprint because it would reduce manufacturing cost and improve bonding strength. MPEP 2143 (I)(G).
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson and Ewer as applied to claim 13 above, and further in view of Nanba.
Regarding claim 15, McPherson in view of Ewer discloses the power semiconductor module of claim 13 (McPherson: Fig. 12), but fails to teach “wherein a surface of each of the first contact regions of the first metallic clip that faces away from the first substrate has a sonotrode imprint and an area that is less than 4 times an area of the sonotrode imprint, wherein a surface of each of the second contact regions of the second metallic clip that faces away from the second substrate has a sonotrode imprint and an area that is less than 4 times an area of the sonotrode imprint”.
Nanba discloses a power semiconductor module (Fig. 3; [0091]: “The specific example of the semiconductor device is such as a power MOSFET”),
wherein a surface of each of the first contact regions (See annotated figure) of the first metallic clip (6; [0056]: “aluminum can be used as materials of the bonding strap”) that faces away from the first substrate (8) has a sonotrode imprint ([0060]: “the top protruding portions 4 of the bonding-tool 1” imprints into clip 6 during “the bonding tool 1 for propagating ultrasonic vibration comes in contact with the bonding-strap 6”. See annotated figure for regions defining the imprint) and an area that is less than 4 times an area of the sonotrode imprint (The first contact regions are smaller than/similar to the sonotrode imprint, based on the dashed reference lines. Thus, these regions have an area “less than 4 times” the imprint area).
Modifying the first and second contact regions of McPherson by including the sonotrode imprint of Nanba would arrive at the claimed regions and imprints. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success because in each situation ultrasonic welding is used (Nanba: [0060]: “ultrasonic vibration”; McPherson: [0099]: “ultrasonic welding”). Nanba provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the imprints in that it would 1) reduce manufacturing cost by extending the service life of the sonotrode ([0062]: “improve the life of the ultrasonic bonding-tool”) and 2) would improve bonding strength in module ([0063]: “a mechanical strength of the semiconductor device…is higher”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed imprints because they would reduce manufacturing cost and improve bonding strength. MPEP 2143 (I)(G).
Regarding claim 16, McPherson in view of Ewer discloses the power semiconductor module of claim 13 (Ewer: Fig. 3),
wherein a surface of each of the first contact regions of the first metallic clip that faces away from the first substrate has a sonotrode imprint,
wherein the first gap in the first metallic clip extends along a side of the sonotrode imprint, and wherein the first gap in the first metallic clip is longer than the side of the sonotrode imprint (The gap 12c is “longer” because the gap extends beyond the contact region, up a level transition region, and into a body region. See annotated figure).
McPherson in view of Ewer fails to disclose the first contact regions including a sonotrode imprint. Thus, McPherson fails to teach “wherein a surface of each of the first contact regions of the first metallic clip that faces away from the first substrate has a sonotrode imprint, wherein the first gap in the first metallic clip extends along a side of the sonotrode imprint, and wherein the first gap in the first metallic clip is longer than the side of the sonotrode imprint”.
Nanba discloses a power semiconductor module (Fig. 3; [0091]: “The specific example of the semiconductor device is such as a power MOSFET”),
wherein a surface of each of the first contact regions (See annotated figure) of the first metallic clip (6; [0056]: “aluminum can be used as materials of the bonding strap”) that faces away from the first substrate (8) has a sonotrode imprint ([0060]: “the top protruding portions 4 of the bonding-tool 1” imprints into clip 6 during “the bonding tool 1 for propagating ultrasonic vibration comes in contact with the bonding-strap 6”. See annotated figure for regions defining the imprint).
Modifying the first contact regions of McPherson in view of Ewer by including the sonotrode imprint of Nanba would arrive at the claimed regions, imprint, and gap configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success because in each situation ultrasonic welding is used (Nanba: [0060]: “ultrasonic vibration”; McPherson: [0099]: “ultrasonic welding”). Nanba provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the imprint in that it would 1) reduce manufacturing cost by extending the service life of the sonotrode ([0062]: “improve the life of the ultrasonic bonding-tool”) and 2) would improve bonding strength in module ([0063]: “a mechanical strength of the semiconductor device…is higher”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed imprint because it would reduce manufacturing cost and improve bonding strength. MPEP 2143 (I)(G).
Response to Arguments
Applicant's arguments filed 5/22/2026 have been fully considered but they are not persuasive.
Applicant argues:
Applicant argues with respect to amended claim 1 that “The McPherson reference is silent regarding any dimensions of the alleged gap. Indeed, the alleged gap shown in annotated Figure 12 of the McPherson reference reproduced on page 4 of the Final Office Action appears to have the same length as the two adjacent alleged first contact regions since the alleged gap defines the alleged first contact regions. Cited Figure 3 of the Ewer reference shows the same gap/contact region length relationship as Figure 12 of the McPherson reference. Also, both references are silent regarding the length of a gap in a metallic clip relative to the length of two ultrasonic welding spots that adjoin such a gap.”. Remarks at pg. 10.
Examiner’s reply:
Applicant's arguments filed 5/22/2026 have been fully considered but they are not persuasive. The examiner has interpreted the length of the spots in the prior art (Ewer) as the length of the actual weld spot, which is a small portion inclusive within the contact region, consistent with Applicant’s disclosure (Fig. 1: length Lf); and the length of the gap (Ewer) as the entire separation between the contact regions, consistent with Applicant’s disclosure (Fig. 1: length Lg). Accordingly, the examiner maintains the rejection in substantially the same way as before, but has updated the rejection as necessitated by claim amendment, and to promote clarity of the record.
Conclusion
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/WILLIAM H ANDERSON/ Examiner, Art Unit 2817
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