DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are examined on merits herein.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the feature(s) canceled from the claim(s).
“an active region on a substrate”, as Claims 1 and 9 recites: drawings of the current application clearly show active regions formed “in a substrate”, not “on a substrate”.
“the first region comprises a first side surface that extends in the second direction, wherein the second region comprises a second side surface that extends in the second direction, wherein the third region comprises a third side surface that connects the first side surface to the second side surface”, as Claim 12 recites: The current application does not teach any side connection between two different channel regions using a side of the third channel region.
“a first-region source/drain pattern and a second-region source/drain pattern on the first and second regions, respectively”, as Claim 15 recites, where first and second regions are channel regions, in accordance with Claim 9, on which Claim 15 depends.
No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required:
Claim 12 recites: “the first region comprises a first side surface that extends in the second direction, wherein the second region comprises a second side surface that extends in the second direction, wherein the third region comprises a third side surface that connects the first side surface to the second side surface”. However, the specification fails to teach a third side surface of the third region that connects the first side surface of the first region and the second side surface of the second region. As a reminder, the specification of the current application teaches first through fourth side surfaces (SW1-SW4) only with respect to the third region.
Claim 15 recites: “the source/drain pattern comprises a first-region source/drain pattern and a second-region source/drain pattern on the first and second regions, respectively”. Claim 15 depends on Claim 9 that teaches first and second regions as being channel regions, while the specification of the current application does not teach that any source/drain regions are disposed on any channel region. As it is common for any lateral transistor, source/drain regions of the current application are adjacent to corresponding channel regions, not disposed on the channel regions.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-15 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
In re Claim 1: Claim 1 recites (lines 13-16): “the first subset and the second subset of the channel patterns are adjacent to each other in a second direction that intersects the first direction, wherein the channel patterns further comprise a buffer channel pattern between the first subset and the second subset of the channel patterns”. The recitation is unclear since leads to a question: How first and second subsets of the channel patterns can be adjacent to each other in the second direction when there is a buffer channel pattern between them?
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation was interpreted as: “the first subset and the second subset of the channel patterns are separated from each other in a second direction that intersects the first direction by a buffer channel pattern”.
In re Clams 2-8: Claims 2-8 are rejected under 35 U.S.C. 112(b) due to dependency on Claim 1.
In re Claim 9: Claim 9 recites (lines 14-16): “the third region having a varying channel width, wherein the third region has a third width in the first direction”. The recitation is unclear, since leads to a question: Is a third width different from the channel width? The specification teaches that the third width is a same as “a varying channel width”. With this teaching, there is a lack of antecedent basis in using “third width” with article “a”.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation of Claim 9 was interpreted as: “the third region having a varying third width in the first direction”.
In re Claim 9: Claim 9 has a limitation (line 18): “the second horizontal width is smaller than the first horizontal width”. The limitation has a lack of antecedent basis for citing: “first horizontal width” with article “the”. In addition, Claim 9 does not teach earlier what “a first horizontal width” is.
Appropriate correction is required to clarify the claim language.
For this Office Action, the limitation of line 18 was omitted from consideration.
In re Claim 12: Claim 12 has a recitation: “the first region comprises a first side surface that extends in the second direction, wherein the second region comprises a second side surface that extends in the second direction, wherein the third region comprises a third side surface that connects the first side surface to the second side surface”. The recitation is unclear, since it is not supported by the specification of the application that teaches first through third (and fourth) side surfaces only with respect to the third (buffer) region.
In accordance with MPEP 2173.03 Correspondence Between Specification and Claims [R-07.2022], inconsistence of the claim with the specification makes the claim indefinite, even though the terms of a claim may appear to be definite: see In re Cohn 438 F.2d 989, 169 USPQ 95 (CCPA 1971).
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation of Claim 12 was interpreted in accordance with the specification of the application (e.g., where it describes Figs. 6B and 7B) as: “the third region comprises first, second, and third side surfaces that extend in the second direction, wherein the third side surface connects the first side surface to the second side surface”.
In re Claim 15: Claim 15 recites: “the source/drain pattern comprises a first-region source/drain pattern and a second-region source/drain pattern on the first and second regions, respectively”. The recitation is unclear, since Claim 15 depends on Claim 9, which defines first and second regions as channel regions, while the specification of the current application does not teach that source/drain regions are disposed on the channel regions.
In accordance with MPEP 2173.03 Correspondence Between Specification and Claims [R-07.2022], inconsistence of the claim with the specification makes the claim indefinite, even though the terms of a claim may appear to be definite: see In re Cohn 438 F.2d 989, 169 USPQ 95 (CCPA 1971).
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation of Claim 15 was interpreted in accordance with the specification of the application as: “the source/drain pattern comprises a first-region source/drain pattern and a second-region source/drain pattern adjacent to the first and second regions, respectively”.
In re Claims 10-11 and 13-14: Claims 10-11 and 13-114 are rejected under 35 U.S.C. 112(b) due to dependency on Claim 9.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
As far as the claims are understood, Claims 1-4 and 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Liaw (US 2020/0105752) in view of Wang et al. (US 2023/0253477).
In re Claim 1, Liaw teaches a semiconductor device, comprising (Figs. 4-6 and Annotated Fig. 5):
Annotated Fig. 5
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an active region as a substrate 12 (paragraph 0033);
source/drain patterns S/D (paragraph 0037) on the active region;
channel patterns 142, 122, 502 (numbers are shown in Figs. 4-5, paragraphs 0032, 0034, 0042) on the active region and electrically connected to respective pairs of the source/drain patterns S/D (as shown), each of the channel patterns comprising a plurality of semiconductor patterns that are vertically stacked and spaced apart from each other (as in Figs. 4 and 6);
gate electrodes 146, 126 130 (paragraphs 0031-0032), that are on the channel patterns, respectively, and extend in a first direction Y parallel to each other; and
active contacts (see Fig. 2 for designation contacts; paragraph 0030) electrically connected to the source/drain patterns S/D, respectively, wherein
the channel patterns comprise a first subset 142 (or 122) of the channel patterns, each of which has a first width (between dotted lines in Annotated Fig. 5, the first width could be either Width 142 or Width 122, paragraph 0042) in the first direction Y, and a second subset of the channel patterns 122 (or 142), each of which has a second width in the first direction - Width 122 (or Width 142, paragraph 0042), wherein
the first subset and the second subset of the channel patterns are adjacent to each other in a second direction that intersects the first direction (as interpreted), wherein
the channel patterns further comprise a buffer channel pattern 502 (paragraph 0042) between the first subset and the second subset of the channel patterns, wherein
the buffer channel pattern 502 comprises a connection side surface – as a middle part of inclined dotted line of 502 that extends in the first direction Y (since it begins from a lower point in the first direction and ends in an upper point in the first direction, and wherein
the connection side surface is configured such that a width of the buffer channel pattern changes from the first width to the second width when moving from the first subset to the second subset of the channel patterns (as shown, where the width is between dotted lines of 502 in direction Y).
Liaw does not teach that the active region is disposed on a substrate.
Wang teaches (Fig. 1B-I, paragraph 0031) an active region 103 disposed on a substrate 201.
Liaw and Wang teach analogous arts directed to semiconductor devices comprised a plurality of all-gate-around transistors and buffer regions, and one of ordinary skill in the art before filing the application would have had a reasonable expectation of success in modifying the Liaw device in view of the Wang device, since they are from the same field of endeavor, and Wang created a successfully operated device.
It would have been obvious for one of ordinary skill in the art before filing the application to modify the Liaw device by substituting its substrate being also an active region with a stack of the Wang comprised an active region disposed on a substrate, when such bottom layer of the device is preferable for the manufacturer: See MPEP 2144.05 and MPEP 2143 on a Conclusion of Obviousness: KSR Rational (B): Simple Substitution of One Known Element for Another to Obtain Predictable Results.
In re Claim 2, Liaw/Wang teaches the semiconductor device of Claim 1 as cited above, wherein (Annotated Fig. 5) the first width (being Width 146) is larger than the second width (being Width 122).
In re Claim 3, Liaw/Wang teaches the semiconductor device of Claim 1 as cited above, wherein (Annotated Fig. 5) the first width (being Width 122) is smaller than the second width (being Width 146).
In re Claim 4, Liaw/Wang teaches the semiconductor device of Claim 1 as cited above, wherein the buffer channel pattern comprises (Annotated Fig. 5 and Annotated Portion of Fig. 5)
Annotated Portion of Fig. 5
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a first side surface FSS (as in Annotated Portion of Fig. 5) that is adjacent to the first subset of the channel patterns 146 and extends in the second direction, and
a second side surface SSS (as in Annotated Portion of Fig. 5) that is adjacent to the second subset of the channel patterns 122 and extends in the second direction, and wherein
the connection side surface CSS connects the first side surface FSS to the second side surface SSS.
In re Claim 9, Liaw teaches a semiconductor device, comprising (Figs. 4-6 and Annotated Fig. 5):
an active region being a substrate 12 (paragraph 0033);
a source/drain S/D pattern on the active region (paragraph 0037);
a channel pattern – including 122 and 142 (paragraphs 0034, 0032) on the active region 12 and electrically connected to the source/drain pattern (as shown and as appropriate for channels), the channel pattern comprising a plurality of semiconductor patterns that are vertically stacked and spaced apart from each other (as in Figs. 4 and 6);
a gate electrode 146 (paragraph 0032) that is on the channel pattern and extends in a first direction Y (as shown in Fig. 5 and Annotated Fig. 5), the gate electrode 146 having a first horizontal width in a second direction X that intersects the first direction Y; and
an active contact (shown in Figs. 2 and 5 as Contact, paragraph 0030) electrically connected to the source/drain pattern S/D, wherein
the channel pattern comprises:
a first region 142 (or 122) that has a first width (shown as Width 142 or Width 122 in Annotated Fig. 5) in the first direction Y;
a second region 122 (or 142) that has a second width in the first direction (shown as Width 142 or Width 122); and
a third region between the first region and the second region, the third region having a varying channel width 502 (paragraph 0042), wherein
the third region has a third width in the first direction (as interpreted), wherein
the third region has a second horizontal width in the second direction – as shown in Fig. 5, and wherein
the second horizontal width is smaller than the first horizontal width (as interpreted).
Liaw does not teach that the active region is disposed on a substrate.
Wang teaches (Fig. 1B-I, paragraph 0031) an active region 103 disposed on a substrate 201.
It would have been obvious for one of ordinary skill in the art before filing the application to modify the Liaw device by substituting its substrate being also an active region with a stack of the Wang comprised an active region disposed on a substrate, when such bottom layer of the device is preferable for the manufacturer: See MPEP 2144.05 and MPEP 2143 on a Conclusion of Obviousness: KSR Rational (B): Simple Substitution of One Known Element for Another to Obtain Predictable Results.
In re Claim 10, Liaw/Wang teaches the semiconductor device of Claim 9 as cited above.
Liaw further teaches (Annotated Fig. 5) that:
the first width, Width 142, is larger than the second width, Width 122, and wherein
the third width of the third region gradually decreases as a distance from the first region increases in a direction toward the second region (as shown).
In re Claim 11, Liaw/Wang teaches the semiconductor device of Claim 9 as cited above.
Liaw further teaches (Annotated Fig. 5) that:
the first width, Width 122, is smaller than the second width, Width 142, and wherein
the third width of the third region gradually increases as a distance from the first region increases in a direction toward the second region (as shown in Annotated Fig. 2).
Claims 16 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Liaw in view of Park et al. (US 2022/0173053.
In re Claim 16, Liaw teaches a semiconductor device, comprising (Figs. 4-6 and Annotated Fig. 5):
a substrate 12 that includes an active region (paragraph 0033);
a device isolation layer STI (as shown in Fig. 4, paragraph 0035) that defines the active region;
source/drain patterns S/D (paragraph 0037) on the active region;
channel patterns – including 142 and 122 (paragraphs 0032, 0034) on the active region and electrically connected to respective pairs of the source/drain patterns (as shown and inherently), each of the channel patterns comprising a plurality of semiconductor patterns that are vertically stacked and spaced apart from each other (as shown);
gate electrodes 146 (paragraph 0032) that are on the channel patterns, respectively, and extend in a first direction Y (as shown in Fig. 5) parallel to each other;
gate insulating layers 124 (paragraph 0034), each of the gate insulating layers 124 between a respective one of the gate electrodes and a respective one of the channel patterns;
gate spacers 150, 152 (paragraph 0037), each of the gate spacers on a side surface of a respective one of the gate electrodes 146;
gate capping patterns 134 (paragraph 0034), each of the gate capping patterns 134 on a top surface of a respective one of the gate electrodes 150;
an interlayer insulating layer ILD (paragraph 0049) on the gate capping pattern 134;
active contacts CO in Fig. 4 (paragraph 0037) that are electrically connected to the source/drain patterns S/D, respectively;
metal-semiconductor compound layers – as silicide (inherently comprised a metal and silicon), each of the metal-semiconductor compound layers between a respective one of the active contacts CO and a respective one of the source/drain patterns S/D (as in Fig. 4);
gate contacts VG (paragraph 0030) that are electrically connected to the gate electrodes 146, respectively;
the channel patterns comprise
a first subset 142 of the channel patterns (paragraph 0032), each of which has a first width – such as 1SS in Annotated Fig. 5 - in the first direction Y, and
a second subset 122 of the channel patterns (paragraph 0034), each of which has a second width – such as 2SS in Annotated Fig. 5 - in the first direction, wherein the channel patterns further comprise
a buffer channel pattern 502 (paragraph 0042) between the first subset 142 and the second subset 122 of the channel patterns, and wherein
the buffer channel pattern 502 is configured such that a width of the buffer channel pattern changes from the first width to the second width when moving from the first subset to the second subset of the channel patterns (as shown in Annotated Fig. 5).
Since Liaw does not teach any layer over the interlayer dielectric, Liaw does not teach the following:
active contacts extend into the interlayer insulating layer,
gate contacts extending into the interlayer insulating layer and the gate capping pattern;
a first metal layer on the interlayer insulating layer, the first metal layer comprising first interconnection lines that are electrically connected to at least one of the active contacts and the gate contacts; and
a second metal layer on the first metal layer, the second metal layer comprising second interconnection lines that are electrically connected to the first metal layer.
Park teaches (Figs. 2A-2H) a semiconductor device comprised:
active contacts AC (Fig. 2A, paragraph 0068) extend into the interlayer insulating layer 120 (paragraph 0066),
gate contacts GC (Fig. 2C, paragraph 0071) extending into the interlayer insulating layer 120 and the gate capping pattern CP (paragraph 0069);
a first metal layer M1 (paragraph 0072) on the interlayer insulating layer 120, the first metal layer M1 comprising first interconnection lines IL1 (paragraph 0072) that are electrically connected to at least one of the active contacts and the gate contacts (Figs. 2A-2C); and
a second metal layer M2 (paragraph 0075) on the first metal layer M1, the second metal layer M2 comprising second interconnection lines IL2 that are electrically connected to the first metal layer M1.
Liaw and Park teach analogous arts directed to semiconductor devices comprised transistors with all-around gates and also comprised a buffer region, and one of ordinary skill in the art before filing the application would have had a reasonable expectation of success in modifying the Liaw device in view of the Park device since they are from the same field of endeavor, and Park created a successfully operated device.
It would have been obvious for one of ordinary skill in the art before filing the application to modify the Liaw device by adding all elements the device lacks, while the Park device has, wherein it is required to provide external electrical connections to the Liaw semiconductor device.
In re Claim 18, Liaw/Park teaches the semiconductor device of Claim 16 as cited above.
Liaw further teaches (Annotated Fig. 5) that the first width 1SS is different from the second width 2SS.
In re Claim 19, Liaw/Park teaches the semiconductor device of Claim 16 as cited above.
Liaw further teaches (Annotated Fig. 5) that the buffer channel pattern comprises a connection side surface – as a part of a surface which extends at an angle to a vertical lint and to a horizontal line) that extends in the first direction Y (since this side surface is not parallel to the horizontal direction).
In re Claim 20, Liaw/Park teaches the semiconductor device of Claim 19 as cited above.
Liaw further teaches that the buffer channel pattern comprises (Fig. 5 and Annotated Portion of Fig. 5)
a first side surface FSS that is adjacent to the first subset of the channel patterns and extends in a second direction X intersecting the first direction Y, and
a second side surface SSS that is adjacent to the second subset of the channel patterns and extends in the second direction X, and wherein
the connection side surface CSS connects the first side surface FSS to the second side surface SSS.
Allowable Subject Matter
Claim 17 is objected to as being dependent on a rejected base Claim 16, since Claim 17 contains allowable subject matter, and Claim 18 would be allowed if amended to incorporate all limitations of Claim 16 on which it depends.
Claims 5, 6, 8, 12, and 15, as interpreted, contain allowable subject matter, while each of Claims 5, 7, 13, and 14 depends on a corresponding one of Claims 4, 6, 8, or 12.
Reason for Indicating Allowable Subject Matter
Re Claim 17: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitation of Claim 17 as: “a largest width of the first-region source/drain pattern in the first direction is larger than a largest width of the second-region source/drain pattern in the first direction”, in combination with other limitations of Claim 17 and in combination with all limitations of Claim 16, on which Claim 17 depends.
Re Claim 5: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitation of Claim 5, as interpreted, as: “each of the first and second angles is in a range from 70° to 90°”, in combination with other limitations of Claim 1 and on combination of Clams 1 and 4, on which Claim 5 depends.
Re Claim 6: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitation of Claim 6 as interpreted as: “the first connection side surface is spaced apart from the second connection side surface in the first direction”, in combination with other limitations of Claim 6 and in combination of all limitations of Claim 1, on which Claim 1 depends.
Re Claim 8: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitation of Claim 8, as interpreted, as: “a largest width of the first-region source/drain pattern in the first direction is larger than a largest width of the second-region source/drain pattern in the first direction”, in combination with other limitations of Claim 8 and in combination with all limitations of Claim 1, on which Claim 8 depends.
Re Claim 12: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitation of Claim 12, as interpreted, as: “the third side surface has a non-linear profile, when viewed in a plan view”, in combination with all limitations of Claim 9 on which Claim 12 depends.
Re Claim 15: The prior arts of record, alone or in combination, fail to anticipate or render obvious such limitation of Claim 15, as interpreted, as: “a largest width of the first-region source/drain pattern in the first direction is larger than a largest width of the second-region source/drain pattern in the first direction”, in combination with other limitations of Claim 15 and in combination with all limitations of Claim 9, on which Claim 15 depends.
The prior arts of record, in addition to the prior arts cited by the current Office Action above, also includes: Kim et al. (US 2021/0057411), Kim et al. (US 2022/0223626), Ju et al. (US 2021/0126097), and Lai et al. (US 2022/0084889).
Conclusion
Any inquiry concerning this communication should be directed to GALINA G YUSHINA whose telephone number is 571-270-7440. The Examiner can normally be reached between 8 AM - 7 PM Pacific Time (Flexible).
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/GALINA G YUSHINA/Primary Patent Examiner, Art Unit 2811, TC 2800,
United States Patent and Trademark Office
E-mail: galina.yushina@USPTO.gov
Phone: 571-270-7440
Date: 11/14/25