DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-10 in the reply filed on 11/20/25 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Im(USPGPUB DOCUMENT: 2012/0119359, hereinafter Im) in view of Chen (USPGPUB DOCUMENT: 2003/0020151, hereinafter Chen).
Re claim 1 Im discloses in Fig 29 a semiconductor package comprising: a substrate(110); a die(200) including a first side(top/bottom) of the die(200) and a second side(top/bottom) of the die(200), wherein the first side(top/bottom) of the die(200) includes a plurality of formations of die nanowires(60a)[0215], wherein the second side(top/bottom) of the die(200) is coupled to the substrate(110); a lid including a first side of the lid facing the die(200), wherein the first side of the lid includes a plurality of formations of lid nanowires(60b)[0215]; and wherein at least one formation of die nanowires(60a)[0215] is coupled to at least one formation of lid nanowires(60b)[0215].
Im does not disclose a lid including a first side of the lid facing the die(200), wherein the first side of the lid includes a plurality of formations of lid nanowires(60b)[0215];
Chen disclose in Fig 7 a lid(371/330 of Chen) including a first side of the lid facing the die(310)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Chui to the teachings of Im in order to large-scaled and reliable electronic apparatus which utilizes advanced packaging techniques of semiconductor dies [0001, Chui]. In doing so, a lid(371/330 of Chen) including a first side of the lid(371/330 of Chen) facing the die(200), wherein the first side of the lid includes a plurality of formations of lid nanowires(60b)[0215];
Re claim 2 Im and Chui disclose the semiconductor package of claim 1, wherein the lid(371/330 of Chen) is comprised of a lid(371/330 of Chen) top portion and a plurality of lid side portions, and the lid top portion is coupled to the lid side portions with a glue(375 of Chen).
Re claim 3 Im and Chui disclose the semiconductor package of claim 1, wherein the least one of the plurality of formations of die nanowires(60a)[0215] is coupled to at least one of the plurality of formations of lid nanowires(60b)[0215], and wherein the coupling is aligned with a shared a common axis.
Re claim 4 Im and Chui disclose the semiconductor package of claim 1, wherein at least one of the plurality of formations of die nanowires(60a)[0215] is coupled to at least one of the plurality of formations of lid nanowires(60b)[0215], and wherein the coupling is misaligned with the at least one of the plurality of formations of die nanowires(60a)[0215] having a different axis (outermost 60a/60b have a different axis than innermost 60a/60b) than the at least one of the plurality of formations of lid nanowires(60b)[0215].
Re claim 5 Im and Chui disclose the semiconductor package of claim 1, wherein the plurality of formations of lid nanowires(60b)[0215] covers a first portion of the first side of the lid(371/330 of Chen) that is not an entirety of the of the first side of the lid(371/330 of Chen).
Re claim 6 Im and Chui disclose the semiconductor package of claim 1, wherein the plurality of formations of die(200)nanowires(60a/60b)[0215] covers a first portion of the first side(top/bottom) of the die(200) that is not an entirety of the first side(top/bottom) of the die(200).
Re claim 7 Im and Chui disclose the semiconductor package of claim 6, wherein the first portion of the first side(top/bottom) of the die(200) covered by the plurality of formations of die nanowires(60a)[0215] includes coverage of at least one die(200) hot spot.
Re claim 8 Im and Chui disclose the semiconductor package of claim 1, wherein the plurality of formations of die nanowires(60a)[0215] are in a first pattern, wherein the plurality of formation of lid nanowires(60b)[0215] are in a second pattern, and wherein the first pattern and second pattern are complimentary patterns.
Re claim 9 Im and Chui disclose the semiconductor package of claim 1, wherein the first side of the lid(371/330 of Chen) covers one or more circuitries in addition to the die(200).
Re claim 10 Im and Chui disclose the semiconductor package of claim 9, wherein the plurality of formations of lid nanowires(60b)[0215] are only on a first portion of the lid(371/330 of Chen) associated with the die(200).
Conclusion
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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