DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Group I, claims 1 – 11, in the reply filed on 06/22/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 12 – 23 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected groups, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 06/22/2026.
Allowable Subject Matter
Claims 2, 4 and 5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nakai (US 2011/0300307 A1).
Regarding Claim 1, Nakai (US 2011/0300307 A1) discloses a printed circuit board (Fig 1-4) comprising: a first insulating layer (104); a first metal layer (63b) disposed on the first insulating layer (104) and including a first oxidation region (63b; [0077,0079,0094]) on a side surface (side of 63a) thereof; and a second metal layer (63a) disposed on the first metal layer (63b).
Regarding Claim 6, Nakai further discloses the printed circuit board (Fig 1-4) of claim 1, wherein a thickness of the second metal layer (63a) in a stacking direction of the first metal layer and the second metal layer is greater than a thickness of the first metal layer (63b) in the stacking direction of the first metal layer and the second metal layer.
Claim(s) 1 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Akahoshi (US 4,970,107).
Regarding Claim 1, Akahoshi (US 4,970,107) discloses a printed circuit board (Fig 1-3) comprising: a first insulating layer (2’); a first metal layer (14,16) disposed on the first insulating layer and including a first oxidation region (16) on a side surface thereof; and a second metal layer (12) disposed on the first metal layer (14,16).
Regarding Claim 7, Akahoshi further discloses the printed circuit board (Fig 1-3) of claim 1, wherein the first oxidation region (16) protrudes relative to a side surface of the second metal layer (12).
Claim(s) 1, 3, 6 and 8 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Take (US 2023/0253708 A1).
Regarding Claim 1, Take (US 2023/0253708 A1) discloses a printed circuit board (Fig 1-6) comprising: a first insulating layer (11; [0045]); a first metal layer (16; [0067]) disposed on the first insulating layer (11) and including a first oxidation region (region or portion or area of 28; [0060] “oxidation process”; note that the claim has not structurally limited this claims region) on a side surface (see Fig 6) thereof; and a second metal layer (27; [0058]) disposed on the first metal layer.
Regarding Claim 3, Take further discloses the printed circuit board (Fig 1-6) of claim 1, wherein the second metal layer (27) includes a second oxidation region (region or portion or area of 28; [0060] “oxidation process”; note that the claim has not structurally limited this claims region) on a side surface thereof.
Regarding Claim 6, Take further discloses the printed circuit board (Fig 1-6) of claim 1, wherein a thickness of the second metal layer (27) in a stacking direction of the first metal layer and the second metal layer is greater than a thickness of the first metal layer (16) in the stacking direction of the first metal layer and the second metal layer.
Regarding Claim 8, Take further discloses the printed circuit board (Fig 1-6) of claim 1, wherein the first metal layer (16) includes a metal ([0067] e.g. nickel), different from the second metal layer (27; [0058] e.g. copper).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 9 – 11 are rejected under 35 U.S.C. 103 as being unpatentable over Akahoshi (US 4,970,107) as applied to claim 1 above, and further in view of Harazono (US 2019/0132962 A1).
Regarding Claim 9, Akahoshi discloses the limitations of the preceding claim.
Akahoshi does not disclose the printed circuit board of claim 1, further comprising: a second insulating layer disposed on the first insulating layer; a through-hole penetrating through at least a portion of the second insulating layer; a third metal layer disposed on an inner wall of the through-hole, extending to at least a portion of an upper surface of the second insulating layer, and including a third oxidation region on a side surface thereof; and a fourth metal layer disposed on the third metal layer to fill the through-hole.
Akahoshi already teaches of an oxidation region on a side surface thereof, which increases bonding strength (Akahoshi, Column 4, lines 19-29).
Harazono (US 2019/0132962 A1) teaches of a printed circuit board (Fig 1-5), comprising: a second insulating layer (upper 2b) disposed on the first insulating layer (lower 2b); a through-hole (8b) penetrating through at least a portion of the second insulating layer; a third metal layer (4b on upper 2b) disposed on an inner wall of the through-hole, extending to at least a portion of an upper surface (upper surface of upper 2b) of the second insulating layer, and including a third oxidation region on a side surface thereof; and a fourth metal layer (5b) disposed on the third metal layer (4b) to fill the through-hole (8b).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as disclosed by Akahoshi, further comprising: a second insulating layer disposed on the first insulating layer; a through-hole penetrating through at least a portion of the second insulating layer; a third metal layer disposed on an inner wall of the through-hole, extending to at least a portion of an upper surface of the second insulating layer; and a fourth metal layer disposed on the third metal layer to fill the through-hole, as taught by Harazono, in order to provide higher density of conductors, provide highly functioning electronic devices, and provide electrical connection between wiring conductors ([0002,0003,0013]), such that a second insulating layer disposed on the first insulating layer; a through-hole penetrating through at least a portion of the second insulating layer; a third metal layer disposed on an inner wall of the through-hole, extending to at least a portion of an upper surface of the second insulating layer, and including a third oxidation region on a side surface thereof; and a fourth metal layer disposed on the third metal layer to fill the through-hole, as taught by Akahoshi in view of Harazono, in order to increase bonding strength (Akahoshi, Column 3, lines 16-46n Column 4, lines 19-29).
Regarding Claim 10, Akahoshi in view of Harazono teaches the limitations of the preceding claim and Akahoshi further teaches the printed circuit board of claim 9, wherein the fourth metal layer (14,16) includes a fourth oxidation region (16) on a side surface thereof.
Regarding Claim 11, Akahoshi in view of Harazono teaches the limitations of the preceding claim and Harazono further teaches the printed circuit board (Fig 1) of claim 9, further comprising a solder resist layer (6; [0035]) disposed on the second insulating layer (2b).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Murai (US 2007/0082183 A1) teaches of a printed circuit board (Fig 1-3) comprising: a first insulating layer (30); a first metal layer (50) disposed on the first insulating layer (30) and including a first oxidation region (region or portion or area of 50 with 40; [0031] “alumina”; note that the claim has not structurally limited this claims region) on a side surface (see Fig 1) thereof; and a second metal layer (20) disposed on the first metal layer. Note that “oxidation” can be interpreted as having oxide and thus the content of an oxide such as alumina may be interpreted to meet the claim limitation. This may be used in a future 103 Rejection.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROSHN K VARGHESE whose telephone number is (571)270-7975. The examiner can normally be reached M-Th: 900 am-300 pm.
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/ROSHN K VARGHESE/Primary Examiner, Art Unit 2847
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