The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
DETAILED ACTION
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-7, 9, 11-12, 17 and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Byun (8,896,044). Regarding claims 1 and 17, Byun teaches in figure 3 and related text a display device comprising:
a substrate SUB;
a first capacitor electrode CE on the substrate;
a first buffer layer (portion of IL) on the first capacitor electrode;
a second capacitor electrode CA (as defined by Byun) on the first buffer layer, the second capacitor electrode overlapping at least a portion of the first capacitor electrode;
a second buffer layer (another portion of IL) on (on and contacting a bottom surface of) the second capacitor electrode;
an active layer A1 on the second buffer layer;
a gate insulating film (un-numbered) on the active layer A1; and
a source electrode S1 on the gate insulating film, the source electrode overlapping at least a portion of the active layer,
wherein the active layer overlaps at least a portion of an overlapping region between the first capacitor electrode and the second capacitor electrode (at least a portion thereof), and
wherein the gate insulating film (un-numbered) is further from the substrate SUB than the active layer A1 in a cross-sectional view of the display device.
Regarding claims 17 and 7, Byun teaches in figure 3 and related text substantially the entire claimed structure, as applied to claim 1 above, including an overcoat layer (un-numbered) on the source electrode S1; and a pixel electrode PE (see figure 2) electrically connected to the source electrode through a first contact hole in the overcoat layer, the first contact hole overlapping the active layer.
Regarding claim 2, Byun teaches in figure 3 and related text that the active layer includes a first region, a second region, and a third region between the first region and the second region, and the second capacitor electrode (at lease part thereof) is below the third region and overlaps the third region.
Regarding claim 19, Byun teaches in figure 3 and related text that the active layer overlaps at least a portion of an overlapping region between the first capacitor electrode and the second capacitor electrode.
Regarding claim 3. Byun teaches in figure 3 and related text that an image data signal D1 is applied to the second capacitor electrode.
Regarding claim 4 Byun teaches in figure 3 and related text that the source electrode overlaps at least a portion of the overlapping region between the first capacitor electrode and the second capacitor electrode.
Regarding claim 5, Byun teaches in figure 3 and related text that the source electrode overlaps a channel region of the active layer.
Regarding claim 6, Byun teaches in figure 3 and related text that the source electrode S1 is electrically connected to the first capacitor electrode CE.
Regarding claim 9, Byun teaches in figure 3 and related text that the active layer includes a first region, a second region, and a third region between the first region and the second region, and the display device further comprises: a first auxiliary layer on the first region; and a second auxiliary layer on the second region.
Regarding claim 11, Byun teaches in figure 3 and related text that the active layer includes a first semiconductor material, and each of the first auxiliary layer and the second auxiliary layer includes a metal.
Regarding claim 12, Byun teaches in figures 1, 2 and related text that a sub-pixel including a driving transistor GD and a storage capacitor, wherein the storage capacitor is configured by an overlap between the first capacitor electrode and the second capacitor electrode, the driving transistor includes the active layer, the source electrode, and the second capacitor electrode, and the second capacitor electrode corresponds to a gate electrode of the driving transistor.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8, 10, 13 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Byun (8,896,044).
Regarding claims 8 and 18, Byun teaches in figure 3 and related text substantially the entire claimed structure, as applied to claims 1 and 17 above, except a first contact hole overlaps a channel region of the active layer.
Chang et al. teach in figure 4 and related text a first contact hole overlaps the active layer.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the first contact hole overlapping the active layer in Chang et al.’s device in order to provide better connections between the source/drain electrode and the source/drain regions.
Regarding claim 10, Byun teaches in figures 1-3 and related text substantially the entire claimed structure, as applied to claims 1 and 17 above, including that the active layer includes a first semiconductor material, and each of the first auxiliary layer and the second auxiliary layer includes a second material different from the first semiconductor material, but except that each of the first auxiliary layer and the second auxiliary layer includes a second semiconductor material different from the first semiconductor material, and a mobility of the first semiconductor material is greater than a mobility of the second semiconductor material.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form each of the first auxiliary layer and the second auxiliary layer includes a second semiconductor material different from the first semiconductor material, and a mobility of the first semiconductor material is greater than a mobility of the second semiconductor material in Chang et al.’s device in order to adjust the conductivity of the device according to the requirements of the application in hand.
Regarding the claimed limitations of using specific materials, it is noted that substitution of materials is not patentable even when the substitution is new and useful. Safetran Systems Corp. v. Federal Sign & Signal Corp. (DC NIII, 1981) 215 USPQ 979.
It is further held that it is within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 13, Byun teaches in figure 3 and related text substantially the entire claimed structure, as applied to claim 1 above, except that the sub-pixel further comprises a scanning transistor, wherein an active layer of the scanning transistor is on a same layer as the active layer of the driving transistor, and a gate electrode of the scanning transistor or a scanning gate line corresponding to the gate electrode of the scanning transistor is on the active layer of the scanning transistor and is on a same layer as the source electrode of the driving transistor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a scanning transistor, wherein an active layer of the scanning transistor is on a same layer as the active layer of the driving transistor, and a gate electrode of the scanning transistor or a scanning gate line corresponding to the gate electrode of the scanning transistor is on the active layer of the scanning transistor in Chang et al.’s device in order to operate the device in its intended use.
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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O.N. /ORI NADAV/
5/21/2026 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800
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