DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicants’ election without traverse of Group I, claims 1-6, in the reply filed on 27 October 2025 is acknowledged. Applicants are reminded to indicate the withdrawn status of claims 7-9 in their next submission of a claim listing.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following subject matter must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Claim 1, line 5, recites “a channel region,” which is not illustrated by the drawings or identified in the specification.
Claim 1, line 7, recites “no channel region,” which is not illustrated by the drawings or identified in the specification.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The abstract of the disclosure is objected to because it contains: (1) more than one paragraph and (2) more than 150 words. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Objections
Claim 1 is objected to because of the following informalities:
Claim 1, line 5, recites “an applied a voltage,” which should read “an applied voltage.”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1, line 5, recites “a channel region,” which is indefinite because the application does not make clear what constitutes this region. For the purpose of compact prosecution and to best comport with the description in the specification regarding the presence and absence of something pertaining to a channel (see page 6, lines 15-20, of the instant specification discussing how an emitter region functions/does-not-function as a channel), the claim will be interpreted to recite “an emitter region.”
Claim 1, line 7, recites “no channel region,” which is indefinite because the application does not make clear what constitutes this region. For the purpose of compact prosecution and to best comport with the description in the specification regarding the presence and absence of something pertaining to a channel (see page 6, lines 15-20, of the instant specification discussing how an emitter region functions/does-not-function as a channel), the claim will be interpreted to recite “no emitter region.”
Claim 4, lines 20 and 21, recites “a switch trench, which is a trench discretely formed from the front surface side of the semiconductor substrate with a mesa section interposed therebetween,” which is indefinite because: (1) it is unclear whether this mesa section differs from that recited in lines 16 and 17 and (2) it is unclear between what two things the mesa section is interposed. For the purpose of compact prosecution and to better comport with the specification and the remainder of the claim, the recitation in lines 16 and 17 will be interpreted as “a first mesa section” and the recitation in line 21 will be interpreted as “a switch trench, which is a trench discretely formed from the front surface side of the semiconductor substrate with a second mesa section adjacent thereto.”
Claim 4, line 25, recites “an emitter region, which is the mesa section adjacent to the gate trench,” which is indefinite both because: (1) “the gate trench” lacks a proper antecedent basis and (2) it is unclear whether “the mesa section” refers to that recited in line 17 with respect to the plurality of gate trenches. For the purpose of compact prosecution and to better comport with the specification and the remainder of the claim, the recitation will be interpreted as “an emitter region, which is a first portion of the first mesa section adjacent to a gate trench among the plurality of gate trenches.”
Claim 4, line 28, recites “the mesa section,” which is indefinite because it is unclear whether this refers to the mesa section pertaining to the plurality of gate trenches as recited in lines 15-17 or the mesa section pertaining to the switch trench as recited in lines 20 and 21. For the purpose of compact prosecution and to better comport with the specification and the remainder of the claim, the recitation will be interpreted as “the first mesa section.”
Claim 4, lines 28-30, recites “a first mesa region … functions as a channel by forming the emitter region on the front surface side,” which is indefinite because it is unclear how the first mesa region forms the emitter region identified in line 25. For example, are the first mesa region and the emitter region one and the same thing or does the first mesa region assemble the emitter region from unidentified constituent components. For the purpose of compact prosecution and to better comport with the specification and the remainder of the claim, the recitation will be interpreted as “a first mesa region … functions as a channel due to the presence of the emitter region on the front surface side.”
Claim 4, line 31, recites “the mesa section,” which is indefinite because it is unclear whether this refers to the mesa section pertaining to the plurality of gate trenches as recited in lines 15-17 or the mesa section pertaining to the switch trench as recited in lines 20 and 21. For the purpose of compact prosecution and to better comport with the specification and the remainder of the claim, the recitation will be interpreted as “the second mesa section.”
Claim 4, lines 31 and 32, recites “a second mesa region [adjacent the switch trench] … connected to the emitter electrode through the contact,” and lines 25-27 recites “a first mesa region [between adjacent gate trenches] … connected to the emitter electrode through a contact. The combination of these recitations is indefinite because the instant application {see, e.g., Fig. 1} discloses the mesa region adjacent the switch trench is connected to the emitter electrode (e.g., 104) through a different contact (e.g., 132) than that connecting the mesa region between adjacent gate trenches to the emitter electrode (e.g., 104). For the purpose of compact prosecution and to better comport with the specification and the remainder of the claim, the recitation in lines 25-27 will be interpreted as “a first mesa region … connected to the emitter electrode through a first contact” and the recitation in lines 31 and 32 will be interpreted as “a second mesa region … connected to the emitter electrode through a second contact.”
Claims 2 and 3 are rejected due to their dependence from base claim 1. Claims 5 and 6 are rejected due to their dependence from base claim 4.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Yasuhara et al. (US20220302288A1).
Regarding claim 1, as interpreted in view of the indefiniteness rejections, Yasuhara teaches in Fig. 8 a trench gate type IGBT, comprising:
a semiconductor substrate (10) {[0036]};
a gate trench (21), which extends from the front surface toward the back surface side of the semiconductor substrate (10), and causes a current to flow through an emitter region (34) formed in the periphery by an applied a voltage {[0036]};
a switch trench (22), which extends from the front surface toward the back surface side of the semiconductor substrate (30) and has no emitter region (34) formed therearound {[0036]}; and
a setting terminal (Vg2 terminal) for externally controlling the voltage of the switch trench (22) {[0080]}; wherein
a switching between a first state, in which a voltage drop at on-time is relatively small and an energy loss at turn-off time is relatively large, and a second state, in which the voltage drop at on-time is relatively large and the energy loss at turn-off time is relatively small, can be performed, according to a voltage applied to the setting terminal (Vg2 terminal) {Fig. 9; [0148-0153]; see Examiner’s Note, below}.
Examiner’s Note: Yasuhara’s IGBT has the same structure as that claimed by Applicants. Page 5, lines 3-7, of the instant application admits that a collector-emitter voltage drop Vce is inversely proportional to an amount of holes in the IGBT structure. And page 9, lines 1-7, of the instant application admits that energy loss (i.e., switching loss; see page 9, lines 1-7) is directly proportional to the amount of holes. Similar to the instant application, Yasuhara teaches in paragraphs [0148-0153] that holes are discharged when a negative voltage is applied to the Vg2 terminal prior to an off-time to reduce the off-time switching loss (i.e., energy loss) and are not discharged when a zero voltage is applied to the Vg2 terminal prior to an on-time.
Regarding claim 2, Yasuhara teaches the trench gate type IGBT according to claim 1, and Yasuhara further teaches the first state is adopted when an on-off frequency is low and the second state is adopted when the on-off frequency is high.
Examiner’s Note: As discussed more fully with respect to base claim 1, Yasuhara teaches the first state is employed at on-time and the second state is employed at off-time. Thus, each state is employed regardless of the frequency with which the on-off cycle occurs. Moreover, the instances of “when” are conditions precedent to an event that are implicitly recited in the alternative to such conditions not occurring; therefore, the conditions subsequent need not be met by the applied art. See, e.g., Ex parte Schulhauser, PTAB Appeal 2013-007847 (Precedential decision), page 14, claim does not require [condition subsequent to exist] … should condition precedent not be met. Stated another way for increased understanding, the condition precedent establishes two alternatives (a first alternative being that the condition precedent is unmet and the second alternative being the condition precedent is met); and when the first alternative occurs, no further structural limitations are imposed by the claim. A further structural limitation only exists when the condition precedent is met. Furthermore, the recitations of “when an on-off frequency is low” and “when the on-off frequency is high” are directed to a manner in which the claimed subject matter is intended to be employed and, accordingly, do not structurally distinguish the claimed invention from the prior art. MPEP §2114(II) – a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim.
Regarding claim 3, Yasuhara teaches the trench gate type IGBT according to claim 2, and Yasuhara further teaches wherein the voltage applied to the setting terminal can be changed continuously.
Examiner’s Note: As discussed more fully with respect to base claim 1, Yasuhara teaches the voltage applied to the setting terminal can be changed depending on whether an on-state or an off-state transition is desired. The American Heritage Dictionary, 4th edition, defines “can” as “[p]ossession of a capability.” Regardless of whether the recited limitation of “continuously” is intended to mean linearly or uninterrupted in time, Yasuhara’s IGBT possesses the capability to be changed both linearly (due to parasitic capacitances/resistances) and uninterrupted in time.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yasuhara in view of Iwakaji et al. (US20200303525A1).
Regarding claim 4, as interpreted in view of the indefiniteness rejections, Yasuhara teaches in Fig. 8 a trench gate type IGBT, comprising:
a semiconductor substrate (10) {[0036]};
an emitter electrode (12), which is formed on the front surface of the semiconductor substrate (10) {[0035]};
a collector pad (14), which is formed on the back surface of the semiconductor substrate (10) {[0035]};
a P-type P-collector layer (28), which is formed on the back surface side of the semiconductor substrate (10) on the collector pad (14) {[0036]};
an N-type N-drift layer (30), which is positioned on the P-collector layer (28) in the semiconductor substrate (10) {[0036]};
a P-type P-body layer (32), which is formed on the semiconductor substrate (10) {[0036]};
a plurality of gate trenches (21), which are a plurality of trenches discretely formed from the front surface side of the semiconductor substrate (10) with a first mesa section (mesa section separating adjacent 21s) interposed therebetween and extending toward the back surface side to the N-drift layer (30), and have a gate region (51) formed inside with an insulating film therebetween {[0035, 0036]};
a switch trench (22), which is a trench discretely formed from the front surface side of the semiconductor substrate (10) with a second mesa section (mesa section adjacent to 22) adjacent thereto and extending toward the back surface side to the N-drift layer (30), and is connected to a setting terminal (52) formed inside with an insulating film (42) therebetween and allowing a voltage to be set externally {[0035, 0036, 0080]};
an emitter region (34), which is a first portion of the first mesa section (mesa section separating adjacent 21s) adjacent to a gate trench (21) among the plurality of gate trenches (21) and is formed on the front surface side of the P-body layer (32), and is connected to the emitter electrode (12) {[0041, 0050]};
a first mesa region (32 region of mesa section separating adjacent 21s), which is the P-body layer (32) of the first mesa section (mesa section separating adjacent 21s) and connected to the emitter electrode (12) through a first contact (34 & 36 between 21s), and functions as a channel due to the presence of the emitter region (34) on the front surface side {[0049]}; and
a second mesa region (32 region of mesa section adjacent to 22), which is the P-body layer (32) of the second mesa section (mesa section adjacent to 22) and connected to the emitter electrode (12) through a second contact (36 adjacent 22), and does not function as a channel due to an absence of the emitter region (34) on the front surface side {[0004], see Examiner’s Note, below}; wherein
the second mesa region (32 region of mesa section adjacent to 22) is positioned around the switch trench (22).
Examiner’s Note: Yasuhara teaches in paragraph [0004] [i]n the IGBT, a channel is formed in the p-type base region by applying a positive voltage equal to or higher than a threshold voltage to the gate electrode. Then, electrons are injected from the n-type emitter region into the n-type drift region, and holes are injected from the collector region into the n-type drift region at the same time. As a result, a current using electrons and holes as carriers flows between the collector electrode and the emitter electrode. Thus, in the absence of the n-type emitter region adjacent the switching trench, no electrons are injected from the n-type emitter region into the [non-existent] n-type drift region and no current flows; therefore, no current channel is produced.
Yasuhara does not teach:
an N-type carrier store layer, which is formed on the N-drift layer and has an impurity concentration higher than that of the N-drift layer; and
the P-type P-body layer is formed on the front surface side of the carrier store layer.
In an analogous art, Iwakaji teaches in Fig. 2 and paragraph [0041] an N-type carrier store layer (33) that is disposed between an N-drift layer (32) and a P-type P-body layer (34) and has an impurity concentration higher than that of the N-drift layer (32). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yasuhara’s trench gate type IGBT based on the teachings of Iwakaji – to include an N-type carrier store layer, which is formed on the N-drift layer and has an impurity concentration higher than that of the N-drift layer, whereby the P-type P-body layer is formed on the front surface side of the carrier store layer – for reducing an on-resistance of the IGBT. Iwakaji [0042]. Moreover, all the claimed elements (e.g., N-type carrier store layer, N-drift layer, P-type P-body layer, impurity concentration) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Iwakaji) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Regarding claim 5, Yasuhara as modified by Iwakaji teaches the trench gate type IGBT according to claim 4, and Yasuhara further teaches wherein the first state is adopted when an on-off frequency is low and the second state is adopted when the on-off frequency is high.
Examiner’s Note: As discussed more fully with respect to base claim 4, Yasuhara teaches the first state is employed at on-time and the second state is employed at off-time. Thus, each state is employed regardless of the frequency with which the on-off cycle occurs. Moreover, the instances of “when” are conditions precedent to an event that are implicitly recited in the alternative to such conditions not occurring; therefore, the conditions subsequent need not be met by the applied art. See, e.g., Ex parte Schulhauser, PTAB Appeal 2013-007847 (Precedential decision), page 14, claim does not require [condition subsequent to exist] … should condition precedent not be met. Stated another way for increased understanding, the condition precedent establishes two alternatives (a first alternative being that the condition precedent is unmet and the second alternative being the condition precedent is met); and when the first alternative occurs, no further structural limitations are imposed by the claim. A further structural limitation only exists when the condition precedent is met. Furthermore, the recitations of “when an on-off frequency is low” and “when the on-off frequency is high” are directed to a manner in which the claimed subject matter is intended to be employed and, accordingly, do not structurally distinguish the claimed invention from the prior art. MPEP §2114(II) – a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim.
Regarding claim 6, Yasuhara as modified by Iwakaji teaches the trench gate type IGBT according to claim 5, and Yasuhara further teaches wherein the voltage applied to the setting terminal can be changed continuously.
Examiner’s Note: As discussed more fully with respect to base claim 4, Yasuhara teaches the voltage applied to the setting terminal can be changed depending on whether an on-state or an off-state transition is desired. The American Heritage Dictionary, 4th edition, defines “can” as “[p]ossession of a capability.” Regardless of whether the recited limitation of “continuously” is intended to mean linearly or uninterrupted in time, Yasuhara’s IGBT possesses the capability to be changed both linearly (due to parasitic capacitances/resistances) and uninterrupted in time.
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chen (US20210257473A1) teaches plural gate trenches are formed on an upper surface side of a semiconductor substrate of a first conductivity type. Gate electrodes are embedded in the plural gate trenches. Plural dummy gate trenches are formed at equivalent intervals between the neighboring gate trenches on the upper surface side of the semiconductor substrate. Dummy gate electrodes are embedded in the plural dummy gate trenches and connected with an emitter electrode. An interval between the gate trench and the dummy gate trench that neighbor each other is shorter than an interval between the neighboring dummy gate trenches.
Conclusion
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891