DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Rodriguez et al (US Publication 20210179280) in view of Chu et al (US Publication 20140103286).
Regarding claim 1, Rodriguez teaches an apparatus, comprising:
a first and a second conductive pad (Fig. 3A, 196/198) set into a substrate (Fig. 3A, 190) the first conductive pad electrically coupled to an integrated circuit (IC) input (Fig. 3A, 220), the first and second conductive pads not otherwise electrically coupled to each other (Fig. 3A, 196/198 not electrically connected);
at least one layer of a conductive alloy deposited above the first and second conductive pads(Fig. 3A, 202); and
at least one layer of an energetic material deposited above the conductive alloy layer (Fig. 3A, 200), the energetic material coupled to an ignition circuit (para 35-36);
wherein the ignition circuit is configured to trigger a thermal reaction in the energetic material, the thermal reaction capable of:
1) removing the at least one dielectric layer;
2) melting the at least one conductive alloy layer; and
3) electrically bridging the first and second conductive pads via the conductive alloy (para 35).
Furthermore, the present claim is drawn to a device, thus the method of a thermal reaction capable of removing the at least on dielectric layer, melting the at least one conductive alloy layer, and electrically bridging the first and second conductive pads via the conductive alloy does not patentably distinguish the claimed invention from that of the invention of Rodriguez (because the ignition described in paragraph 35 is capable of becoming hot enough for the steps to take place).
It should be noted that a "product by process claim" is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in " product by process" claims or not. Note that applicant has the burden of proof in such cases, as the above caselaw makes clear. See also MPEP 2113 [R-1].
Rodriguez does not specifically teach at least one layer of a dielectric material deposited above a first and a second conductive pad, such that it would be between the conductive pads and the layer of conductive alloy.
Chu teaches at least one layer of a dielectric material (Fig. 4, 440) deposited above a first and a second conductive pad (Fig. 4, 400, dielectric 440 above first and second conductive pads - left and right sections of conductive path 460 - and below a layer of reactive metal material – para 39-41, then 31 describing the material).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez to include the dielectric layer as taught by Chu in order to improve the reliability and operability of the device.
Regarding claims 2-4, Rodriguez as modified teaches the limitations of claim 1 upon which these claims depend;
Rodrigues does not specifically teach:
[claim 2] the second conductive pad is electrically coupled to a ground; and
the thermal reaction is configured to ground the IC input by electrically bridging the first and second conductive pads.
[claim 3] the second conductive pad is electrically coupled to a ground;
the IC input is electrically coupled to at least one second IC output via the first conductive pad; and
the thermal reaction is capable of 1) disabling the electrical coupling of the IC input and the IC output by grounding the at least one second IC output.
[claim 4] the IC input is associated with a first IC;
the second conductive pad is electrically coupled to a second IC; and
the electrical bridge between the first and second ICs is capable of enabling input/output (I/O) between the first and second ICs.
Chu teaches:
[claim 2] the second conductive pad is electrically coupled to a ground (para 17, “wiring for transporting signals between transistors, gates and other structures in the front end and supply voltages, ground” – thus in some cases the second pad could be grounded); and
the thermal reaction is configured to ground the IC input by electrically bridging the first and second conductive pads (when the reaction takes place, the thermal reaction would be able to bridge the conductive areas in some cases – see explanation above as to product by process).
[claim 3] the second conductive pad is electrically coupled to a ground (para 17);
the IC input is electrically coupled to at least one second IC output via the first conductive pad (paragraph 17, connections to a many different elements/structure is taught); and
the thermal reaction is capable of 1) disabling the electrical coupling of the IC input and the IC output by grounding the at least one second IC output (when the reaction takes place, the thermal reaction would be able to bridge the conductive areas in some cases, thus is ‘capable of’).
[claim 4] the IC input is associated with a first IC;
the second conductive pad is electrically coupled to a second IC (para 17); and
the electrical bridge between the first and second ICs is capable of enabling input/output (I/O) between the first and second ICs (para 17, see capable of explanations above as to process limitations in product claims).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez as modified to include the IC circuit and ground connections as taught by Chu in order to improve the final use operability of the device by providing for robust circuit integration of the device.
Regarding claim 5, Rodriguez as modified teaches the limitations of claim 1 upon which claim 5 depends.
Rodriguez does not specifically teach wherein the at least one dielectric layer is deposited via at least one of aerosol jet printing, inkjet printing, or screen printing.
These printing methods are well known within the art.
Furthermore, the present claim is drawn to a device, thus the method of depositing the at least on dielectric layer does not patentably distinguish the claimed invention from that of the invention of Rodriguez.
It should be noted that a "product by process claim" is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in " product by process" claims or not. Note that applicant has the burden of proof in such cases, as the above caselaw makes clear. See also MPEP 2113 [R-1].
Regarding claims 6 and 7, Rodriguez as modified teaches the limitations of claim 1 upon which these claims depend.
Rodriguez does not specifically teach:
[claim 6] wherein the at least one dielectric layer is deposited between the first and the second conductive pads.
[claim 7] wherein the at least one dielectric layer is deposited over the first and the second conductive pads.
Chu teaches:
[claim 6] wherein the at least one dielectric layer is deposited between the first and the second conductive pads (Fig. 4, 410 above, 440 and insulative substrate 410 between left and right portions of conductive path 460, para 58-59, “may take a different arrangement depending upon the location, orientation or other characteristic”).
[claim 7] wherein the at least one dielectric layer is deposited over the first and the second conductive pads (440 and insulative substrate 410 – can be considered the dieletric and are above left and right portions of conductive path 460 para 58-59, “may take a different arrangement depending upon the location, orientation or other characteristic”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez as modified to include the IC circuit and ground connections as taught by Chu in order to improve the final use operability of the device by providing for robust circuit integration of the device.
Regarding claim 15, Rodriguez teaches a method for forming an anti-fuse on an apparatus, the method comprising:
a portion including a first conductive pad and a second conductive pad set thereinto (Fig. 3A, 196/198), the first conductive pad electrically coupled to an integrated circuit (IC) input (Fig. 3A, 210), the first and second conductive pads not otherwise electrically coupled to each other (Fig. 3A, 196/198 not electrically connected);
depositing a layer of a conductive alloy over the portion including the first and second conductive pads (Fig. 3A, 202);
connecting the at least one layer of the energetic material to an ignition circuit, the ignition circuit configured to trigger a thermal reaction in the at least one energetic layer (para 35-36).
Rodriguez does not specifically teach:
depositing a layer of a dielectric material over the portion of a substrate, wherein the dielectric layer is between the first and second conductive pads and the conductive alloy,
the thermal reaction capable of:
1) removing the at least one dielectric layer;
2) melting the at least one conductive alloy layer; and
3) electrically bridging the first and second conductive pads via the conductive alloy.
depositing, via an additive manufacturing method, at least one layer of an energetic material over a portion of the conductive alloy layer.
Chu teaches:
depositing a layer of a dielectric material over a portion of a substrate (Fig. 4, 440),
depositing, via an additive manufacturing method, at least one layer of an energetic material over a portion of the conductive alloy layer (para 49, “electron beam induced deposition, a focused ion beam induced deposition, sputtering, evaporation and similar techniques”);
the thermal reaction capable of:
1) removing the at least one dielectric layer;
2) melting the at least one conductive alloy layer; and
3) electrically bridging the first and second conductive pads via the conductive alloy (para 40).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez to include the dielectric layer and thermal reaction as taught by Chu in order to improve the reliability and operability of the device.
Claims 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over Rodriguez et al (US Publication 20210179280) in view of Chu et al (US Publication 20140103286) and Waller et al (US Publication 20190131612).
Regarding claim 8, Rodriguez teaches an apparatus, comprising:
a first conductive pad and a second conductive pad set into a substrate (Fig. 3A, 196/198), the first conductive pad electrically coupled to an integrated circuit (IC) input (Fig. 3A, 198 connected to 220 via 194), the first and second conductive pads not otherwise electrically coupled to each other (Fig. 3A, 196 and 198 not electrically coupled until ignition of 200);
at least one layer of an energetic material deposited above the first and second conductive pads (Fig. 3A, 200), the energetic material coupled to an ignition circuit (para 35-36); and
wherein the ignition circuit is configured to trigger a thermal reaction in the energetic material, the thermal reaction capable of:
1) removing the at least one dielectric layer and the at least one energetic layer;
2) melting the at least one conductive alloy layer; and
3) electrically bridging the first and second conductive pads via the conductive alloy (para 35).
Furthermore, the present claim is drawn to a device, thus the method of a thermal reaction capable of removing the at least on dielectric layer, melting the at least one conductive alloy layer, and electrically bridging the first and second conductive pads via the conductive alloy does not patentably distinguish the claimed invention from that of the invention of Rodriguez.
It should be noted that a "product by process claim" is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in " product by process" claims or not. Note that applicant has the burden of proof in such cases, as the above caselaw makes clear. See also MPEP 2113 [R-1].
Rodriguez does not specifically teach:
at least one layer of a dielectric material deposited above the first and second conductive pads and below the layer of energetic material;
at least one layer of a conductive alloy deposited above the energetic layer;
Chu teaches at least one layer of a dielectric material (Fig. 4, 440) deposited above a first and a second conductive pad (Fig. 4, 440 above left and right portions of conductive path.460).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez to include the dielectric layer as taught by Chu in order to improve the reliability and operability of the device.
Rodriguez as modified still lacks at least one layer of a conductive alloy deposited above the energetic layer;
Waller teaches at least one layer of a conductive alloy deposited above the energetic layer (Fig. 3, 14 above 4)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez as modified to include the conductive layer as taught by Waller in order to further improve the end use and reliability of the device.
Regarding claims 9-11, Rodriguez as modified teaches the limitations of claim 8 upon which these claims depend.
Rodriguez does not specifically teach:
[claim 9] the second conductive pad is electrically coupled to a ground; and
the thermal reaction is configured to ground the IC input by electrically bridging the first and second conductive pads.
[claim 10] the second conductive pad is electrically coupled to a ground;
the IC input is electrically coupled to at least one second IC output via the first conductive pad; and
the thermal reaction is capable of 1) disabling the electrical coupling of the IC input and the IC output by grounding the at least one second IC output.
[claim 11] the IC input is associated with a first IC;
the second conductive pad is electrically coupled to a second IC; and
the electrical bridge between the first and second ICs is capable of enabling input/output (I/O) between the first and second ICs.
Chu teaches:
[claim 9] the second conductive pad is electrically coupled to a ground ((para 17, “wiring for transporting signals between transistors, gates and other structures in the front end and supply voltages, ground” – thus in some cases the second pad could be grounded)); and
the thermal reaction is configured to ground the IC input by electrically bridging the first and second conductive pads (para 17).
[claim 10] the second conductive pad is electrically coupled to a ground (when the reaction takes place, the thermal reaction would be able to bridge the conductive areas in some cases – see explanation above as to product by process);
the IC input is electrically coupled to at least one second IC output via the first conductive pad (paragraph 17, connections to a many different elements/structure is taught); and
the thermal reaction is capable of 1) disabling the electrical coupling of the IC input and the IC output by grounding the at least one second IC output (para 17, see above process in product claim description).
[claim 11] the IC input is associated with a first IC;
the second conductive pad is electrically coupled to a second IC (paragraph 17, connections to a many different elements/structure is taught); and
the electrical bridge between the first and second ICs is capable of enabling input/output (I/O) between the first and second ICs (para 17, see above process in product claim description).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez as modified to include the IC circuit and ground connections as taught by Chu in order to improve the final use operability of the device by providing for robust circuit integration of the device.
Regarding claim 12, Rodriguez as modified teaches the limitations of claim 8 upon which claim 12 depends.
Rodriguez does not specifically teach wherein the at least one dielectric layer is deposited via at least one of aerosol jet printing, inkjet printing, or screen printing.
These printing methods are well known within the art.
Furthermore, the present claim is drawn to a device, thus the method of depositing the at least on dielectric layer does not patentably distinguish the claimed invention from that of the invention of Rodriguez.
It should be noted that a "product by process claim" is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in " product by process" claims or not. Note that applicant has the burden of proof in such cases, as the above caselaw makes clear. See also MPEP 2113 [R-1].
Regarding claims 13 and 14, Rodriguez as modified teaches the limitations of claim 8 upon which these claims depend.
[claim 13] wherein the at least one dielectric layer is deposited between the first and the second conductive pads.
[claim 14] wherein the at least one dielectric layer is deposited over the first and the second conductive pads.
Chu teaches:
[claim 13] wherein the at least one dielectric layer is deposited between the first and the second conductive pads (Fig. 4, 410 above, 440 and insulative substrate 410 between left and right portions of conductive path 460, para 58-59, “may take a different arrangement depending upon the location, orientation or other characteristic”).
[claim 14] wherein the at least one dielectric layer is deposited over the first and the second conductive pads (440 and insulative substrate 410 – can be considered the dieletric and are above left and right portions of conductive path 460 para 58-59, “may take a different arrangement depending upon the location, orientation or other characteristic”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Rodriguez as modified to include the dielectric layer as taught by Chu in order to improve the reliability and operability of the device.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tsai et al (US Publication 20250079104) – Protection device
Yoneda et al (US Publication 20160013001) – Fuse element and fuse device
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/NICHOLAS LELAND HUTSON/ Examiner, Art Unit 2818
/JEFF W NATALINI/ Supervisory Patent Examiner, Art Unit 2818