Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
1. Claims 1, 3-5 and 11-20 are rejected under 35 U.S.C. 102(a2) as being anticipated by Hopkins et al. (US 2022/0051991; hereinafter Hopkins)
Regarding claim 1, Hopkins, in fig. 1A, discloses an integrated circuit structure, comprising: a plurality of conductive lines 110, individual ones of the plurality of conductive lines 110 having a liner 111 comprising molybdenum ([0034]), and a fill 112 comprising tungsten ([0037]); and an inter-layer dielectric structure (ILD 102) having portions between adjacent ones of the plurality of conductive lines.
Regarding claim 3, Hopkins discloses wherein the liner 111 comprising molybdenum (Mo) comprises greater than 100 atomic % Mo ([0034]).
Regarding claim 4, Hopkins discloses wherein the fill 112 comprising tungsten (W) comprises greater than 100 atomic % W ([0037]).
Regarding claim 5, Hopkins discloses wherein the liner 111 comprising molybdenum (Mo) is a thermal atomic layer deposition (ALD) liner, a plasma ALD liner, a physical vapor deposition (PVD) liner, or an organic ALD liner, and wherein the fill 112 comprising tungsten (W) is a chemical vapor deposition (CVD) fill ([0035] & [0038]).
Regarding claim 11, Hopkins, in fig. 4, discloses computing device, comprising: a board 400; and a component ([0118]) coupled to the board, the component including an integrated circuit structure, comprising: a plurality of conductive lines 110, individual ones of the plurality of conductive lines 110 having a liner 111 comprising molybdenum (Mo) ([0034]), and a fill 112 comprising tungsten (W) ([0037]); and an inter-layer dielectric (ILD 102) structure having portions between adjacent ones of the plurality of conductive lines 110.
Regarding claim 12, Hopkins discloses further comprising: a memory coupled to the board ([0122]).
Regarding claim 13, Hopkins discloses further comprising: a communication chip coupled to the board ([0120]).
Regarding claim 14, Hopkins discloses further comprising: a camera coupled to the board. ([0120]).
Regarding claim 15, Hopkins discloses further comprising: a battery coupled to the board. ([0120]).
Regarding claim 16, Hopkins discloses further comprising: a speaker coupled to the board ([0120])
Regarding claim 17, Hopkins discloses further comprising: a compass coupled to the board ([0120]).
Regarding claim 18, Hopkins discloses further comprising: a GPS coupled to the board ([0120]).
Regarding claim 19, Hopkins discloses further comprising: a display coupled to the board ([0120]).
Regarding claim 20, Hopkins discloses wherein the component is a packaged integrated circuit die ([0118]).
2. Claims 1 and 3-5 are rejected under 35 U.S.C. 102(a2) as being anticipated by Dutta et al. (US 2023/0102165; hereinafter Dutta).
Regarding claim 1, Dutta, in fig. 1, discloses an integrated circuit structure, comprising: a plurality of conductive lines, individual ones of the plurality of conductive lines having a liner 109 comprising molybdenum ([0033]), and a fill 110 comprising tungsten ([0033]); and an inter-layer dielectric structure (ILD 105) having portions between adjacent ones of the plurality of conductive lines.
Regarding claim 3, Dutta discloses wherein the liner 109 comprising molybdenum (Mo) comprises greater than 100 atomic % Mo ([0033]).
Regarding claim 4, Dutta discloses wherein the fill 110 comprising tungsten (W) comprises greater than 100 atomic % W ([0033]).
Regarding claim 5, Dutta discloses wherein the liner 109 comprising molybdenum (Mo) is a thermal atomic layer deposition (ALD) liner, a plasma ALD liner, a physical vapor deposition (PVD) liner, or an organic ALD liner, and wherein the fill 110 comprising tungsten (W) is a chemical vapor deposition (CVD) fill ([0033]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over Dutta (US 2023/0102165) in view of Bhosale et al. (US 11,444,029; hereinafter Bhosale).
Regarding claim 6, Dutta, in fig. 1, discloses an integrated circuit structure, comprising: a plurality of conductive lines on a same level and along a same direction, a first one of the plurality of conductive lines (in LOGIC AREA) having a first width and a first composition, and a second one of the plurality of conductive lines (in MEMORY AREA) having a second width and a second composition, the second width (in MEMORY AREA) greater than the first width (in LOGIC AREA), the second one of the plurality of conductive lines having a liner 109 comprising molybdenum (Mo), and a fill 110 comprising tungsten (W) (see [0033]); and an inter-layer dielectric structure (ILD 105) having portions between adjacent ones of the plurality of conductive lines.
Dutta discloses an integrated circuit structure as above but fails to disclose the second composition different than the first composition. However, Bhosale discloses the first conductive lines 612-1 having a first width and a first composition, and the second conductive lines 612-4 having a second width and a second composition, the second width greater than the first width, and the second composition different than the first composition (fig. 6 & col. 6, lines 59-67). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form the conductive lines structure as taught by Bhosale so that various structures can be implemented in integrated circuit.
Regarding claim 7, Bhosale discloses wherein the first one of the plurality of conductive lines 612-1 comprises a conductive fill with no conductive barrier (fig. 6).
Regarding claim 8, although the first thickness of the liner is not exactly as claimed, these claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang. 40 USPQ2d 1685, 1688(Fed. Cir. 1996) (claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious).
Regarding claim 9, Dutta discloses wherein the liner 109 comprising molybdenum (Mo) comprises greater than 100 atomic % Mo, and wherein the fill 110 comprising tungsten (W) comprises greater than 100 atomic % W ([0033]).
Regarding claim 10, Dutta discloses wherein the liner 109 comprising molybdenum (Mo) is a thermal atomic layer deposition (ALD) liner, a plasma ALD liner, a physical vapor deposition (PVD) liner, or an organic ALD liner, and wherein the fill 110 comprising tungsten (W) is a chemical vapor deposition (CVD) fill ([0033]).
4. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Dutta (US 2023/0102165).
Regarding claim 2, although the first thickness of the liner is not exactly as claimed, these claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang. 40 USPQ2d 1685, 1688(Fed. Cir. 1996) (claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious).
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David Vu whose telephone number is (571) 272-1798. The examiner can normally be reached on Monday-Friday from 8:00am to 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempt to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke H can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DAVID VU/
Primary Examiner, Art Unit 2818
Prosecution Insights