DETAILED ACTION
Allowable Subject Matter
Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter.
Claim 6 recites in part “further comprising a metal layer that is electrically connected to the N-type layer by directly contacting the N-type layer, the metal layer is disposed on a second surface that is opposite to the first surface of the substrate”.
To elaborate briefly on the above, claim 3 (on which claim 6 depends) already requires a separate “a metal layer electrically connected with the N-type layer and disposed on a first surface of the substrate, wherein the metal layer and the N-type layer directly contact each other”. Hence, there are 2 separate “metal layers” on two opposite surfaces of substrate that both have to be in direct contact with the N-type layer. Examiner would have no problem finding a reference that has one such connection as required by claim 6. However, combining such reference on top of already present reference of Kim (which teaches the first of the two “a metal layer”) would be “hindsight reconstruction”. The only thing that would do is a reference that has “direct contact” connection on both surfaces in a single reference, with two separate “a metal layers”. Since Examiner has no such reference, claim 6 is indicated as allowable subject matter.
Small Additional Note: two separate “a metal layer” (one in claim 3, and one in claim 6) may merit a 112, 2nd indefinite rejection. Please fix in the next submission.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 8-12, 14 & 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by (US-2020/0168648) by Kudoh et al (“Kudoh”).
Regarding claim 1, Kudoh discloses in FIG. 3 and related text, e.g., an image sensor comprising
a substrate (12) including a plurality of pixel areas (71 and other regions that are not part of DTI (see below); FIG. 1, 2 for plurality) and a pixel isolation structure (72) isolating each of the plurality of pixel areas (see FIG. 4),
wherein the pixel isolation structure comprises:
a deep trench isolation (DTI) area (81/82) disposed between two adjacent pixel areas among the plurality of pixel areas;
an N-type layer (73; stated as P-type in par. 92; par. 226 teaches that every region can be of opposite type instead; hence, N-type) disposed in contact with the DTI area (see FIG. 3) and positioned between the DTI area and the plurality of pixel areas (see FIG. 3); and
a P-type layer (74; P-type, per par. 226) disposed in contact with the plurality of pixel areas (74 is in contact with all of them in each pixel) and positioned between the DTI area and the plurality of pixel areas (see FIG. 3).
Regarding claim 2, Kudoh discloses in FIG. 3 and related text, e.g., wherein the DTI area (81/82) includes an oxide-based material (see par. 91; 81 is SiO2; 82 is HfO, thus both meeting limitations).
Regarding the process limitations of "disposed in a deep trench defined in the substrate", these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. To elaborate briefly, the trench is filled in final device; there is no such thing as trench in final device; hence, how the layers 81/82 were formed (by filling trench or not) is not relevant to patentability of overall device.
Note that a "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in "product by process" claims or not. Note that the applicant has the burden of proof in such cases, as the above case law makes clear.
Regarding claim 8, Kudoh discloses in FIG. 3 and related text, e.g., wherein: each of the plurality of pixel areas comprises a photoelectric conversion area (71) generating a charge according to incident light; and
the P-type layer comprises a PD well (this may merit a 112, 2nd indefinite: layer is a layer and a well is a well; for the purposes of rejection, the very bottom portion of 74 (thin horizontal slice) is PD well [Wingdings font/0xE0] it is part of 74 (hence, “P-type layer comprises a PD well”) and has “well” shape (short-ish horizontal layer)) that extends in a direction that is orthogonal to a depth direction of the substrate (it is horizontal as defined; hence, “orthogonal to a depth direction”) and is positioned between the photoelectric conversion area in each pixel area and a first surface of the substrate (bottom surface in an instant case).
Regarding claim 9, Kudoh discloses in FIG. 3 and related text, e.g., wherein each of the plurality of pixel areas further comprises:
a floating diffusion (92 (43)); and
a transfer gate (42G) that provides an on-voltage for forming a channel between the photoelectric conversion area and the floating diffusion to the photoelectric conversion area (by definition; that is the very definition of what transfer gates do in pixels; also, see FIG. 2 for circuit diagram),
wherein the PD well is not disposed in a first area where a channel between the floating diffusion and the photoelectric conversion area is disposed and a second area where the transfer gate is disposed (see FIG. 3; the cited regions are at the top of FIG. 3; the PD well is at the bottom of FIG. 3; thus meeting limitations).
Regarding claim 10, Kudoh discloses in FIG. 3 and related text, e.g., image sensor comprising a substrate including a plurality of pixel areas and a pixel isolation structure isolating each of the plurality of pixel areas (as discussed in claim 1 and shown in FIGs. 1-4), wherein the pixel isolation structure comprises:
a first P-type layer surrounding a first pixel area among the plurality of pixel areas (see claim 1 and FIG. 4);
a second P-type layer surrounding a second pixel area adjacent to the first pixel area in a first direction among the plurality of pixel areas (see claim 1 and FIGs. 1 & 4);
a first N-type layer and a second N-type layer surrounding the first and second P-type layers, respectively (again, see claim 1 and FIGs. 1 & 4); and
a DTI area that is disposed between the first N-type layer and the second N-type layer (see claim 1 and FIGs. 1 & 4; it is a repeating pattern).
Regarding claim 11, Kudoh discloses in FIG. 3 and related text, e.g., wherein the DTI area includes an oxide-based material disposed in a deep trench defined in the substrate (see claim 2).
Regarding claim 12, Kudoh discloses in FIG. 3 and related text, e.g., further comprising: a third pixel area disposed adjacent to the first pixel area in a second direction crossing the first direction (see FIG. 1; it shows that pixels are in array; see FIG. 4; the pattern repeats);
a fourth pixel area disposed adjacent to the second pixel area in the second direction (same as above);
a metal layer (61) disposed adjacent to a corner area of each of the first pixel area, the second pixel area, the third pixel area and the fourth pixel area (it is a grid that is aligned with 72; hence, it appears at corners too, as claim requires), and is electrically connected to the first N-type layer and the second N-type layer (everything is a single electrical circuit; in the instant case, layer 81 & 61 form two plates of a capacitor, with 63 in-between; for example).
Regarding claim 14, Kudoh discloses in FIG. 3 and related text, e.g., further comprising: a third P-type layer surrounding the third pixel area (see FIGs. 1 & 4 and claim 12); a fourth P-type layer surrounding the fourth pixel area (see FIGs. 1 & 4 and claims 1 & 12); and
a third N-type layer and a fourth N-type layer that surround the third and fourth P-type layers, respectively (see FIGs. 1 & 4 and claims 1 & 12), wherein the metal layer is electrically connected to the third N-type layer and the fourth N-type layer (61 is a grid that follows 72; it is electrically connected to all of them as a capacitor).
Regarding claim 17, Kudoh discloses in FIG. 3 and related text, e.g., further comprising a light transmission layer (62) disposed on a first surface of the substrate (bottom surface, in the instant case).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-5, 7, 13 & 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over (US-2020/0168648) by Kudoh et al (“Kudoh”) in view of (US-2020/0227449) by Kim et al (“Kim”).
Regarding claim 3, Kudoh discloses in cited figures and related text, e.g., substantially the entire claim structure, as recited in above claims, except “a metal layer electrically connected with the N-type layer and disposed on a first surface of the substrate, wherein the metal layer and the N-type layer directly contact each other”.
Kim discloses in FIG. 4 and related text, e.g., “a metal layer (CL) electrically connected with DTI area (150), regions next to DTI (105) and substrate (100) and disposed on a first surface of the substrate (bottom), wherein the metal layer and DTI area (150), regions next to DTI (105) and substrate (100) directly contact each other”.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Kudoh with “a metal layer (CL) electrically connected with DTI area (150), regions next to DTI (105) and substrate (100) and disposed on a first surface of the substrate (bottom; it is on the “first surface”, because it is in direct contact with it), wherein the metal layer and DTI area (150), regions next to DTI (105) and substrate (100) directly contact each other” as taught by Kim, in order to connect the CL line to negative voltage and thus improve dark current property of the image sensor (par. 63).
When these specific teachings of Kim are applied to device of Kudoh it will result in “a metal layer electrically connected with the N-type layer and disposed on a first surface of the substrate, wherein the metal layer and the N-type layer directly contact each other”, since Kim’s CL is very wide; it contacts all of Kim’s 150 DTI and also layer 105 that is in direct contact with DTI; thus it would contact the N-type layer 73 of Kudoh, in combined device, since Kudoh’s FIG. 3, P-type layer 73 is in direct contact with DTI 72; thus meeting limitations.
Regarding claim 4, the combined device of Kudoh and Kim disclose in cited figures and related text, e.g., wherein the N-type layer comprises a contact area that is arranged to extend to the first surface of the substrate (Kudoh’s N-type layer 73 is right on the first surface of substrate) and directly contacts a side surface of the metal layer (in combined device; as was discussed above, regarding claim 3).
Regarding claim 5, the combined device of Kudoh and Kim disclose in cited figures and related text, e.g., wherein: a first side of the N-type layer comprises an area directly contacting the DTI area (Kudoh’s 73 directly contacts 72 on one side) and an opposite second side of the N-type layer comprises an area directly contacting the P-type layer (Kudoh’s 73 directly contacts 74 on the opposite side); and
the N-type layer comprises a contact area that is electrically connected to the metal layer by directly contacting a portion of a side surface of the metal layer (as explained in claim 4).
Regarding claim 7, the combined device of Kudoh and Kim disclose in cited figures and related text, e.g., further comprising a wiring layer (various 212/213/BCP/vias/etc. in FIG. 4 of Kim) disposed on the first surface of the substrate (various 212/213/BCP/vias/etc. are above the bottom surface of 100; hence, “on”), wherein the wiring layer comprises at least one contact and at least one wire (any of the various 212/213/BCP/vias/etc., read on contact and wire)that are connected to the metal layer (the whole chip is one electric circuit (see FIG. 1 for example); hence, everything is electrically connected to everything else in one circuit; thus meeting limitations), and the metal layer is connected to a predetermined voltage source (as was discussed in claim 3) through the at least one contact and the at least one wire (CL is connected to charge pump (par. 63), which by definition contains “wires” and “contacts”, thus meeting limitations).
Regarding claim 13, the combined device of Kudoh and Kim disclose in cited figures and related text, e.g., wherein: a portion of the first N-type layer is exposed in a first surface of the substrate and directly contacts the metal layer (as was discussed in claim 3); and a portion of the second N-type layer is exposed in the first surface of the substrate and directly contacts the metal layer (FIG. 4 of Kim shows a repeating pattern; hence, there are any number of “second N-type layers” that have proper CL connection and thus meet limitations).
Regarding claim 15, the combined device of Kudoh and Kim disclose in cited figures and related text, e.g., wherein: a portion of the third N-type layer is exposed in a first surface of the substrate and directly contacts the metal layer; and a portion of the fourth N-type layer is exposed in the first surface of the substrate and directly contacts the metal layer (same logic applies as in claim 13).
Regarding claim 16, the combined device of Kudoh and Kim disclose in cited figures and related text, e.g., further comprising a wiring layer disposed on a first surface of the substrate, wherein the wiring layer comprises at least one contact and at least one wire connected to the metal layer, and the metal layer is connected to a predetermined voltage source through the at least one contact and the at least one wire (see claim 7; same logic applies).
Conclusion
Additional references (if any) are cited on the PTO-892 as disclosing similar features to those of the instant invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alexander Belousov whose telephone number is (571)-272-3167. The examiner can normally be reached on 10 am-4 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Alexander Belousov/Patent Examiner, Art Unit 2894
09/21/26
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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