DETAILED ACTION
This Action is responsive to the communication filed on 06/29/2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 11 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Claim 11, which depends from Claim 10, recites the limitation: “wherein metal traces exposed from the window form the identification structure.” Claim 10 recites the claimed elements of metal traces and identification structure formed on the substrate. However, it is unclear how the exposed metal traces form the identification structure as is recited in Claim 11.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-10, 12, 14-16, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Pfeuffer (US 2021/0343683), in view of Gu (US 2020/0083420).
Regarding claim 1, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) discloses a LED display unit group, comprising:
a substrate 11 and an electronic device 2 (Para 0039, Para 0041, Para 0063);
wherein, the substrate 11 comprises a pad layer 61, 62, 7, a layer 13 and an identification structure 3B, the pad layer 61, 62, 7 is disposed on a first surface of a side e.g., top surface side of 11 of the substrate 11 adjacent to the electronic device 2, the pad layer 61, 62, 7 comprises pad regions 61, 62 and a non-pad region 7, each of the pad regions 61, 62 comprises a plurality of pads 61, 62, and the non-pad region 7 comprises metal traces 7, and the layer 13 is disposed on a side of the pad layer 61, 62, 7 facing away from the substrate 11 (Para 0041-Para 0042, Para 0050-Para 0052);
each pad 61, 62 of the plurality of pads 61, 62 is configured to secure the electronic device 2 and is electrically connected to the electronic device 2 (Para 0039, Para 0051);
the metal traces 7 are connected to the plurality of pads 61, 62, respectively, and the metal traces 7 are configured to connect the plurality of pads 61, 62 via the metal traces 7 (Para 0051-Para 0052); and
an orthographic projection e.g., projection of shape onto the substrate of the identification structure 3B on the substrate 11 is partially overlapped or not overlapped with an orthographic projection e.g., projection of shape onto the substrate of the pad regions 61, 62 on the substrate 11, the identification structure 3B is configured to identify at least one of: a position of the electronic device 2 on the substrate 11, a poor state of the plurality of pads, or a poor state of the metal traces (Para 0044, Para 0048-Para 0049).
Although Pfeuffer shows substantial features of the claimed invention, Pfeuffer fails to expressly teach an ink layer.
Gu (see, e.g., FIG. 5) teaches an ink layer 501, e.g., white ink for the purpose of implementing an insulating material for protecting and sealing metal wires (Para 0058, Para 0059).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the layer in Pfeuffer to be an ink layer as described in Gu for the purpose of implementing an insulating material for protecting and sealing metal wires (Para 0058).
Regarding claim 2, the combination of Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) / Gu (see, e.g., FIG. 5) teaches the LED display unit group of claim 1, wherein the ink layer 13 (as taught by Pfeuffer, material modified by Gu) comprises a window e.g., space within 13 occupied by 3B (as taught by Pfeuffer), and the identification structure 3B (as taught by Pfeuffer) is located within the window e.g., space within 13 occupied by 3B (as taught by Pfeuffer).
Regarding claim 3, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the LED display unit group of claim 2, wherein the identification structure 3B is a metal identification 3B, the identification structure 3B is located on a side of the metal traces 7 facing away from the substrate 11 (Para 0050, Para 0054).
Regarding claim 5, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the LED display unit group of claim 1, wherein a shape of the identification structure 3B comprises at least one of a triangle, a circle, an ellipse, or a rectangle (Para 0049).
Regarding claim 6, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the LED display unit group of claim 1, wherein at least two of the pad regions 61, 62 are provided with a corresponding one identification structure 3B; and the at least two of the pad regions 61, 62 form a first region e.g., two portions of 61, 62, and the identification structure 3B is disposed at an intermediate position e.g., between two portions of 61, 62 or an edge position of the first region e.g., two portions of 61, 62.
Regarding claim 7, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the LED display unit group of claim 1, wherein the pad layer 61, 62, 7 is symmetrical with respect to a symmetry axis e.g., symmetry axis between center two, adjacent 61, 62, 7 in left-right directions, wherein the symmetry axis e.g., symmetry axis between center two, adjacent 61, 62, 7 is a central axis e.g., central axis of 11 of the substrate 11 in a preset direction.
Regarding claim 8, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the LED display unit group of claim 2, wherein the identification structure 3B is a metal identification 3B, the identification structure 3B is disposed on a same layer e.g., both 3B and 7 disposed on layer 12 as the metal traces 7 (Para 0050, Para 0054).
Regarding claim 9, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the LED display unit group of claim 2, wherein a plurality of identification structures 3B are provided, each of the plurality of identification structures 3B is a metal identification 3B, one of the plurality of identification structures 3B (left) is located on a side e.g., top, right side of the metal traces 7 facing away from the substrate 11, and one of the plurality of identification structures 3B (right) is disposed on a same layer e.g., both 3B (right) and 7 disposed on layer 12 as the metal traces 7 (Para 0050, Para 0054).
Regarding claim 10, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) discloses a manufacturing method of a LED display unit group, comprising:
providing a substrate 11 (Para 0041); and
preparing a pad layer 61, 62, 7, a layer 13 and an identification structure 3B on a side of the substrate 11 (Para 0041-Para 0042, Para 0050-Para 0052);
wherein, the pad layer 61, 62, 7 is disposed on a first surface e.g., top surface side of 11 of a side of the substrate 11 adjacent to an electronic device 2, the pad layer 61, 62, 7 comprises pad regions 61, 62 and a non-pad region 7, each of the pad regions 61, 62 comprises a plurality of pads 61, 62, and the non-pad region 7 comprises metal traces 7 (Para 0041-Para 0042, Para 0051-Para 0052); and
the layer 13 is disposed on a side of the pad layer 61, 62, 7 facing away from the substrate 11 (Para 0041-Para 0042, Para 0052);
each pad 61, 62 of the plurality of pads 61, 62 is configured to secure the electronic device 2 and is electrically connected to the electronic device 2 (Para 0039, Para 0051);
the metal traces 7 are connected to the plurality of pads 61, 62 respectively, and the metal traces 7 are configured to connect the plurality of pads 61, 62 via the metal traces 7 (Para 0051-Para 0052); and
an orthographic projection e.g., projection of shape onto the substrate of the identification structure 3B on the substrate 11 is partially overlapped or not overlapped with an orthographic projection e.g., projection of shape onto the substrate of the pad regions 61, 62 on the substrate 11, the identification structure 3B is configured to identify at least one of: a position of the electronic device 2 on the substrate 11, a poor state of the plurality of pads, or a poor state of the metal traces (Para 0044, Para 0048-Para 0049).
Although Pfeuffer shows substantial features of the claimed invention, Pfeuffer fails to expressly teach an ink layer.
Gu (see, e.g., FIG. 5) teaches an ink layer 501, e.g., white ink for the purpose of implementing an insulating material for protecting and sealing metal wires (Para 0058, Para 0059).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the layer in Pfeuffer to be an ink layer as described in Gu for the purpose of implementing an insulating material for protecting and sealing metal wires (Para 0058).
Regarding claim 12, the combination of Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) / Gu (see, e.g., FIG. 5) teaches the manufacturing method of a LED display unit group of claim 10, wherein manufacturing the pad layer 61, 62, 7 (as taught by Pfeuffer), the ink layer 13 (as taught by Pfeuffer, material modified by Gu) and the identification structure 3B (as taught by Pfeuffer) on the side e.g., top side of the substrate 11 (as taught by Pfeuffer) comprises: preparing, on a side e.g., top side of the substrate 11 (as taught by Pfeuffer), the pad layer 61, 62, 7 (as taught by Pfeuffer) and the identification structure 3B (as taught by Pfeuffer) on a same layer e.g., both 3B (right) and 7 disposed on layer 12 (as taught by Pfeuffer), wherein the identification structure 3B (as taught by Pfeuffer) is a metal identification 3B (as taught by Pfeuffer) (Para 0041-Para 0042, Para 0050-Para 0052, Para 0054); preparing the ink layer 13 (as taught by Pfeuffer, material modified by Gu) on a side e.g., top side of the pad layer 61, 62, 7 facing away from the substrate 11 (as taught by Pfeuffer) (Para 0041-Para 0042, Para 0052); and windowing a window e.g., space within 13 occupied by 3B (as taught by Pfeuffer) at a position of the ink layer 13 (as taught by Pfeuffer, material modified by Gu) corresponding to the metal identification 3B (as taught by Pfeuffer), wherein the identification structure 3B (as taught by Pfeuffer) is located within the window e.g., space within 13 occupied by 3B (as taught by Pfeuffer).
Regarding claim 14, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) discloses a display panel, comprising
a LED display unit group 2, 11 (Para 0039, Para 0041, Para 0063);
wherein the LED display unit group 2, 11 comprises a substrate 11 and an electronic device 2 (Para 0039, Para 0041, Para 0063);
wherein, the substrate 11 comprises a pad layer 61, 62, 7, a layer 13 and an identification structure 3B, the pad layer 61, 62, 7 is disposed on a first surface of a side e.g., top surface side of 11 of the substrate 11 adjacent to the electronic device 2, the pad layer 61, 62, 7 comprises pad regions 61, 62 and a non-pad region 7, each of the pad regions 61, 62 comprises a plurality of pads 61, 62, and the non-pad region 7 comprises metal traces 7, and the layer 13 is disposed on a side e.g., top side of the pad layer 61, 62, 7 facing away from the substrate 11 (Para 0041-Para 0042, Para 0050-Para 0052);
each pad 61, 62 of the plurality of pads 61, 62 is configured to secure the electronic device 2 and is electrically connected to the electronic device 2 (Para 0039, Para 0051);
the metal traces 7 are connected to the plurality of pads 61, 62, respectively, and the metal traces 7 are configured to connect the plurality of pads 61, 62 via the metal traces 7 (Para 0051-Para 0052); and
an orthographic projection e.g., projection of shape onto the substrate of the identification structure 3B on the substrate 11 is partially overlapped or not overlapped with an orthographic projection e.g., projection of shape onto the substrate of the pad regions 61, 62 on the substrate 11, the identification structure 3B is configured to identify at least one of: a position of the electronic device 2 on the substrate 11, a poor state of the plurality of pads, or a poor state of the metal traces (Para 0044, Para 0048-Para 0049).
Although Pfeuffer shows substantial features of the claimed invention, Pfeuffer fails to expressly teach an ink layer.
Gu (see, e.g., FIG. 5) teaches an ink layer 501, e.g., white ink for the purpose of implementing an insulating material for protecting and sealing metal wires (Para 0058, Para 0059).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the layer in Pfeuffer to be an ink layer as described in Gu for the purpose of implementing an insulating material for protecting and sealing metal wires (Para 0058).
Regarding claim 15, the combination of Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) / Gu (see, e.g., FIG. 5) teaches the display panel of claim 14, wherein the ink layer 13 (as taught by Pfeuffer, material modified by Gu) comprises a window e.g., space within 13 occupied by 3B (as taught by Pfeuffer), and the identification structure 3B (as taught by Pfeuffer) is located within the window e.g., space within 13 occupied by 3B (as taught by Pfeuffer).
Regarding claim 16, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the display panel of claim 15, wherein the identification structure 3B is a metal identification 3B, the identification structure 3B is located on a side of the metal traces 7 facing away from the substrate 11 (Para 0050, Para 0054).
Regarding claim 18, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the display panel of claim 14, wherein a shape of the identification structure 3B comprises at least one of a triangle, a circle, an ellipse, or a rectangle (Para 0049).
Regarding claim 19, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the display panel of claim 14, wherein at least two of the pad regions 61, 62 are provided with a corresponding one identification structure 3B; and the at least two of the pad regions 61, 62 form a first region e.g., two portions of 61, 62, and the identification structure 3B is disposed at an intermediate position e.g., between two portions of 61, 62 or an edge position of the first region e.g., two portions of 61, 62.
Regarding claim 20, Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) teaches the display panel of claim 14, wherein the pad layer 61, 62, 7 is symmetrical with respect to a symmetry axis e.g., symmetry axis between center two, adjacent 61, 62, 7 in left-right directions, wherein the symmetry axis e.g., symmetry axis between center two, adjacent 61, 62, 7 is a central axis e.g., central axis of 11 of the substrate 11 in a preset direction.
Claims 4, 13, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Pfeuffer (US 2021/0343683), in view of Gu (US 2020/0083420), and further in view of Lee (US 2020/0381660).
Regarding claim 4, although Pfeuffer/Gu show substantial features of the claimed invention, Pfeuffer/Gu fail to expressly teach LED display unit group of claim 1, wherein the identification structure is an ink identification, and the ink identification is disposed on a surface of a side of the ink layer facing away from the substrate. Pfeuffer does, however, teach that the identification structure 3B is a metal identification structure 3B (Para 0050, Para 0054).
Lee (see, e.g., FIG. 4), on the other hand, teaches that the identification structure AL2 may be metal or ink (Para 0193).
The combination of Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) / Gu (see, e.g., FIG. 5) / Lee (see, e.g., FIG. 4) teaches that the ink identification 3B (as taught by Pfeuffer, material modified by Lee) is disposed on a surface of a side of the ink layer 13 (as taught by Pfeuffer, material modified by Gu) facing away from the substrate 11 (as taught by Pfeuffer).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either metal or ink in Pfeuffer/Gu’s device because these were recognized in the semiconductor art for their use as materials for identification structures, as taught by Lee, and selecting between known equivalents would be within the level of ordinary skill in the art.
Regarding claim 13, the combination of Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) / Gu (see, e.g., FIG. 5) teaches the manufacturing method of a LED display unit group of claim 10, wherein preparing the pad layer 61, 62, 7 (as taught by Pfeuffer), the ink layer 13 (as taught by Pfeuffer, material modified by Gu) and the identification structure 3B (as taught by Pfeuffer) on the side e.g., top side of the substrate 11 (as taught by Pfeuffer) comprises: preparing the pad layer 61, 62, 7 (as taught by Pfeuffer) on a side e.g., top side of the substrate 11 (as taught by Pfeuffer) (Para 0041-Para 0042, Para 0050-Para 0052); preparing the ink layer 13 (as taught by Pfeuffer, material modified by Gu) on a side of the pad layer 61, 62, 7 (as taught by Pfeuffer) facing away from the substrate 11 (Para 0041-Para 0042, Para 0052); and preparing the identification structure 3B (as taught by Pfeuffer) on a side of the ink layer 13 (as taught by Pfeuffer, material modified by Gu) facing away from the substrate 11 (as taught by Pfeuffer) (Para 0044, Para 0053),
Although Pfeuffer/Gu show substantial features of the claimed invention, Pfeuffer/Gu fail to expressly teach the identification structure is an ink identification. Pfeuffer does, however, teach that the identification structure 3B is a metal identification structure 3B (Para 0050, Para 0054).
Lee (see, e.g., FIG. 4), on the other hand, teaches that the identification structure AL2 may be metal or ink (Para 0193).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either metal or ink in Pfeuffer/Gu’s device because these were recognized in the semiconductor art for their use as materials for identification structures, as taught by Lee, and selecting between known equivalents would be within the level of ordinary skill in the art.
Regarding claim 17, although Pfeuffer/Gu show substantial features of the claimed invention, Pfeuffer/Gu fail to expressly teach the display panel of claim 14, wherein the identification structure is an ink identification, and the ink identification is disposed on a surface of a side of the ink layer facing away from the substrate. Pfeuffer does, however, teach that the identification structure 3B is a metal identification structure 3B (Para 0050, Para 0054).
Lee (see, e.g., FIG. 4), on the other hand, teaches that the identification structure AL2 may be metal or ink (Para 0193).
The combination of Pfeuffer (see, e.g., FIG. 1A, FIG. 1F) / Gu (see, e.g., FIG. 5) / Lee (see, e.g., FIG. 4) teaches that the ink identification 3B (as taught by Pfeuffer, material modified by Lee) is disposed on a surface of a side of the ink layer 13 (as taught by Pfeuffer, material modified by Gu) facing away from the substrate 11 (as taught by Pfeuffer).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either metal or ink in Pfeuffer/Gu’s device because these were recognized in the semiconductor art for their use as materials for identification structures, as taught by Lee, and selecting between known equivalents would be within the level of ordinary skill in the art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTONIO CRITE whose telephone number is (571) 270-5267. The examiner can normally be reached Monday - Friday, 10:00 am - 6:30 pm.
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/ANTONIO B CRITE/ Primary Examiner, Art Unit 2817