Prosecution Insights
Last updated: April 19, 2026
Application No. 18/216,314

HARDWARE-BASED ACCELERATOR SIGNALING

Non-Final OA §102§112
Filed
Jun 29, 2023
Examiner
WU, QING YUAN
Art Unit
2199
Tech Center
2100 — Computer Architecture & Software
Assignee
Xilinx, Inc.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
3y 1m
To Grant
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
687 granted / 758 resolved
+35.6% vs TC avg
Moderate +11% lift
Without
With
+11.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
17 currently pending
Career history
775
Total Applications
across all art units

Statute-Specific Performance

§101
17.8%
-22.2% vs TC avg
§103
23.8%
-16.2% vs TC avg
§102
20.7%
-19.3% vs TC avg
§112
26.0%
-14.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 758 resolved cases

Office Action

§102 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1-20 are presented for examination. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the inter-process signaling within inter-accelerator communication (i.e. inter-process signaling between different accelerators) claimed or implied in claims 4-6, 11 and 15-17 must be shown or the feature(s) canceled from the claim(s) (Note: Inter-accelerator communication was described in Fig. 3 and inter-process signaling was separately described in Fig. 4, but the combination was not shown in any of the submitted figures). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 11 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention. Applicant’s specification failed to disclose a “second process…associated with a second accelerator ” receiving a signal originating from a first process in which the signal is “associated with a first accelerator”. More specifically, applicant’s specification at most disclosed the inter-process signaling between processes of the same accelerator via a HW Signal Monitor allowing direct communication between processes that was otherwise perform by threads of a CPU that instantiated the processes such that direct communication via signal is not possible [see Fig. 4 and corresponding text]. As to claims 4-6 and 15-17, these claims are rejected for similar reason pertaining to inter-process signaling within or in conjunction with inter-accelerator communication as claim 11 above. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. The following lack antecedent basis: Claim 11– "the processor”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US PG Pub. 2012/0191920 to Aho et al. (hereafter Aho). Aho was cited in Applicant’s IDS filed on 8/20/24. As to claim 1, Aho teaches the invention as claimed including a method comprising: based on a signal issued by a first accelerator, asynchronously notifying, by a hardware signal monitor, a first process of the signal [SLMPM monitoring communication between host computer and accelerator via shared memory, paragraph 77, lines 1-6; data/packet written by accelerator to the shared memory in the host computer, paragraphs 24-25; accelerator written to shared memory as a mean of communicating to a host computer, paragraph 32, lines 1-11; paragraph 68; data or value used by application programs of accelerator and/or host, paragraph 56]. As to claim 2, Aho teaches the invention as claimed including wherein asynchronously notifying comprises: executing, at the hardware signal monitor, a set of operations based on the signal [monitoring data communications between accelerator and host, paragraph 42; data or value used by application programs of accelerator and/or host, paragraph 56; collectively carrying out operations, paragraphs 54-55]. As to claim 3, Aho teaches the invention as claimed including wherein the set of operations includes one or more of a memory transfer of one or more bytes of data, an atomic memory operation, an enqueuing of a first packet, a dequeuing of a second packet, a task dispatch operation, a set of signal operations, and an instruction to be executed by a processor [shared memory access and operations carried out, paragraphs 24-25 and 54]. As to claim 4, Aho teaches the invention as claimed including wherein the set of operations includes the hardware signal monitor sending a task to a second accelerator [paragraph 54]. As to claim 5, Aho teaches the invention as claimed including wherein sending the task comprises the hardware signal monitor sending the task based on a value generated by one of a plurality of accelerators [shared memory access and operations carried out, paragraphs 24-25, 42-43 and 54]. As to claim 6, Aho teaches the invention as claimed including wherein sending the task comprises enqueuing the task at a work queue of the second accelerator [shared memory access and operations carried out, paragraphs 24-25, 42-43 and 54]. As to claim 7, Aho teaches the invention as claimed including wherein the set of operations is programmable [communication according to a protocol and invocation of performance of operations that are carried out automatically or “programmed”, paragraphs 46 and 54; paragraphs 39-42]. As to claim 8, Aho teaches the invention as claimed including wherein the signal is issued by a second process executing at the first accelerator, the second process independent of the first process [transmission of data between shared memory of host computer and accelerator(s) via respective/associated application programs, paragraph 45]. As to claim 9, Aho teaches the invention as claimed including wherein the signal is issued by the first accelerator in response to a write operation to a specified memory address [paragraphs 25 and 36]. As to claims 10-11, these claims are rejected for the same reason as claims 1, 4 and 8 above. As to claims 12-20, Aho teaches the asynchronous notifying of a signal as claimed in claims 1-9, therefore Aho teaches the system for implementing the method. Any inquiry concerning this communication or earlier communications from the examiner should be directed to QING YUAN WU whose telephone number is (571)272-3776. The examiner can normally be reached on M-F 9AM-6PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lewis Bullock can be reached on 571-272-3759. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /QING YUAN WU/Primary Examiner, Art Unit 2199
Read full office action

Prosecution Timeline

Jun 29, 2023
Application Filed
May 02, 2024
Response after Non-Final Action
Feb 09, 2026
Non-Final Rejection — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+11.0%)
3y 1m
Median Time to Grant
Low
PTA Risk
Based on 758 resolved cases by this examiner. Grant probability derived from career allow rate.

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