Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are pending in the application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US PG Pub. 2012/0191920 to Aho et al. (hereafter Aho) in view of US PG Pub. 2018/0150299 to Balle et al. (hereafter Balle).
Aho was cited in Applicant’s IDS filed on 8/20/24.
As to claim 1, Aho teaches the invention substantially as claimed including a method comprising:
based on a signal issued by a first accelerator of a plurality of accelerators of a processing system, asynchronously and directly notifying, by a hardware signal monitor, a first process of the signal [SLMPM monitoring communication between host computer and accelerator via shared memory in a system having more than one accelerators, paragraph 77, lines 1-6; paragraph 29; accelerators 104-105; data/packet written by accelerator to the shared memory in the host computer, paragraphs 24-25; accelerator written to shared memory as a mean of communicating to a host computer, paragraph 32, lines 1-11; paragraph 68; data or value used by application programs of accelerator and/or host, paragraph 56].
Aho does not specifically teach the hardware signal monitor configured to provide communication between accelerators of the plurality of accelerators of the processing system. However, Balle teaches the use of shared memory and/or inter-accelerator communication interface to provide communication between accelerators of a plurality of accelerators [Fig. 12 and corresponding text].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combine Aho and Balle because they are in the same field of endeavor of inter-processor/interprocess communication via a shared interface/storage and to extend the applicability of Aho to communication among different types of processing units.
As to claim 2, Aho as modified teaches the invention substantially as claimed including wherein directly and asynchronously notifying comprises: executing, at the hardware signal monitor, a set of operations based on the signal [monitoring data communications between accelerator and host, paragraph 42; data or value used by application programs of accelerator and/or host, paragraph 56; collectively carrying out operations, paragraphs 54-55].
As to claim 3, Aho as modified teaches the invention substantially as claimed including wherein the set of operations includes one or more of a memory transfer of one or more bytes of data, an atomic memory operation, an enqueuing of a first packet, a dequeuing of a second packet, a task dispatch operation, a set of signal operations, and an instruction to be executed by a processor [shared memory access and operations carried out, paragraphs 24-25 and 54].
As to claim 4, Aho as modified teaches the invention substantially as claimed including wherein the set of operations includes the hardware signal monitor directly sending a task to a second accelerator of the plurality of accelerators [paragraph 54].
As to claim 5, Aho as modified teaches the invention substantially as claimed including wherein directly sending the task comprises the hardware signal monitor sending the task based on a value generated by an accelerator of the plurality of accelerators [shared memory access and operations carried out, paragraphs 24-25, 42-43 and 54].
As to claim 6, Aho as modified teaches the invention substantially as claimed including wherein directly sending the task comprises enqueuing the task at a work queue of the second accelerator [shared memory access and operations carried out, paragraphs 24-25, 42-43 and 54].
As to claim 7, Aho as modified teaches the invention substantially as claimed including wherein the set of operations is programmable [communication according to a protocol and invocation of performance of operations that are carried out automatically or “programmed”, paragraphs 46 and 54; paragraphs 39-42].
As to claim 8, Aho as modified teaches the invention substantially as claimed including wherein the signal is issued by a second process executing at the first accelerator, the second process independent of the first process [transmission of data between shared memory of host computer and accelerator(s) via respective/associated application programs, paragraph 45].
As to claim 9, Aho as modified teaches the invention substantially as claimed including wherein the signal is issued by the first accelerator in response to a write operation to a specified memory address [paragraphs 25 and 36].
As to claims 10-11, these claims are rejected for the same reason as claims 1, 4 and 8 above.
As to claims 12-20, Aho teaches the asynchronous notifying of a signal as claimed in claims 1-9, therefore Aho teaches the system for implementing the method.
Response to Arguments
Applicant's arguments filed 6/16/26 have been fully considered, objection(s)/rejection(s) not explicitly addressed have been withdrawn.
In the remarks, Applicant argued in substance that:
Aho does not disclose or suggest a signal monitor that provides direct notification to processes or accelerators.
Aho is silent as to the host providing any mechanism for direct communication between accelerator units.
Examiner respectfully traversed Applicant's remarks:
As to point (a), the examiner respectfully disagrees and submits in light of applicant’s specification the limitation “direct” is broadly interpreted to the extent that it does not involve, bypass or reduce the burden of the CPU in facilitating the communication [specification, paragraphs 29 and 31] since Aho teaches data/packet written by accelerator to the shared memory in the host computer asynchronously with respect to reading by the host [paragraphs 24-25] as a mean of communicating to a host computer [paragraph 32, lines 1-11; paragraph 68] such that Aho’s implementation of a SLMPM via DMA protocol in carrying out a shared memory transfer between accelerator and host computer that bypasses the CPU [paragraphs 35-37] clearly satisfy the limitations as claimed. Therefore applicant’s argument is not persuasive.
As to point (b), applicant’s argument is moot in view of the new ground of rejection necessitated by applicant’s amendment.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to QING YUAN WU whose telephone number is (571)272-3776. The examiner can normally be reached on M-F 9AM-6PM EST.
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/QING YUAN WU/Primary Examiner, Art Unit 2199