Prosecution Insights
Prosecution Insights
35 pending office actions • 31 art units • 33 examiners • 0 of 35 (0%) have an AI response strategy ready • 115 patents granted in the last 365 days
Based on the USPTO statutory response window for each pending office action. 33 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 33 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 only | 2 (6%) |
| §103 only | 23 (66%) |
| §102 only | 7 (20%) |
| §112 only | 1 (3%) |
| No statute on record | 2 (6%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| TAT, BINH C | 2 | 87.3% | +14.1% |
| GARBOWSKI, LEIGH M | 2 | 87.8% | +10.4% |
| PHAN, RAYMOND NGAN | 1 | 93.8% | -3.9% |
| JUNG, ANDREW J | 1 | 57.6% | +37.3% |
| NOAMAN, BASSAM A | 1 | 79.0% | +45.8% |
| LY, CHEYNE D | 1 | 78.7% | +10.8% |
| JACOB, AJITH | 1 | 79.0% | +4.2% |
| NGUYEN, VIET Q | 1 | 95.0% | +3.5% |
| MCNALLY, MICHAEL S | 1 | 89.7% | +8.7% |
| YIMER, GETENTE A | 1 | 88.0% | +9.6% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 6 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18679366 | DMA STRATEGIES FOR AIE CONTROL AND CONFIGURATION | YIMER, GETENTE A | 58d overdue |
| 18128368 | TWO BY TWO LOGIC CHIPLET | GARBOWSKI, LEIGH M | 43d overdue |
| 18134497 | ALIGNING MULTI-CHIP DEVICES | GARBOWSKI, LEIGH M | 16d overdue |
| 18313945 | HARDWARE EVENT TRACE WINDOWING FOR A DATA PROCESSING ARRAY | TAT, BINH C | 6d |
| 18193197 | CONTROL SET OPTIMIZATION FOR IMPLEMENTING CIRCUIT DESIGNS IN INTEGRATED CIRCUIT DEVICES | TAT, BINH C | 12d |
| 18758730 | MEMORY CIRCUIT WITH BIT LINE CLAMPS | NGUYEN, VIET Q | 29d |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17894873 | FRACTIONAL LOGARITHMIC NUMBER SYSTEM ADDER | BUI, KENNY KIM | 3d overdue |
| 18612958 | PULSE GENERATION CIRCUITRY | NOWLIN, ERIC | 8d |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 7 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18128368 | TWO BY TWO LOGIC CHIPLET | GARBOWSKI, LEIGH M | 43d overdue |
| 18784251 | MEMORY DEFRAGMENTATION IN PROGRAMMABLE INTEGRATED CIRCUIT DEVICES | JUNG, ANDREW J | 32d overdue |
| 18134497 | ALIGNING MULTI-CHIP DEVICES | GARBOWSKI, LEIGH M | 16d overdue |
| 18778625 | CONTENT ADAPTIVE DATATYPE | LY, CHEYNE D | 2d overdue |
| 18313945 | HARDWARE EVENT TRACE WINDOWING FOR A DATA PROCESSING ARRAY | TAT, BINH C | 6d |
| 18193197 | CONTROL SET OPTIMIZATION FOR IMPLEMENTING CIRCUIT DESIGNS IN INTEGRATED CIRCUIT DEVICES | TAT, BINH C | 12d |
| 18781944 | REVOCABLE CRYPTOGRAPHIC KEYS | NOAMAN, BASSAM A | 22d |
| Art Unit | Apps |
|---|---|
| 2851 | 4 |
| 2175 | 2 |
| 2497 | 1 |
| 2152 | 1 |
| 2161 | 1 |
| 2827 | 1 |
| 2432 | 1 |
| 2181 | 1 |
| 2474 | 1 |
| 2111 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18807703 | IIC WITH ADAPTIVE CHIP-TO-CHIP INTERFACE TO SUPPORT DIFFERENT CHIP-TO-CHIP PROTOCOLS | PHAN, RAYMOND NGAN | 2175 | Other | Non-Final OA | 4d overdue | Pending | Aug 16, 2024 |
| 18784251 | MEMORY DEFRAGMENTATION IN PROGRAMMABLE INTEGRATED CIRCUIT DEVICES | JUNG, ANDREW J | 2175 | §103 | Non-Final OA | 32d overdue | Pending | Jul 25, 2024 |
| 18781944 | REVOCABLE CRYPTOGRAPHIC KEYS | NOAMAN, BASSAM A | 2497 | §103 | Non-Final OA | 22d | Pending | Jul 23, 2024 |
| 18778625 | CONTENT ADAPTIVE DATATYPE | LY, CHEYNE D | 2152 | §103 | Non-Final OA | 2d overdue | Pending | Jul 19, 2024 |
| 18759722 | TRANSMISSION AND PROCESSING OF DATA IN PARALLEL SYSTEMS | JACOB, AJITH | 2161 | §103 | Final Rejection | 13d | Pending | Jun 28, 2024 |
| 18758730 | MEMORY CIRCUIT WITH BIT LINE CLAMPS | NGUYEN, VIET Q | 2827 | §102 | Non-Final OA | 29d | Pending | Jun 28, 2024 |
| 18751169 | SECURITY RING FOR INTEGRATED CIRCUITS | MCNALLY, MICHAEL S | 2432 | Other | Final Rejection | 50d | Pending | Jun 21, 2024 |
| 18679366 | DMA STRATEGIES FOR AIE CONTROL AND CONFIGURATION | YIMER, GETENTE A | 2181 | §103 | Non-Final OA | 58d overdue | Pending | May 30, 2024 |
| 18612958 | PULSE GENERATION CIRCUITRY | NOWLIN, ERIC | 2474 | §101 | Non-Final OA | 8d | Pending | Mar 21, 2024 |
| 18608175 | DETERMINISTIC BUILT-IN SELF-TEST | MERANT, GUERRIER | 2111 | §103 | Final Rejection | 15d | Pending | Mar 18, 2024 |
| 18608183 | METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES | BEGUM, SULTANA | 2824 | §103 | Non-Final OA | 22d | Pending | Mar 18, 2024 |
| 18394668 | AN AREA AND POWER EFFICIENT CLOCK DATA RECOVERY (CDR) AND ADAPTATION IMPLEMENTATION FOR DENSE WAVELENGTH-DIVISION MULTIPLEXING (DWDM) OPTICAL LINKS | BAIG, ADNAN | 2461 | §103 | Non-Final OA | 28d | Pending | Dec 22, 2023 |
| 18501868 | SYSTEMS AND METHODS FOR TASK MANAGEMENT | KIM, SISLEY NAHYUN | 2196 | §102 | Non-Final OA | 1d overdue | Pending | Nov 03, 2023 |
| 18474138 | TEMPERATURE SENSORS IN DIE PAIR TOPOLOGY | TRAN, DZUNG | 2893 | §103 | Non-Final OA | 42d | Pending | Sep 25, 2023 |
| 18474158 | THERMALLY AWARE STACKING TOPOLOGY | CHA, GRACE YEH-EUN SAET | 2897 | §103 | Non-Final OA | — | Pending | Sep 25, 2023 |
| 18241140 | STIFFENER WITH INTEGRATED CONNECTORS | RAMOS-DIAZ, FERNANDO JOSE | 2818 | §103 | Non-Final OA | 1d overdue | Pending | Aug 31, 2023 |
| 18346017 | SYSTEMS AND METHODS FOR MEMORY MANAGEMENT | TALUKDAR, ARVIND | 2132 | §103 | Final Rejection | 17d overdue | Pending | Jun 30, 2023 |
| 18216314 | HARDWARE-BASED ACCELERATOR SIGNALING | WU, QING YUAN | 2199 | §102 | Non-Final OA | 8d overdue | Pending | Jun 29, 2023 |
| 18215685 | HIGH-BANDWIDTH THREE-DIMENSIONAL (3D) DIE STACK | BRASFIELD, QUINTON A | 2814 | §103 | Non-Final OA | 7d | Pending | Jun 28, 2023 |
| 18213647 | 8-T SRAM BITCELL FOR FPGA PROGRAMMING | TRAN, ANTHAN | 2825 | §102 | Non-Final OA | 30d overdue | Pending | Jun 23, 2023 |
| 18204658 | SELF-AUTHENTICATION OF DATA STORED OFF-CHIP | LANIER, BENJAMIN E | 2437 | §103 | Final Rejection | 12d | Pending | Jun 01, 2023 |
| 18313945 | HARDWARE EVENT TRACE WINDOWING FOR A DATA PROCESSING ARRAY | TAT, BINH C | 2851 | §102 | Non-Final OA | 6d | Pending | May 08, 2023 |
| 18143846 | RING MODULATORS WITH LOW-LOSS AND LARGE FREE SPECTRAL RANGE (FSR) ON A SILICON-ON-INSULATOR (SOI) PLATFORM | BEDTELYON, JOHN M | 2874 | §103 | Non-Final OA | 8d overdue | Pending | May 05, 2023 |
| 18134497 | ALIGNING MULTI-CHIP DEVICES | GARBOWSKI, LEIGH M | 2851 | §103 | Non-Final OA | 16d overdue | Pending | Apr 13, 2023 |
| 18128368 | TWO BY TWO LOGIC CHIPLET | GARBOWSKI, LEIGH M | 2851 | §103 | Non-Final OA | 43d overdue | Pending | Mar 30, 2023 |
| 18193197 | CONTROL SET OPTIMIZATION FOR IMPLEMENTING CIRCUIT DESIGNS IN INTEGRATED CIRCUIT DEVICES | TAT, BINH C | 2851 | §102 | Non-Final OA | 12d | Pending | Mar 30, 2023 |
| 18123160 | PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT | KIM, SEOKJIN | 2844 | §103 | Non-Final OA | — | Pending | Mar 17, 2023 |
| 18090207 | ERROR AND DEBUG INFORMATION CAPTURING FOR A BOOT PROCESS | TRUONG, LOAN | 2114 | §103 | Final Rejection | 87d overdue | Pending | Dec 28, 2022 |
| 17894873 | FRACTIONAL LOGARITHMIC NUMBER SYSTEM ADDER | BUI, KENNY KIM | 2182 | §101 | Non-Final OA | 3d overdue | Pending | Aug 24, 2022 |
| 17867625 | ADAPTIVE MATRIX MULTIPLIERS | SANDIFER, MATTHEW D | 2151 | §112 | Final Rejection | 55d | Pending | Jul 18, 2022 |
| 17862061 | WAVEFORM STIMULUS GENERATION | LUU, CUONG V | 2189 | §103 | Non-Final OA | 5d | Pending | Jul 11, 2022 |
| 17729949 | ADAPTIVE BLOCK PROCESSOR FOR BLOCKCHAIN MACHINE COMPUTE ACCELERATION ENGINE | DIROMA, SCOTT MICHAEL | 3698 | §103 | Non-Final OA | 72d overdue | Pending | Apr 26, 2022 |
| 17538497 | METHOD AND SYSTEM FOR INTERFACING A TESTBENCH TO CIRCUIT SIMULATION | COCCHI, MICHAEL EDWARD | 2188 | §102 | Non-Final OA | 19d | Pending | Nov 30, 2021 |
| 17454935 | COMPILATION OF NEURAL NETWORKS INTO SUBGRAPHS FOR PROCESSING BY MULTIPLE COMPUTE CIRCUITS | RUTTEN, JAMES D | 2121 | §103 | Non-Final OA | 15d | Pending | Nov 15, 2021 |
| 17394714 | LEARNING-BASED POWER MODELING OF A PROCESSOR CORE AND SYSTEMS WITH MULTIPLE PROCESSOR CORES | DEBNATH, NUPUR | 2186 | §103 | Non-Final OA | 71d overdue | Pending | Aug 05, 2021 |
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