Xilinx, Inc.

Pending Office Actions

App #	Title	Examiner	Art Unit	Status	Filed
18807703	IIC WITH ADAPTIVE CHIP-TO-CHIP INTERFACE TO SUPPORT DIFFERENT CHIP-TO-CHIP PROTOCOLS	PHAN, RAYMOND NGAN	2175	Non-Final OA	Aug 16, 2024
18781944	REVOCABLE CRYPTOGRAPHIC KEYS	NOAMAN, BASSAM A	2497	Non-Final OA	Jul 23, 2024
18778625	CONTENT ADAPTIVE DATATYPE	LY, CHEYNE D	2152	Non-Final OA	Jul 19, 2024
18759722	TRANSMISSION AND PROCESSING OF DATA IN PARALLEL SYSTEMS	JACOB, AJITH	2161	Final Rejection	Jun 28, 2024
18758730	MEMORY CIRCUIT WITH BIT LINE CLAMPS	NGUYEN, VIET Q	2827	Non-Final OA	Jun 28, 2024
18612958	PULSE GENERATION CIRCUITRY	NOWLIN, ERIC	2474	Non-Final OA	Mar 21, 2024
18608183	METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES	BEGUM, SULTANA	2824	Non-Final OA	Mar 18, 2024
18608175	DETERMINISTIC BUILT-IN SELF-TEST	MERANT, GUERRIER	2111	Final Rejection	Mar 18, 2024
18394668	AN AREA AND POWER EFFICIENT CLOCK DATA RECOVERY (CDR) AND ADAPTATION IMPLEMENTATION FOR DENSE WAVELENGTH-DIVISION MULTIPLEXING (DWDM) OPTICAL LINKS	BAIG, ADNAN	2461	Non-Final OA	Dec 22, 2023
18501868	SYSTEMS AND METHODS FOR TASK MANAGEMENT	KIM, SISLEY NAHYUN	2196	Non-Final OA	Nov 03, 2023
18242246	RANDOMIZATION OF INSTRUCTION EXECUTION FLOW FOR GLITCH PROTECTION	CHEN, ZHI	2196	Non-Final OA	Sep 05, 2023
18241140	STIFFENER WITH INTEGRATED CONNECTORS	RAMOS-DIAZ, FERNANDO JOSE	2818	Non-Final OA	Aug 31, 2023
18346017	SYSTEMS AND METHODS FOR MEMORY MANAGEMENT	TALUKDAR, ARVIND	2132	Final Rejection	Jun 30, 2023
18216314	HARDWARE-BASED ACCELERATOR SIGNALING	WU, QING YUAN	2199	Non-Final OA	Jun 29, 2023
18215685	HIGH-BANDWIDTH THREE-DIMENSIONAL (3D) DIE STACK	BRASFIELD, QUINTON A	2814	Non-Final OA	Jun 28, 2023
18213647	8-T SRAM BITCELL FOR FPGA PROGRAMMING	TRAN, ANTHAN	2825	Non-Final OA	Jun 23, 2023
18204658	SELF-AUTHENTICATION OF DATA STORED OFF-CHIP	LANIER, BENJAMIN E	2437	Final Rejection	Jun 01, 2023
18203607	ON-CHIP (IN-SYSTEM) TRIGGERING OF LOGIC ANALYZER	GUSTAFSON, MATHEW DONALD	2113	Final Rejection	May 30, 2023
18313945	HARDWARE EVENT TRACE WINDOWING FOR A DATA PROCESSING ARRAY	TAT, BINH C	2851	Non-Final OA	May 08, 2023
18143846	RING MODULATORS WITH LOW-LOSS AND LARGE FREE SPECTRAL RANGE (FSR) ON A SILICON-ON-INSULATOR (SOI) PLATFORM	BEDTELYON, JOHN M	2874	Non-Final OA	May 05, 2023
18134497	ALIGNING MULTI-CHIP DEVICES	GARBOWSKI, LEIGH M	2851	Non-Final OA	Apr 13, 2023
18128368	TWO BY TWO LOGIC CHIPLET	GARBOWSKI, LEIGH M	2851	Non-Final OA	Mar 30, 2023
18193197	CONTROL SET OPTIMIZATION FOR IMPLEMENTING CIRCUIT DESIGNS IN INTEGRATED CIRCUIT DEVICES	TAT, BINH C	2851	Non-Final OA	Mar 30, 2023
18123160	PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT	KIM, SEOKJIN	2844	Final Rejection	Mar 17, 2023
18090207	ERROR AND DEBUG INFORMATION CAPTURING FOR A BOOT PROCESS	TRUONG, LOAN	2114	Final Rejection	Dec 28, 2022
18049585	ADAPTABLE FRAMEWORK FOR CIRCUIT DESIGN SIMULATION VERIFICATION	LEE, ERIC D	2851	Non-Final OA	Oct 25, 2022
17823902	INSTRUCTION GENERATION AND PROGRAMMING MODEL FOR A DATA PROCESSING ARRAY AND MICROCONTROLLER	HOANG, PHUONG N	2194	Non-Final OA	Aug 31, 2022
17894873	FRACTIONAL LOGARITHMIC NUMBER SYSTEM ADDER	BUI, KENNY KIM	2182	Non-Final OA	Aug 24, 2022
17867625	ADAPTIVE MATRIX MULTIPLIERS	SANDIFER, MATTHEW D	2151	Non-Final OA	Jul 18, 2022
17862061	WAVEFORM STIMULUS GENERATION	LUU, CUONG V	2189	Non-Final OA	Jul 11, 2022
17571292	NETWORK INTERFACE DEVICE	BARTELS, CHRISTOPHER A.	2184	Final Rejection	Jan 07, 2022
17538497	METHOD AND SYSTEM FOR INTERFACING A TESTBENCH TO CIRCUIT SIMULATION	COCCHI, MICHAEL EDWARD	2188	Non-Final OA	Nov 30, 2021
17454935	COMPILATION OF NEURAL NETWORKS INTO SUBGRAPHS FOR PROCESSING BY MULTIPLE COMPUTE CIRCUITS	RUTTEN, JAMES D	2121	Final Rejection	Nov 15, 2021

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Pending Office Actions

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Xilinx, Inc.

Portfolio Summary

Pending Office Actions

Managing Xilinx, Inc.'s Patent Portfolio?

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