Attorney’s Docket Number: P202204885US01
Filing Date: 06/29/2023
Claimed Priority Date: N/A
Applicants: Polomoff et al
Examiner: Aneesa Baig
DETAILED ACTION
This Office action responds to the Amendment filed on 02/13/2026.
Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgment
The Amendment filed on 03/03/2026, responding to the Office action mailed on 12/08/2025, has been entered. The present Office action is made with all the suggested amendments being fully considered. Applicant amended claims 1,9, 12 and cancelled claims 2,3,14,15,16.
Response to Amendment
The replacement drawing sheet filed on 03/03/2026 is acknowledged and renders the specification objection from the office action mailed on 12/08/2025 moot. Accordingly, this objection is withdrawn.
Applicant amendments to the Claims have overcome the respective claim rejections under 35 U.S.C. 112, 102, 103, as previously formulated in the Non-Final Office action mailed on 10/20/2025.
However, some of the previously presented prior art remains relevant, and new grounds for rejection are presented below, as necessitated by Applicant’s amendments to the claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1,4-13 rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Regarding Claim 1, Claim 1 recites “said metal line is formed on a landing pad positioned above said first crackstop structure of said first semiconductor build, said metal line being compressively bonded directly to a landing pad positioned above said first crackstop structure of said second semiconductor build” It is unclear if the limitation of “a landing pad” are directed to same or different features, thus rendering the claim indefinite. For example, in 6A of the instant application, the second landing pad 272 is also positioned above the first crackstop structure 256 as the direction has has not been strictly depicted in the image. For the purpose of examination, the claim will be construed as reciting -- said metal line is formed on a landing pad positioned above said first crackstop structure of said first semiconductor build, said metal line being compressively bonded directly to a second landing pad positioned above said first crackstop structure of said second semiconductor build--, as best understood by the examiner in view of the original disclosure, until further clarifications are provided by the applicant.
Claims 4-11 depend from claim 1, thus inherit the deficiencies identified supra.
Regarding Claim 12, Claim 12 recites “wherein said forming the metal line includes: forming a landing pad over said crackstop structure,” then later recites “aligning said metal line over a landing pad of said crackstop structure of said other semiconductor build,” It is unclear if the limitation of “a landing pad” are directed to same or different features and which crackstop structure the feature is formed on, thus rendering the claim indefinite for similar reasons stated above in Claim 1 rejection. Further, it is unclear if the landing pad is part of the metal line, or if the metal line is formed on top of an already formed landing pad. For the purpose of examination, the claim will be construed as reciting -- forming a landing pad over said crackstop structure; wherein said forming the metal line includes: -- and aligning said metal line over a second landing pad of said crackstop structure of said other semiconductor build, as best understood by the examiner in view of the original disclosure, until further clarifications are provided by the applicant.
Claim 13 depends from claim 12, thus inherit the deficiencies identified supra
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1, 4-10 are rejected under 35 U.S.C. 103 as being unpatentable over Shen et al (US 20220359429 A1, Hereinafter Shen).
Regarding Claim 1, Shen (e.g., Fig 1, 2-12, Fig 3, 20-25 [00056]-[0065][0019]) shows most aspects of the instant invention, including, a semiconductor structure comprising:
a first semiconductor build (300) having a first crackstop structure (Seal ring 332a) along a first periphery of said first semiconductor build ([0019], Fig 4 shows periphery)
a second semiconductor build (400) having a first crackstop structure (Seal ring 332a on wafer 400) along a first periphery of said second semiconductor build ([0019]); and
a metal line bonded to said first crackstop structure of said first semiconductor build and said first crackstop structure of said second semiconductor build to form a continuous unified crackstop wall (Fig 21 [0059] metal line includes solders from both wafers 300 and 400 -bumps 362 and corresponding bumps 462 form a continuous connection of continuous seal ring extension 468, Fig 25 [0059]) between and along at least a portion of said first peripheries of said first and second semiconductor builds such that said crackstop structures are joined together by said metal line (e.g., solder 364 is formed to join both seal rings Fig 25, [0057]).
wherein said metal line is formed on a landing pad positioned above said first crackstop structure of said first semiconductor build (metal line including continuous seal ring extension 468, Fig 25 [0059] are on the first wafer 300 on seal ring UBM, [0057] prior to forming solder bumps 364, UBM layers may be formed on ring portions 136),
said metal line being compressively bonded directly to a second landing pad positioned above said first crackstop structure of said second semiconductor build (continuous seal ring extension 468, Fig 25 [0059] in Fig 21 is bonded to the UBM of wafer 400, which is above the seal ring of wafer 400), and wherein said continuous unified crackstop wall resists and/or blocks at least one of external crack growth, internal cracking, and delamination from thermal cycling warpage ([0019] seal rings and extended seal ring including solder bump process provide stress support).
The language " said metal line being compressively bonded directly to a landing pad positioned above said first crackstop structure," is directed towards the process of bonding two bodies in a specific order. It is well settled that "product by process" limitations in claims drawn to structure are directed to the final product, per se, no matter how actually made. In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also, In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wethheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); In re Marosi et al., 218 USPQ 289; and particularly In re Thorpe, 227 USPQ 964, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in "product by process" claims or otherwise. The above case law further makes clear that applicant has the burden of showing that the method language necessarily produces a structural difference. As such, the language “said metal line being compressively bonded directly to a landing pad positioned above said first crackstop structure " only requires a metal line post-bonding to a landing pad in wafer 400, which does not distinguish the structural invention from Shen, who teaches the structure as claimed, regardless of the process order of bonding, and the type of bonding.
Regarding Claim 4, See comments from Claim 1.
Regarding Claim 5, Shen shows the metal line (merged bumps continuous seal ring extension 468, Fig 25 [0059], reflowed to form a continuous connection of merged bumps continuous seal ring extension 468, Fig 25 [0059])
Regarding Claim 6, See comments from Claim 1
Regarding Claim 7, See comments from Claim 1
Regarding Claim 8, Shen shows an underfill ([0064]).
Regarding Claim 9, Shen (Figs 23 and 24) shows a gaps within the solder bumps and shows underfill may be added to fill gaps ([0064] “singulation to fill in the gap up to the first seal ring extension”).
Regarding Claim 10, Shen shows
said first semiconductor build has a second crackstop structure (332b on wafer 300) along a second periphery (inner periphery Fig 4 and 25) of said first semiconductor build, and
said second semiconductor build has a second crackstop structure (332b on wafer 400) along a second periphery (inner periphery Fig 4 and 25) of said second semiconductor build,
further comprising a second metal line ( e.g., merged bumps continuous seal ring extension 468, Fig 25 [0059] on second seal ring 332b, Fig 20) bonded to said second crackstop structure of said first semiconductor build and said second crackstop structure of said second semiconductor build to form a wall (the eutectic material of the seal ring extensions 364 (and corresponding seal ring extensions 464) reflowed to form a continuous seal ring extension continuous seal ring extension 468, Fig 25 [0059] [0059]) between and along a portion of said second peripheries of said first and second semiconductor build such that said second crackstop structures are joined together by said second metal line (e.g., Fig 25 shows a continuous wall of a continuous seal ring extension 468, Fig 25 [0059] seal rings on top of which solder is placed).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Shen in view of Chang(US 20240038686 A1, Hereinafter Chang).
Regarding claim 11, Shen shows two semiconductor devices each with a crackstop structure, but it is silent about one of the devices being an interposer with its own crackstop feature.
Chang (Fig 2, 16b, 19, [0062], [0065] [0061]), on the other hand and in a related field of 3D stacking of IC, teaches stacking of dies each with their own seal rings. Additionally, each die can either function as an active chip or an interposer. The die (e.g., 1904) functions as an interposer to form interconnections between the chips 1906 and 1902. Fig 16B also teaches that the seal ring may be aligned and stacked on top of each other, to avoid cracking along each of the dies.
Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have multiple stacked dies with the crackstop structures with one acting as an interposer, as taught by Chang, to form interconnections between multiple chips, each containing one or more crackstop structures.
Response to Arguments
Applicant’s arguments with respect to the claims filed have been considered but are considered moot in view of the new grounds of rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action.
Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANEESA RIAZ BAIG whose telephone number is (571)272-0249. The examiner can normally be reached Monday-Friday 8am-5pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANEESA RIAZ BAIG/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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