Prosecution Insights
Last updated: April 19, 2026
Application No. 18/217,044

Semiconductor Package or a Printed Circuit Board, Both Modified to One or More of Reduce, Inverse or Utilize Magnetic Coupling Caused by the Load Current of a Semiconductor Transistor

Non-Final OA §102§103
Filed
Jun 30, 2023
Examiner
SUN, YU-HSI DAVID
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies Austria AG
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
85%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
648 granted / 845 resolved
+8.7% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
27 currently pending
Career history
872
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
45.9%
+5.9% vs TC avg
§102
25.5%
-14.5% vs TC avg
§112
16.6%
-23.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 845 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species I in the reply filed on 10/29/2025 is acknowledged. Claims 7-11 and 14-16 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 10/29/2025. Drawings Figures 1A-1B should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-6 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by applicant’s admitted prior art (figures 1A-1B of 2024/0014104, hereinafter AAPA). Regarding claim 1, figures 1A-1B of AAPA disclose a semiconductor package, comprising a semiconductor transistor circuit comprising a semiconductor transistor die comprising die terminals, including a collector/drain (C), a source/emitter (E1), a sense source/sense emitter (E2), a gate (G), and a load path; a driver line connected with the gate; and a gate control loop in which the source/emitter is connected with the driver line; a plurality of external contacts comprising a first external contact connected with the collector/drain (D/C), at least one second external contact connected with the source/emitter (S/E1), a third external contact connected with the sense source/sense emitter (K/E2), and a fourth external contact connected with the gate (G); wherein the plurality of external contacts are arranged or configured to reduce or utilize magnetic coupling induced by a load current flowing through the load path. Note: It will be taken that a functioning device which includes the various claimed external contacts is said to be “utilizing” the magnetic coupling. Furthermore, the recited “utilize magnetic coupling induced…” (i.e., function) does not structurally distinguish an apparatus claim from the prior art apparatus. see In re Danly, 263 F.2d 844, 838 (CCPA 1959) (apparatus claims must distinguish in terms of structure rather than function). The only structural limitation that appears to be required for the prior art apparatus to be capable of performing the aforementioned function are the claimed plurality of external contacts, which AAPA clearly shows or in other words, the prior art appears to inherently possess the capability of performing the recited functions. see also In re Ludtke, 441 F.2d 660, 664 (CCPA 1971) (citing In re Swinehart, 439 F.2d 210 (CCPA 1971) to emphasize that “where the Patent [and Trademark] Office has reason to believe that a functional limitation asserted to be critical for establishing novelty in the claimed subject matter may, in fact be an inherent characteristic of the prior art, it possesses the authority to require the applicant to prove that the subject matter shown to be in the prior art does not possess the characteristic relied on."). It is in this regard that the claim is considered met. Regarding claim 2, figures 1A-1B of AAPA disclose the semiconductor package is configured as a through-hole de- vice in which the external contacts are configured as external leads. Regarding claims 3 and 4, figures 1A-1B of AAPA disclose a distance between the second external contact and the third external contact is increased (relative to contacts that have a decreased distance). Regarding claim 5, figures 1A-1B of AAPA disclose in a redesign of a standard package, the arrangement of the external contacts is changed in such a way that a distance d between the second external contact and the third external contact is increased relative to contacts that have a decreased distance). Regarding claim 6, figures 1A-1B of AAPA disclose in a redesign of a standard package, the arrangement of the external contacts is changed in such a way that some second contacts of a plurality of second contacts are removed (relative to a device with additional second contacts). Regarding claim 12, figures 1A-1B of AAPA disclose the semiconductor package is configured as a die or chip embedded device comprising; a die carrier comprising an opening; a semiconductor die disposed in the opening; wherein the external contacts are configured as interconnects connected with the semiconductor die. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over AAPA. Regarding claim 13, AAPA does not explicitly disclose the die carrier comprises or is part of a printed circuit board or of a prepreg layer. However, it would have been obvious to make the carrier comprising a printed circuit board since it is a well known structure/material for forming electronic devices. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU-HSI DAVID SUN whose telephone number is (571)270-5773. The examiner can normally be reached Mon-Fri 8am-4pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU-HSI D SUN/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Jun 30, 2023
Application Filed
Dec 28, 2025
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
85%
With Interview (+8.4%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 845 resolved cases by this examiner. Grant probability derived from career allow rate.

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