Prosecution Insights
Last updated: July 17, 2026
Application No. 18/221,563

METHOD FOR REPAIRING AND INSPECTING DISPLAY DEVICE

Final Rejection §103
Filed
Jul 13, 2023
Priority
Feb 01, 2023 — RE 10-2023-0013593
Examiner
SIPLING, KENNETH MARK
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
2 (Final)
71%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
63%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
5 granted / 7 resolved
+3.4% vs TC avg
Minimal -8% lift
Without
With
+-8.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
26 currently pending
Career history
51
Total Applications
across all art units

Statute-Specific Performance

§103
89.4%
+49.4% vs TC avg
§102
3.3%
-36.7% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 7 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Application The Amendment filed on 12/29/2025, responding to the Office action mailed on 10/1/2025, has been entered into the record. The present Office action is made with all the suggested amendments being fully considered. Accordingly, claims 1-14 are pending in this application. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 11, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 114846602 A) in view of Cui (CN 114520246 A) and Pil-guk (KR 102386932 B1). Re Claim 1 Cai teaches a method for repairing a display device (FIG. 5 and 6), the method comprising: preparing a panel substrate (110) including a transistor (page 8 par 2); transferring a plurality of light-emitting elements (100a, page 8 par 3) onto the panel substrate (110), wherein the transistor is respectively electrically connected to the plurality of light- emitting elements (FIG. 5e, page 8 last par states, “The circuit substrate 110 may also have a pad on the upper surface for allowing electrical connection to a circuit disposed inside.”); repairing a defective light-emitting element (100a) to a normal light-emitting element (page 13 par 2 states, “…repairing light emitting component 100ato remove the position of the bad light emitting component 100 of the light emitting component, so as to repair the circuit substrate 110 of all bad light emitting component 100.”, FIG. 6E). Cai does not teach the panel substrate includes a plurality of thin-film transistors. Cui teaches the panel substrate (SUB, page 7 par 2) includes a plurality of thin-film transistors (T, page 8 par 3, FIG. 2 is repeated multiple times in FIG. 1). The ordinary artisan would have been motivated to modify Cui in combination with Cai in the above manner for the motivation of optimally connecting LED’s in a circuit to reduce the process cost. Page 2 par 5 states, “The aspect of the embodiment of the present disclosure relates to a display device and a manufacturing method thereof, the method can by simultaneously or in parallel to form a light emitting element and a partition wall around the light emitting element (e.g., around the light emitting element) to reduce the process cost.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Cui into the structure of Cai. Cui in view of Cai does not teach preparing an inspection substrate having a plurality of inspecting contact units each including contact pins; positioning the inspection substrate on the panel substrate such that the contact pins of the inspection substrate face the plurality of light-emitting elements; and determining whether the plurality of light-emitting elements is defective by connecting the contact pins to the plurality of light-emitting elements. Pil-guk teaches preparing an inspection substrate (6, page 10 par 1, “LED transport device”) having a plurality of inspecting contact units each including contact pins(FIG. 15, 611 and 612, page 10 par 1, “micro LED inspection pickup units”); positioning the inspection substrate on the substrate (W) such that the contact pins (611 and 612) of the inspection substrate (6) face the plurality of light-emitting elements (FIG. 15); and determining whether the plurality of light-emitting elements (10) is defective by connecting the contact pins (611 and 612) to the plurality of light-emitting elements (10, page 10 par 2, “The micro LED inspection pickup unit 610 is a part that grips and picks up the micro LED 10 to vertically lift it while checking whether the micro LED 10 operates normally.”, FIG. 15) The ordinary artisan would have been motivated to modify Pil-guk in combination with Cai in view of Cui in the above manner for the motivation of finding damaged LED’s to ensure the display device functions at a peak level for the end user and is still a small size, light weight, and requires little power to operate. Page 2 par 4 states, “Micro LEDs having a size of several to several tens of micrometers can be widely used in optical applications requiring low power, miniaturization, and light weight, and thus development is being actively conducted.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Pil-guk into the structure of Cai in view of Cui. Re Claim 11 Cai in view of Cui and Pil-guk teaches the method of claim 1, wherein the repairing the defective light-emitting element (Cai, FIG. 6) includes removing the defective light-emitting element (page 12 par 8 states, “Referring to FIG. 6b, the circuit substrate 100a is removed from the position of the bad light emitting component 100 is arranged and is jointed with the light emitting component 100a.”) and replacing with the normal light- emitting element (page 13 par 2, “…removing substrate 21a from the light emitting component 100a. A plurality of times by using a plurality of substrate 21a with repairing light emitting component 100ato remove the position of the bad light emitting component 100 of the light emitting component, so as to repair the circuit substrate 110 of all bad light emitting component 100.”). Re Claim 14 Cai teaches a method for inspecting a display device (FIG. 5 and 6) during manufacturing process of the display device, wherein the display device comprises a panel substrate (110, page 8 par 2), the method comprising: preparing a panel substrate (110) including a transistor (page 8 par 2): transferring a plurality of light-emitting elements onto the panel substrate, wherein the plurality of thin-film transistors are respectively electrically connected to the plurality of light- emitting elements; transferring a plurality of light-emitting elements (100a, page 8 par 3) onto the panel substrate (110), wherein the transistor is respectively electrically connected to the plurality of light- emitting elements (FIG. 5e, page 8 last par states, “The circuit substrate 110 may also have a pad on the upper surface for allowing electrical connection to a circuit disposed inside.”); positioning an inspection substrate (21a, page 13 par 2 states, “…using substrate 21a bonding repairing light emitting component 100a,…”, FIG. 6D and 6E) on the panel substrate (110). Cai does not teach the panel substrate includes a plurality of thin-film transistors; Cui teaches the panel substrate (SUB, page 7 par 2) includes a plurality of thin-film transistors (T, page 8 par 3, FIG. 2 is repeated multiple times in FIG. 1). The ordinary artisan would have been motivated to modify Cui in combination with Cai in the above manner for the motivation of optimally connecting LED’s in a circuit to reduce the process cost. Page 2 par 5 states, “The aspect of the embodiment of the present disclosure relates to a display device and a manufacturing method thereof, the method can by simultaneously or in parallel to form a light emitting element and a partition wall around the light emitting element (e.g., around the light emitting element) to reduce the process cost.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Cui into the structure of Cai. Cui in view of Cai does not teach contact pins of the inspection substrate face the plurality of light-emitting elements; and determining whether the plurality of light-emitting elements is defective by connecting the contact pins to the plurality of light-emitting elements. Pil-guk teaches the contact pins (FIG. 15, 611 and 612, page 10 par 1, “micro LED inspection pickup units”) of the inspection substrate (6, page 10 par 1, “LED transport device”) face the plurality of light-emitting elements (FIG. 15); and determining whether the plurality of light-emitting elements (10, page 4 par 1) is defective by connecting the contact pins (611 and 612) to the plurality of light-emitting elements (10, page 10 par 2, “The micro LED inspection pickup unit 610 is a part that grips and picks up the micro LED 10 to vertically lift it while checking whether the micro LED 10 operates normally.”, FIG. 15) The ordinary artisan would have been motivated to modify Pil-guk in combination with Cai in view of Cui in the above manner for the motivation of finding damaged LED’s to ensure the display device functions at a peak level for the end user and is still a small size, light weight, and requires little power to operate. Page 2 par 4 states, “Micro LEDs having a size of several to several tens of micrometers can be widely used in optical applications requiring low power, miniaturization, and light weight, and thus development is being actively conducted.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Pil-guk into the structure of Cai in view of Cui. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 114846602 A) in view of Cui (CN 114520246 A) and Pil-guk (KR 102386932 B1) as applied to claim 1 above, and further in view of Ahn (US 20190304853 A1). Re Claim 2 Cai in view of Cui and Pil-guk teaches the method of claim 1, but does not teach the plurality of light-emitting elements includes: a nitride semiconductor structure including a first semiconductor layer, an active layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the active layer; a passivation pattern disposed on an outer surface of the nitride semiconductor structure; a first electrode connected to the first semiconductor layer; and a second electrode connected to the second semiconductor layer. Ahn teaches the plurality of light-emitting elements (FIG. 2) [0020] includes: a nitride semiconductor structure (410 contains nitride, [0058]) including a first semiconductor layer (102) [0031], an active layer (103) disposed on the first semiconductor layer, and a second semiconductor layer disposed on the active layer (104); a passivation pattern (520) [0063] disposed on an outer surface of the nitride semiconductor structure (410); a first electrode (106) connected to the first semiconductor layer (102); and a second electrode (107) connected to the second semiconductor layer (104, FIG. 1). The ordinary artisan would have been motivated to modify Ahn in combination with Cai in view of Cui and Pil-guk in the above manner for the motivation of building a nitride semiconductor structure and adding semiconductor layers and electrode to help the device function optimally. [0004] states, “In order to apply the micro LED to a display, it is necessary to develop a customized microchip based on a flexible material and/or flexible device using a micro LED device, and techniques of transferring the micrometer-sized LED chip and mounting the LED chip on a display pixel electrode are required.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Ahn into the structure of Cai in view of Cui and Pil-guk. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 114846602 A) in view of Cui (CN 114520246 A) and Pil-guk (KR 102386932 B1) and Ahn (US 20190304853 A1) as applied to claims 1 and 2 above, and further in view of Lee (US 20200006452 A1). Re Claim 3 Cai in view of Cui and Pil-guk and Ahn teaches the method of claim 2, but does not teach the first electrode is coplanar with the second electrode. Lee teaches the method of claim 2, wherein the first electrode (S1) [0086] is coplanar with the second electrode (D1, FIG. 6). The ordinary artisan would have been motivated to modify Lee in combination with Cai in view of Cui and Pil-guk and Ahn in the above manner for the motivation of making the electrodes coplanar to allow for the device to easily and optimally be connected to another semiconductor device on another substrate. [0025] states, “Display devices may be used to display images, text, etc., and can be classified into liquid crystal displays, electrophoretic displays, organic light-emitting displays, inorganic light-emitting displays, field emission displays, surface-conduction electron-emitter displays, plasma displays, and cathode ray displays.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Lee into the structure of Cai in view of Cui and Pil-guk and Ahn. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 114846602 A) in view of Cui (CN 114520246 A) and Pil-guk (KR 102386932 B1) as applied to claim 1 above, and further in view of Vaughn (US 20050062481 A1). Re Claim 10 Cai in view of Cui and Pil-guk teaches the method of claim 1, but does not teach the determining whether the plurality of light- emitting elements is defective includes applying a voltage to the contact pins of the inspection contact unit to identify whether the plurality of light-emitting elements is turned on. Vaughn teaches the determining whether the plurality of light- emitting elements is defective includes applying a voltage to the contact pins (use current sources 70-75 as contact pins)[0042] of the inspection contact unit to identify whether the plurality of light-emitting elements (93-98) is turned on (FIG. 3, [0055] states, “Lastly, microprocessor 60 can test any of the LEDs 93-98 by changing the current levels for short periods of time to test each LED for conformance to the typical diode voltage-current characteristic, as in block 119. This is accomplished by reducing the current through each LED, preferably in some sequential order, by controlling one of the current sources 70-75.”) The ordinary artisan would have been motivated to modify Vaughn in combination with Cai in view of Cui and Pil-guk in the above manner for the motivation of applying a current (voltage) to ensure the plurality of LEDs work and function optimally. [0018] states, “Another object of the present invention is to provide methods for operating, controlling and testing LEDs in a signaling system, including determining the operational status thereof.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Vaughn into the structure of Cai in view of Cui and Pil-guk. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 114846602 A) in view of Cui (CN 114520246 A) and Pil-guk (KR 102386932 B1) and Ahn (US 20190304853 A1) and Lee (US 20200006452 A1) as applied to claims 1-3 above, and further in view of Pappas (US 20190018057 A1). Re Claim 12 Cai in view of Cui and Pil-guk and Ahn and Lee teaches the method of claim 3, but does not teach the first inspecting contact unit receives a voltage having a first polarity and the second inspecting contact unit receives a voltage having a second polarity different from the first polarity. Pappas teaches the first inspecting contact unit (124, [0030] “second probe pad”) receives a voltage having a first polarity and the second inspecting contact unit (126, [0030] “third probe pad”) receives a voltage having a second polarity different from the first polarity ([0030] states, “…a first voltage is applied to the anode electrode of the LEDs 250 via the second probe pad 124, and a second voltage is applied to the cathode electrode of the LEDs 250 via the third probe pad 126, the second voltage lower than the first voltage.”). The ordinary artisan would have been motivated to modify Pappas in combination with Cai in view of Cui and Pil-guk and Ahn and Lee in the above manner for the motivation of apply different voltage potentials to the contact pads to ensure the device works as desired and operates in an optimal manner. [0008] states, “In some embodiments, when voltage difference is applied between the anode electrodes and the cathode electrodes of the LEDs, a detector is used to monitor the LEDs and to detect whether they turn on and satisfy a threshold level of operability.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Pappas into the structure of Cai in view of Cui and Pil-guk and Ahn and Lee. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 114846602 A) in view of Cui (CN 114520246 A) and Pil-guk (KR 102386932 B1) and Ahn (US 20190304853 A1) as applied to claims 1 and 2 above, and further in view of Chang (US 20200105975 A1). Re Claim 13 Cai in view of Cui and Pil-guk and Ahn teaches the method of claim 2, but does not teach the first electrode or the second electrode has a circular shape in a top view thereof. Chang teaches the first electrode (16) AND the second electrode (17) [0024] has a circular shape in a top view thereof (Claim 10 states, “…the first extension electrode and the second electrode respectively have a circular shape in a top view.”). The ordinary artisan would have been motivated to modify Chang in combination with Cai in view of Cui and Pil-guk and Ahn in the above manner for the motivation of having circular electrodes to help the current distribution be uniform and optimal through the semiconductor device and help improve light efficiency. [0004] states, “…there is a need for a light-emitting having a limited light-emitting area with a high current density for improving light efficiency thereat.” It would have been obvious to one ordinary skill in the art before the effective filing date of claimed the invention to incorporate the teaching as taught by Chang into the structure of Cai in view of Cui and Pil-guk and Ahn. Allowable Subject Matter Claims 4-9 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claims 1-3 and 10-14 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH MARK SIPLING whose telephone number is (571)272-3269. The examiner can normally be reached 10 AM - 6 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KENNETH MARK SIPLING/Examiner, Art Unit 2818 /DUY T NGUYEN/Primary Examiner, Art Unit 2818 5/7/26
Read full office action

Prosecution Timeline

Jul 13, 2023
Application Filed
Oct 01, 2025
Non-Final Rejection mailed — §103
Dec 29, 2025
Response Filed
May 11, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
71%
Grant Probability
63%
With Interview (-8.3%)
3y 9m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 7 resolved cases by this examiner. Grant probability derived from career allowance rate.

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